2002-04-30 Michael Snyder <msnyder@redhat.com>
* arm-tdep.c: Whitespace clean-ups.
This commit is contained in:
Michael Snyder
parent
200dbde8db
commit
94c30b78db
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@ -1,6 +1,7 @@
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2002-04-30 Michael Snyder <msnyder@redhat.com>
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* arm-tdep.c (arm_skip_prologue): Fix thinko; two lines
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* arm-tdep.c: Whitespace clean-ups.
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(arm_skip_prologue): Fix thinko; two lines
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should have been removed as part of 4/24 change.
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2002-04-30 Kevin Buettner <kevinb@redhat.com>
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212
gdb/arm-tdep.c
212
gdb/arm-tdep.c
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@ -93,8 +93,8 @@
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#define MSYMBOL_SIZE(msym) \
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((long) MSYMBOL_INFO (msym) & 0x7fffffff)
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/* This table matches the indicees assigned to enum arm_abi. Keep
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them in sync. */
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/* This table matches the indicees assigned to enum arm_abi.
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Keep them in sync. */
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static const char * const arm_abi_names[] =
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{
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@ -110,15 +110,15 @@ static const char * const arm_abi_names[] =
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NULL
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};
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/* Number of different reg name sets (options). */
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/* Number of different reg name sets (options). */
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static int num_flavor_options;
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/* We have more registers than the disassembler as gdb can print the value
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of special registers as well.
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The general register names are overwritten by whatever is being used by
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the disassembler at the moment. We also adjust the case of cpsr and fps. */
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the disassembler at the moment. We also adjust the case of cpsr and fps. */
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/* Initial value: Register names used in ARM's ISA documentation. */
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/* Initial value: Register names used in ARM's ISA documentation. */
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static char * arm_register_name_strings[] =
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{"r0", "r1", "r2", "r3", /* 0 1 2 3 */
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"r4", "r5", "r6", "r7", /* 4 5 6 7 */
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@ -126,15 +126,15 @@ static char * arm_register_name_strings[] =
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"r12", "sp", "lr", "pc", /* 12 13 14 15 */
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"f0", "f1", "f2", "f3", /* 16 17 18 19 */
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"f4", "f5", "f6", "f7", /* 20 21 22 23 */
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"fps", "cpsr" }; /* 24 25 */
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"fps", "cpsr" }; /* 24 25 */
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static char **arm_register_names = arm_register_name_strings;
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/* Valid register name flavors. */
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static const char **valid_flavors;
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/* Disassembly flavor to use. Default to "std" register names. */
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/* Disassembly flavor to use. Default to "std" register names. */
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static const char *disassembly_flavor;
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/* Index to that option in the opcodes table. */
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/* Index to that option in the opcodes table. */
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static int current_option;
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/* This is used to keep the bfd arch_info in sync with the disassembly
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@ -149,7 +149,7 @@ static void convert_from_extended (void *ptr, void *dbl);
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all saved registers, 'cause we need 'em a lot! We also keep the
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current size of the stack frame, and the offset of the frame
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pointer from the stack pointer (for frameless functions, and when
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we're still in the prologue of a function with a frame) */
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we're still in the prologue of a function with a frame). */
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struct frame_extra_info
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{
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@ -170,7 +170,7 @@ arm_frame_chain_valid (CORE_ADDR chain, struct frame_info *thisframe)
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return (chain != 0 && (FRAME_SAVED_PC (thisframe) >= LOWEST_PC));
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}
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/* Set to true if the 32-bit mode is in use. */
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/* Set to true if the 32-bit mode is in use. */
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int arm_apcs_32 = 1;
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@ -226,7 +226,7 @@ arm_pc_is_thumb_dummy (CORE_ADDR memaddr)
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We hope the current stack pointer is not so far alway from the dummy
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frame location (true if we have not pushed large data structures or
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gone too many levels deep) and that our 1024 is not enough to consider
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code regions as part of the stack (true for most practical purposes) */
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code regions as part of the stack (true for most practical purposes). */
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if (PC_IN_CALL_DUMMY (memaddr, sp, sp + 1024))
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return caller_is_thumb;
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else
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@ -289,7 +289,7 @@ arm_frameless_function_invocation (struct frame_info *fi)
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/* There are some frameless functions whose first two instructions
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follow the standard APCS form, in which case after_prologue will
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be func_start + 8. */
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be func_start + 8. */
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frameless = (after_prologue < func_start + 12);
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return frameless;
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@ -356,31 +356,31 @@ thumb_skip_prologue (CORE_ADDR pc, CORE_ADDR func_end)
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*/
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int findmask = 0;
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for (current_pc = pc;
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current_pc + 2 < func_end && current_pc < pc + 40;
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for (current_pc = pc;
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current_pc + 2 < func_end && current_pc < pc + 40;
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current_pc += 2)
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{
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unsigned short insn = read_memory_unsigned_integer (current_pc, 2);
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if ((insn & 0xfe00) == 0xb400) /* push { rlist } */
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if ((insn & 0xfe00) == 0xb400) /* push { rlist } */
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{
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findmask |= 1; /* push found */
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findmask |= 1; /* push found */
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}
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else if ((insn & 0xff00) == 0xb000) /* add sp, #simm OR
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sub sp, #simm */
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{
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if ((findmask & 1) == 0) /* before push ? */
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if ((findmask & 1) == 0) /* before push ? */
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continue;
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else
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findmask |= 4; /* add/sub sp found */
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findmask |= 4; /* add/sub sp found */
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}
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else if ((insn & 0xff00) == 0xaf00) /* add r7, sp, #imm */
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{
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findmask |= 2; /* setting of r7 found */
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findmask |= 2; /* setting of r7 found */
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}
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else if (insn == 0x466f) /* mov r7, sp */
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{
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findmask |= 2; /* setting of r7 found */
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findmask |= 2; /* setting of r7 found */
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}
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else if (findmask == (4+2+1))
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{
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@ -388,9 +388,9 @@ thumb_skip_prologue (CORE_ADDR pc, CORE_ADDR func_end)
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break;
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}
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else
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/* something in the prolog that we don't care about or some
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/* Something in the prolog that we don't care about or some
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instruction from outside the prolog scheduled here for
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optimization */
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optimization. */
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continue;
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}
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@ -431,7 +431,7 @@ arm_skip_prologue (CORE_ADDR pc)
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sym = lookup_symbol (func_name, NULL, VAR_NAMESPACE, NULL, NULL);
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if (sym && SYMBOL_LANGUAGE (sym) != language_asm)
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{
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/* Don't use this trick for assembly source files. */
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/* Don't use this trick for assembly source files. */
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sal = find_pc_line (func_addr, 0);
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if ((sal.line != 0) && (sal.end < func_end))
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return sal.end;
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@ -443,18 +443,18 @@ arm_skip_prologue (CORE_ADDR pc)
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return thumb_skip_prologue (pc, func_end);
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/* Can't find the prologue end in the symbol table, try it the hard way
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by disassembling the instructions. */
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by disassembling the instructions. */
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skip_pc = pc;
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inst = read_memory_integer (skip_pc, 4);
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/* "mov ip, sp" is no longer a required part of the prologue. */
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if (inst == 0xe1a0c00d) /* mov ip, sp */
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if (inst == 0xe1a0c00d) /* mov ip, sp */
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{
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skip_pc += 4;
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inst = read_memory_integer (skip_pc, 4);
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}
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/* Some prologues begin with "str lr, [sp, #-4]!". */
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if (inst == 0xe52de004) /* str lr, [sp, #-4]! */
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if (inst == 0xe52de004) /* str lr, [sp, #-4]! */
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{
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skip_pc += 4;
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inst = read_memory_integer (skip_pc, 4);
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@ -474,7 +474,7 @@ arm_skip_prologue (CORE_ADDR pc)
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/* Any insns after this point may float into the code, if it makes
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for better instruction scheduling, so we skip them only if we
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find them, but still consdier the function to be frame-ful. */
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find them, but still consider the function to be frame-ful. */
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/* We may have either one sfmfd instruction here, or several stfe
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insns, depending on the version of floating point code we
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@ -505,7 +505,7 @@ arm_skip_prologue (CORE_ADDR pc)
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inst = read_memory_integer (skip_pc, 4);
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}
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while ((inst & 0xffffcfc0) == 0xe50b0000) /* str r(0123), [r11, #-nn] */
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while ((inst & 0xffffcfc0) == 0xe50b0000) /* str r(0123), [r11, #-nn] */
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{
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skip_pc += 4;
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inst = read_memory_integer (skip_pc, 4);
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@ -513,6 +513,7 @@ arm_skip_prologue (CORE_ADDR pc)
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return skip_pc;
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}
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/* *INDENT-OFF* */
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/* Function: thumb_scan_prologue (helper function for arm_scan_prologue)
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This function decodes a Thumb function prologue to determine:
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@ -542,7 +543,7 @@ thumb_scan_prologue (struct frame_info *fi)
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CORE_ADDR prologue_start;
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CORE_ADDR prologue_end;
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CORE_ADDR current_pc;
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/* Which register has been copied to register n? */
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/* Which register has been copied to register n? */
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int saved_reg[16];
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/* findmask:
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bit 0 - push { rlist }
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@ -556,10 +557,10 @@ thumb_scan_prologue (struct frame_info *fi)
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{
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struct symtab_and_line sal = find_pc_line (prologue_start, 0);
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if (sal.line == 0) /* no line info, use current PC */
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if (sal.line == 0) /* no line info, use current PC */
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prologue_end = fi->pc;
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else if (sal.end < prologue_end) /* next line begins after fn end */
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prologue_end = sal.end; /* (probably means no prologue) */
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prologue_end = sal.end; /* (probably means no prologue) */
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}
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else
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/* We're in the boondocks: allow for
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@ -591,7 +592,7 @@ thumb_scan_prologue (struct frame_info *fi)
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if ((insn & 0xfe00) == 0xb400) /* push { rlist } */
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{
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int mask;
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findmask |= 1; /* push found */
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findmask |= 1; /* push found */
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/* Bits 0-7 contain a mask for registers R0-R7. Bit 8 says
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whether to save LR (R14). */
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mask = (insn & 0xff) | ((insn & 0x100) << 6);
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@ -610,13 +611,13 @@ thumb_scan_prologue (struct frame_info *fi)
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else if ((insn & 0xff00) == 0xb000) /* add sp, #simm OR
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sub sp, #simm */
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{
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if ((findmask & 1) == 0) /* before push ? */
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if ((findmask & 1) == 0) /* before push? */
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continue;
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else
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findmask |= 4; /* add/sub sp found */
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findmask |= 4; /* add/sub sp found */
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offset = (insn & 0x7f) << 2; /* get scaled offset */
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if (insn & 0x80) /* is it signed? (==subtracting) */
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offset = (insn & 0x7f) << 2; /* get scaled offset */
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if (insn & 0x80) /* is it signed? (==subtracting) */
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{
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fi->extra_info->frameoffset += offset;
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offset = -offset;
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@ -625,14 +626,14 @@ thumb_scan_prologue (struct frame_info *fi)
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}
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else if ((insn & 0xff00) == 0xaf00) /* add r7, sp, #imm */
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{
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findmask |= 2; /* setting of r7 found */
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findmask |= 2; /* setting of r7 found */
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fi->extra_info->framereg = THUMB_FP_REGNUM;
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/* get scaled offset */
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fi->extra_info->frameoffset = (insn & 0xff) << 2;
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}
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else if (insn == 0x466f) /* mov r7, sp */
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{
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findmask |= 2; /* setting of r7 found */
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findmask |= 2; /* setting of r7 found */
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fi->extra_info->framereg = THUMB_FP_REGNUM;
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fi->extra_info->frameoffset = 0;
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saved_reg[THUMB_FP_REGNUM] = ARM_SP_REGNUM;
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@ -641,7 +642,7 @@ thumb_scan_prologue (struct frame_info *fi)
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{
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int lo_reg = insn & 7; /* dest. register (r0-r7) */
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int hi_reg = ((insn >> 3) & 7) + 8; /* source register (r8-15) */
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saved_reg[lo_reg] = hi_reg; /* remember hi reg was saved */
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saved_reg[lo_reg] = hi_reg; /* remember hi reg was saved */
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}
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else
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/* Something in the prolog that we don't care about or some
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@ -779,7 +780,7 @@ arm_scan_prologue (struct frame_info *fi)
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LONGEST return_value;
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CORE_ADDR prologue_start, prologue_end, current_pc;
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/* Check if this function is already in the cache of frame information. */
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/* Check if this function is already in the cache of frame information. */
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if (check_prologue_cache (fi))
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return;
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@ -830,23 +831,23 @@ arm_scan_prologue (struct frame_info *fi)
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is a suitable endpoint since it accounts for the largest
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possible prologue plus up to five instructions inserted by
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the scheduler. */
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the scheduler. */
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if (prologue_end > prologue_start + 64)
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{
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prologue_end = prologue_start + 64; /* See above. */
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prologue_end = prologue_start + 64; /* See above. */
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}
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}
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else
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{
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/* Get address of the stmfd in the prologue of the callee; the saved
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PC is the address of the stmfd + 8. */
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/* Get address of the stmfd in the prologue of the callee;
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the saved PC is the address of the stmfd + 8. */
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if (!safe_read_memory_integer (fi->frame, 4, &return_value))
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return;
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else
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{
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prologue_start = ADDR_BITS_REMOVE (return_value) - 8;
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prologue_end = prologue_start + 64; /* See above. */
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prologue_end = prologue_start + 64; /* See above. */
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}
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}
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@ -873,17 +874,17 @@ arm_scan_prologue (struct frame_info *fi)
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sp_offset = fp_offset = 0;
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for (current_pc = prologue_start;
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current_pc < prologue_end;
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for (current_pc = prologue_start;
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current_pc < prologue_end;
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current_pc += 4)
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{
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unsigned int insn = read_memory_unsigned_integer (current_pc, 4);
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if (insn == 0xe1a0c00d) /* mov ip, sp */
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if (insn == 0xe1a0c00d) /* mov ip, sp */
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{
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continue;
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}
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else if (insn == 0xe52de004) /* str lr, [sp, #-4]! */
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else if (insn == 0xe52de004) /* str lr, [sp, #-4]! */
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{
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/* Function is frameless: extra_info defaults OK? */
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continue;
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@ -895,7 +896,7 @@ arm_scan_prologue (struct frame_info *fi)
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{
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int mask = insn & 0xffff;
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/* Calculate offsets of saved registers. */
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/* Calculate offsets of saved registers. */
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for (regno = ARM_PC_REGNUM; regno >= 0; regno--)
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if (mask & (1 << regno))
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{
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@ -903,23 +904,23 @@ arm_scan_prologue (struct frame_info *fi)
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fi->saved_regs[regno] = sp_offset;
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}
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}
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else if ((insn & 0xffffcfc0) == 0xe50b0000) /* str rx, [r11, -n] */
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else if ((insn & 0xffffcfc0) == 0xe50b0000) /* str rx, [r11, -n] */
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{
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/* No need to add this to saved_regs -- it's just an arg reg. */
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continue;
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}
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else if ((insn & 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */
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{
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unsigned imm = insn & 0xff; /* immediate value */
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unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */
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unsigned imm = insn & 0xff; /* immediate value */
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unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */
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imm = (imm >> rot) | (imm << (32 - rot));
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fp_offset = -imm;
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fi->extra_info->framereg = ARM_FP_REGNUM;
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}
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else if ((insn & 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */
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{
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unsigned imm = insn & 0xff; /* immediate value */
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unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */
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unsigned imm = insn & 0xff; /* immediate value */
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unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */
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imm = (imm >> rot) | (imm << (32 - rot));
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sp_offset -= imm;
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}
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@ -934,7 +935,7 @@ arm_scan_prologue (struct frame_info *fi)
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int n_saved_fp_regs;
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unsigned int fp_start_reg, fp_bound_reg;
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if ((insn & 0x800) == 0x800) /* N0 is set */
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if ((insn & 0x800) == 0x800) /* N0 is set */
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{
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if ((insn & 0x40000) == 0x40000) /* N1 is set */
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n_saved_fp_regs = 3;
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@ -958,18 +959,18 @@ arm_scan_prologue (struct frame_info *fi)
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}
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}
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else if ((insn & 0xf0000000) != 0xe0000000)
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break; /* Condition not true, exit early */
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break; /* Condition not true, exit early */
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else if ((insn & 0xfe200000) == 0xe8200000) /* ldm? */
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break; /* Don't scan past a block load */
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break; /* Don't scan past a block load */
|
||||
else
|
||||
/* The optimizer might shove anything into the prologue,
|
||||
so we just skip what we don't recognize. */
|
||||
so we just skip what we don't recognize. */
|
||||
continue;
|
||||
}
|
||||
|
||||
/* The frame size is just the negative of the offset (from the original SP)
|
||||
of the last thing thing we pushed on the stack. The frame offset is
|
||||
[new FP] - [new SP]. */
|
||||
/* The frame size is just the negative of the offset (from the
|
||||
original SP) of the last thing thing we pushed on the stack.
|
||||
The frame offset is [new FP] - [new SP]. */
|
||||
fi->extra_info->framesize = -sp_offset;
|
||||
if (fi->extra_info->framereg == ARM_FP_REGNUM)
|
||||
fi->extra_info->frameoffset = fp_offset - sp_offset;
|
||||
|
|
@ -1013,15 +1014,15 @@ arm_frame_chain (struct frame_info *fi)
|
|||
#if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
|
||||
CORE_ADDR fn_start, callers_pc, fp;
|
||||
|
||||
/* is this a dummy frame? */
|
||||
/* Is this a dummy frame? */
|
||||
if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
|
||||
return fi->frame; /* dummy frame same as caller's frame */
|
||||
|
||||
/* is caller-of-this a dummy frame? */
|
||||
/* Is caller-of-this a dummy frame? */
|
||||
callers_pc = FRAME_SAVED_PC (fi); /* find out who called us: */
|
||||
fp = arm_find_callers_reg (fi, ARM_FP_REGNUM);
|
||||
if (PC_IN_CALL_DUMMY (callers_pc, fp, fp))
|
||||
return fp; /* dummy frame's frame may bear no relation to ours */
|
||||
return fp; /* dummy frame's frame may bear no relation to ours */
|
||||
|
||||
if (find_pc_partial_function (fi->pc, 0, &fn_start, 0))
|
||||
if (fn_start == entry_point_address ())
|
||||
|
|
@ -1042,7 +1043,7 @@ arm_frame_chain (struct frame_info *fi)
|
|||
/* If the caller is Thumb and the caller is ARM, or vice versa,
|
||||
the frame register of the caller is different from ours.
|
||||
So we must scan the prologue of the caller to determine its
|
||||
frame register number. */
|
||||
frame register number. */
|
||||
/* XXX Fixme, we should try to do this without creating a temporary
|
||||
caller_fi. */
|
||||
if (arm_pc_is_thumb (caller_pc) != arm_pc_is_thumb (fi->pc))
|
||||
|
|
@ -1148,7 +1149,7 @@ arm_init_extra_frame_info (int fromleaf, struct frame_info *fi)
|
|||
for (reg = 0; reg < NUM_REGS; reg++)
|
||||
fi->saved_regs[reg] = SIGCONTEXT_REGISTER_ADDRESS (sp, fi->pc, reg);
|
||||
|
||||
/* FIXME: What about thumb mode? */
|
||||
/* FIXME: What about thumb mode? */
|
||||
fi->extra_info->framereg = ARM_SP_REGNUM;
|
||||
fi->frame =
|
||||
read_memory_integer (fi->saved_regs[fi->extra_info->framereg],
|
||||
|
|
@ -1185,20 +1186,20 @@ arm_init_extra_frame_info (int fromleaf, struct frame_info *fi)
|
|||
arm_scan_prologue (fi);
|
||||
|
||||
if (!fi->next)
|
||||
/* this is the innermost frame? */
|
||||
/* This is the innermost frame? */
|
||||
fi->frame = read_register (fi->extra_info->framereg);
|
||||
else if (fi->extra_info->framereg == ARM_FP_REGNUM
|
||||
|| fi->extra_info->framereg == THUMB_FP_REGNUM)
|
||||
{
|
||||
/* not the innermost frame */
|
||||
/* If we have an FP, the callee saved it. */
|
||||
/* If we have an FP, the callee saved it. */
|
||||
if (fi->next->saved_regs[fi->extra_info->framereg] != 0)
|
||||
fi->frame =
|
||||
read_memory_integer (fi->next
|
||||
->saved_regs[fi->extra_info->framereg], 4);
|
||||
else if (fromleaf)
|
||||
/* If we were called by a frameless fn. then our frame is
|
||||
still in the frame pointer register on the board... */
|
||||
still in the frame pointer register on the board... */
|
||||
fi->frame = read_fp ();
|
||||
}
|
||||
|
||||
|
|
@ -1364,7 +1365,7 @@ arm_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
|
|||
};
|
||||
static unsigned long arm_bx_r4 = 0xe12fff14; /* bx r4 instruction */
|
||||
|
||||
/* Set flag indicating whether the current PC is in a Thumb function. */
|
||||
/* Set flag indicating whether the current PC is in a Thumb function. */
|
||||
caller_is_thumb = arm_pc_is_thumb (read_pc ());
|
||||
arm_set_call_dummy_breakpoint_offset ();
|
||||
|
||||
|
|
@ -1397,7 +1398,7 @@ arm_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
|
|||
}
|
||||
|
||||
/* Put the target address in r4; the call dummy will copy this to
|
||||
the PC. */
|
||||
the PC. */
|
||||
write_register (4, fun);
|
||||
}
|
||||
|
||||
|
|
@ -1418,7 +1419,7 @@ arm_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
|
|||
stack is required. Need to take care here as structs may be
|
||||
passed on the stack, and we have to to push them. */
|
||||
nstack_size = -4 * REGISTER_SIZE; /* Some arguments go into A1-A4. */
|
||||
if (struct_return) /* The struct address goes in A1. */
|
||||
if (struct_return) /* The struct address goes in A1. */
|
||||
nstack_size += REGISTER_SIZE;
|
||||
|
||||
/* Walk through the arguments and add their size to nstack_size. */
|
||||
|
|
@ -1470,7 +1471,7 @@ arm_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
|
|||
#if 1
|
||||
/* I don't know why this code was disable. The only logical use
|
||||
for a function pointer is to call that function, so setting
|
||||
the mode bit is perfectly fine. FN */
|
||||
the mode bit is perfectly fine. FN */
|
||||
/* If the argument is a pointer to a function, and it is a Thumb
|
||||
function, set the low bit of the pointer. */
|
||||
if (TYPE_CODE_PTR == typecode
|
||||
|
|
@ -1779,7 +1780,7 @@ thumb_get_next_pc (CORE_ADDR pc)
|
|||
{
|
||||
unsigned long pc_val = ((unsigned long) pc) + 4; /* PC after prefetch */
|
||||
unsigned short inst1 = read_memory_integer (pc, 2);
|
||||
CORE_ADDR nextpc = pc + 2; /* default is next instruction */
|
||||
CORE_ADDR nextpc = pc + 2; /* default is next instruction */
|
||||
unsigned long offset;
|
||||
|
||||
if ((inst1 & 0xff00) == 0xbd00) /* pop {rlist, pc} */
|
||||
|
|
@ -1799,7 +1800,7 @@ thumb_get_next_pc (CORE_ADDR pc)
|
|||
{
|
||||
unsigned long status = read_register (ARM_PS_REGNUM);
|
||||
unsigned long cond = bits (inst1, 8, 11);
|
||||
if (cond != 0x0f && condition_true (cond, status)) /* 0x0f = SWI */
|
||||
if (cond != 0x0f && condition_true (cond, status)) /* 0x0f = SWI */
|
||||
nextpc = pc_val + (sbits (inst1, 0, 7) << 1);
|
||||
}
|
||||
else if ((inst1 & 0xf800) == 0xe000) /* unconditional branch */
|
||||
|
|
@ -1837,7 +1838,7 @@ arm_get_next_pc (CORE_ADDR pc)
|
|||
switch (bits (this_instr, 24, 27))
|
||||
{
|
||||
case 0x0:
|
||||
case 0x1: /* data processing */
|
||||
case 0x1: /* data processing */
|
||||
case 0x2:
|
||||
case 0x3:
|
||||
{
|
||||
|
|
@ -2043,13 +2044,13 @@ arm_get_next_pc (CORE_ADDR pc)
|
|||
single-step support. We find the target of the coming instruction
|
||||
and breakpoint it.
|
||||
|
||||
single_step is also called just after the inferior stops. If we had
|
||||
set up a simulated single-step, we undo our damage. */
|
||||
single_step() is also called just after the inferior stops. If we
|
||||
had set up a simulated single-step, we undo our damage. */
|
||||
|
||||
static void
|
||||
arm_software_single_step (enum target_signal sig, int insert_bpt)
|
||||
{
|
||||
static int next_pc; /* State between setting and unsetting. */
|
||||
static int next_pc; /* State between setting and unsetting. */
|
||||
static char break_mem[BREAKPOINT_MAX]; /* Temporary storage for mem@bpt */
|
||||
|
||||
if (insert_bpt)
|
||||
|
|
@ -2165,7 +2166,7 @@ static const char arm_default_thumb_be_breakpoint[] = THUMB_BE_BREAKPOINT;
|
|||
/* XXX ??? from old tm-arm.h: if we're using RDP, then we're inserting
|
||||
breakpoints and storing their handles instread of what was in
|
||||
memory. It is nice that this is the same size as a handle -
|
||||
otherwise remote-rdp will have to change. */
|
||||
otherwise remote-rdp will have to change. */
|
||||
|
||||
static const unsigned char *
|
||||
arm_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
|
||||
|
|
@ -2363,7 +2364,7 @@ arm_store_return_value (struct type *type, char *valbuf)
|
|||
}
|
||||
|
||||
/* Store the address of the place in which to copy the structure the
|
||||
subroutine will return. This is called from call_function. */
|
||||
subroutine will return. This is called from call_function. */
|
||||
|
||||
static void
|
||||
arm_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
|
||||
|
|
@ -2397,7 +2398,8 @@ arm_in_call_stub (CORE_ADDR pc, char *name)
|
|||
|
||||
/* Find the starting address of the function containing the PC. If
|
||||
the caller didn't give us a name, look it up at the same time. */
|
||||
if (find_pc_partial_function (pc, name ? NULL : &name, &start_addr, NULL) == 0)
|
||||
if (0 == find_pc_partial_function (pc, name ? NULL : &name,
|
||||
&start_addr, NULL))
|
||||
return 0;
|
||||
|
||||
return strncmp (name, "_call_via_r", 11) == 0;
|
||||
|
|
@ -2440,7 +2442,7 @@ arm_skip_stub (CORE_ADDR pc)
|
|||
/* If the user changes the register disassembly flavor used for info
|
||||
register and other commands, we have to also switch the flavor used
|
||||
in opcodes for disassembly output. This function is run in the set
|
||||
disassembly_flavor command, and does that. */
|
||||
disassembly_flavor command, and does that. */
|
||||
|
||||
static void
|
||||
set_disassembly_flavor_sfunc (char *args, int from_tty,
|
||||
|
|
@ -2462,7 +2464,7 @@ set_disassembly_flavor (void)
|
|||
const char *setname, *setdesc, **regnames;
|
||||
int numregs, j;
|
||||
|
||||
/* Find the flavor that the user wants in the opcodes table. */
|
||||
/* Find the flavor that the user wants in the opcodes table. */
|
||||
int current = 0;
|
||||
numregs = get_arm_regnames (current, &setname, &setdesc, ®names);
|
||||
while ((disassembly_flavor != setname)
|
||||
|
|
@ -2470,11 +2472,11 @@ set_disassembly_flavor (void)
|
|||
get_arm_regnames (++current, &setname, &setdesc, ®names);
|
||||
current_option = current;
|
||||
|
||||
/* Fill our copy. */
|
||||
/* Fill our copy. */
|
||||
for (j = 0; j < numregs; j++)
|
||||
arm_register_names[j] = (char *) regnames[j];
|
||||
|
||||
/* Adjust case. */
|
||||
/* Adjust case. */
|
||||
if (isupper (*regnames[ARM_PC_REGNUM]))
|
||||
{
|
||||
arm_register_names[ARM_FPS_REGNUM] = "FPS";
|
||||
|
|
@ -2486,23 +2488,23 @@ set_disassembly_flavor (void)
|
|||
arm_register_names[ARM_PS_REGNUM] = "cpsr";
|
||||
}
|
||||
|
||||
/* Synchronize the disassembler. */
|
||||
/* Synchronize the disassembler. */
|
||||
set_arm_regname_option (current);
|
||||
}
|
||||
|
||||
/* arm_othernames implements the "othernames" command. This is kind
|
||||
of hacky, and I prefer the set-show disassembly-flavor which is
|
||||
also used for the x86 gdb. I will keep this around, however, in
|
||||
case anyone is actually using it. */
|
||||
case anyone is actually using it. */
|
||||
|
||||
static void
|
||||
arm_othernames (char *names, int n)
|
||||
{
|
||||
/* Circle through the various flavors. */
|
||||
/* Circle through the various flavors. */
|
||||
current_option = (current_option + 1) % num_flavor_options;
|
||||
|
||||
disassembly_flavor = valid_flavors[current_option];
|
||||
set_disassembly_flavor ();
|
||||
set_disassembly_flavor ();
|
||||
}
|
||||
|
||||
/* Fetch, and possibly build, an appropriate link_map_offsets structure
|
||||
|
|
@ -2511,7 +2513,7 @@ arm_othernames (char *names, int n)
|
|||
Instead, the relevant structs offsets were obtained from examining
|
||||
link.h. (We can't refer to link.h from this file because the host
|
||||
system won't necessarily have it, or if it does, the structs which
|
||||
it defines will refer to the host system, not the target.) */
|
||||
it defines will refer to the host system, not the target). */
|
||||
|
||||
struct link_map_offsets *
|
||||
arm_linux_svr4_fetch_link_map_offsets (void)
|
||||
|
|
@ -2524,13 +2526,13 @@ arm_linux_svr4_fetch_link_map_offsets (void)
|
|||
lmp = &lmo;
|
||||
|
||||
lmo.r_debug_size = 8; /* Actual size is 20, but this is all we
|
||||
need. */
|
||||
need. */
|
||||
|
||||
lmo.r_map_offset = 4;
|
||||
lmo.r_map_size = 4;
|
||||
|
||||
lmo.link_map_size = 20; /* Actual size is 552, but this is all we
|
||||
need. */
|
||||
need. */
|
||||
|
||||
lmo.l_addr_offset = 0;
|
||||
lmo.l_addr_size = 4;
|
||||
|
|
@ -2889,7 +2891,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|||
|
||||
/* This should be low enough for everything. */
|
||||
tdep->lowest_pc = 0x20;
|
||||
tdep->jb_pc = -1; /* Longjump support not enabled by default. */
|
||||
tdep->jb_pc = -1; /* Longjump support not enabled by default. */
|
||||
|
||||
set_gdbarch_use_generic_dummy_frames (gdbarch, 0);
|
||||
|
||||
|
|
@ -2954,7 +2956,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|||
|
||||
/* Information about registers, etc. */
|
||||
set_gdbarch_print_float_info (gdbarch, arm_print_float_info);
|
||||
set_gdbarch_fp_regnum (gdbarch, ARM_FP_REGNUM); /* ??? */
|
||||
set_gdbarch_fp_regnum (gdbarch, ARM_FP_REGNUM); /* ??? */
|
||||
set_gdbarch_sp_regnum (gdbarch, ARM_SP_REGNUM);
|
||||
set_gdbarch_pc_regnum (gdbarch, ARM_PC_REGNUM);
|
||||
set_gdbarch_register_byte (gdbarch, arm_register_byte);
|
||||
|
|
@ -3142,18 +3144,18 @@ _initialize_arm_tdep (void)
|
|||
|
||||
tm_print_insn = gdb_print_insn_arm;
|
||||
|
||||
/* Get the number of possible sets of register names defined in opcodes. */
|
||||
/* Get the number of possible sets of register names defined in opcodes. */
|
||||
num_flavor_options = get_arm_regname_num_options ();
|
||||
|
||||
/* Sync the opcode insn printer with our register viewer: */
|
||||
/* Sync the opcode insn printer with our register viewer. */
|
||||
parse_arm_disassembler_option ("reg-names-std");
|
||||
|
||||
/* Begin creating the help text. */
|
||||
/* Begin creating the help text. */
|
||||
stb = mem_fileopen ();
|
||||
fprintf_unfiltered (stb, "Set the disassembly flavor.\n\
|
||||
The valid values are:\n");
|
||||
|
||||
/* Initialize the array that will be passed to add_set_enum_cmd(). */
|
||||
/* Initialize the array that will be passed to add_set_enum_cmd(). */
|
||||
valid_flavors = xmalloc ((num_flavor_options + 1) * sizeof (char *));
|
||||
for (i = 0; i < num_flavor_options; i++)
|
||||
{
|
||||
|
|
@ -3161,7 +3163,7 @@ The valid values are:\n");
|
|||
valid_flavors[i] = setname;
|
||||
fprintf_unfiltered (stb, "%s - %s\n", setname,
|
||||
setdesc);
|
||||
/* Copy the default names (if found) and synchronize disassembler. */
|
||||
/* Copy the default names (if found) and synchronize disassembler. */
|
||||
if (!strcmp (setname, "std"))
|
||||
{
|
||||
disassembly_flavor = setname;
|
||||
|
|
@ -3171,15 +3173,15 @@ The valid values are:\n");
|
|||
set_arm_regname_option (i);
|
||||
}
|
||||
}
|
||||
/* Mark the end of valid options. */
|
||||
/* Mark the end of valid options. */
|
||||
valid_flavors[num_flavor_options] = NULL;
|
||||
|
||||
/* Finish the creation of the help text. */
|
||||
/* Finish the creation of the help text. */
|
||||
fprintf_unfiltered (stb, "The default is \"std\".");
|
||||
helptext = ui_file_xstrdup (stb, &length);
|
||||
ui_file_delete (stb);
|
||||
|
||||
/* Add the disassembly-flavor command */
|
||||
/* Add the disassembly-flavor command. */
|
||||
new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
|
||||
valid_flavors,
|
||||
&disassembly_flavor,
|
||||
|
|
@ -3194,7 +3196,7 @@ The valid values are:\n");
|
|||
"Set usage of ARM 32-bit mode.\n", &setlist),
|
||||
&showlist);
|
||||
|
||||
/* Add the deprecated "othernames" command */
|
||||
/* Add the deprecated "othernames" command. */
|
||||
|
||||
add_com ("othernames", class_obscure, arm_othernames,
|
||||
"Switch to the next set of register names.");
|
||||
|
|
|
|||
Loading…
Reference in New Issue