include/opcode/
* ppc.h (PPC_OPCODE_POWER6): Define. Adjust whitespace. gas/ * config/tc-ppc.c (parse_cpu): Handle "-mpower6". (md_show_usage): Document it. (ppc_setup_opcodes): Test power6 opcode flag bits. * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6". opcodes/ * ppc-dis.c (powerpc_dialect): Handle power6 option. (print_ppc_disassembler_options): Mention power6.
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@ -1,3 +1,11 @@
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2006-06-06 Ben Elliston <bje@au.ibm.com>
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Anton Blanchard <anton@samba.org>
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* config/tc-ppc.c (parse_cpu): Handle "-mpower6".
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(md_show_usage): Document it.
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(ppc_setup_opcodes): Test power6 opcode flag bits.
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* doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
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2006-06-06 Thiemo Seufer <ths@mips.com>
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Chao-ying Fu <fu@mips.com>
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@ -1,6 +1,6 @@
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/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
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Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
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2004, 2005 Free Software Foundation, Inc.
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2004, 2005, 2006 Free Software Foundation, Inc.
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Written by Ian Lance Taylor, Cygnus Support.
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This file is part of GAS, the GNU Assembler.
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@ -917,6 +917,12 @@ parse_cpu (const char *arg)
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| PPC_OPCODE_64 | PPC_OPCODE_POWER4
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| PPC_OPCODE_POWER5);
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}
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else if (strcmp (arg, "power6") == 0)
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{
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ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
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| PPC_OPCODE_64 | PPC_OPCODE_POWER4
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| PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
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}
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/* -mcom means assemble for the common intersection between Power
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and PowerPC. At present, we just allow the union, rather
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than the intersection. */
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@ -1112,6 +1118,7 @@ PowerPC options:\n\
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-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
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-mpower4 generate code for Power4 architecture\n\
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-mpower5 generate code for Power5 architecture\n\
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-mpower6 generate code for Power6 architecture\n\
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-mcom generate code Power/PowerPC common instructions\n\
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-many generate code for any architecture (PWR/PWRX/PPC)\n"));
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fprintf (stream, _("\
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@ -1270,7 +1277,10 @@ ppc_setup_opcodes (void)
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== (ppc_cpu & PPC_OPCODE_POWER4)))
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&& ((op->flags & PPC_OPCODE_POWER5) == 0
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|| ((op->flags & PPC_OPCODE_POWER5)
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== (ppc_cpu & PPC_OPCODE_POWER5))))
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== (ppc_cpu & PPC_OPCODE_POWER5)))
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&& ((op->flags & PPC_OPCODE_POWER6) == 0
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|| ((op->flags & PPC_OPCODE_POWER6)
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== (ppc_cpu & PPC_OPCODE_POWER6))))
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{
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const char *retval;
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@ -1,4 +1,4 @@
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@c Copyright 2001, 2002, 2003, 2005
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@c Copyright 2001, 2002, 2003, 2005, 2006
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@c Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ -79,6 +79,9 @@ Generate code for Power4 architecture.
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@item -mpower5
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Generate code for Power5 architecture.
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@item -mpower6
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Generate code for Power6 architecture.
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@item -mcom
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Generate code Power/PowerPC common instructions.
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@ -1,3 +1,9 @@
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2006-06-06 Ben Elliston <bje@au.ibm.com>
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Anton Blanchard <anton@samba.org>
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* ppc.h (PPC_OPCODE_POWER6): Define.
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Adjust whitespace.
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2006-06-05 Thiemo Seufer <ths@mips.com>
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* mips.h: Improve description of MT flags.
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@ -1,5 +1,5 @@
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/* ppc.h -- Header file for PowerPC opcode table
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Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005
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Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
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Free Software Foundation, Inc.
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Written by Ian Lance Taylor, Cygnus Support
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@ -135,10 +135,14 @@ extern const int powerpc_num_opcodes;
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#define PPC_OPCODE_RFMCI 0x800000
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/* Opcode is only supported by Power5 architecture. */
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#define PPC_OPCODE_POWER5 0x1000000
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#define PPC_OPCODE_POWER5 0x1000000
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/* Opcode is supported by PowerPC e300 family. */
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#define PPC_OPCODE_E300 0x2000000
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#define PPC_OPCODE_E300 0x2000000
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/* Opcode is only supported by Power6 architecture. */
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#define PPC_OPCODE_POWER6 0x4000000
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/* A macro to extract the major opcode from an instruction. */
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#define PPC_OP(i) (((i) >> 26) & 0x3f)
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@ -1,3 +1,10 @@
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2006-06-06 Ben Elliston <bje@au.ibm.com>
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Anton Blanchard <anton@samba.org>
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Peter Bergner <bergner@vnet.ibm.com>
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* ppc-dis.c (powerpc_dialect): Handle power6 option.
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(print_ppc_disassembler_options): Mention power6.
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2006-06-06 Thiemo Seufer <ths@mips.com>
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Chao-ying Fu <fu@mips.com>
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@ -1,5 +1,5 @@
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/* ppc-dis.c -- Disassemble PowerPC instructions
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Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005
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Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006
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Free Software Foundation, Inc.
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Written by Ian Lance Taylor, Cygnus Support
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@ -73,6 +73,10 @@ powerpc_dialect (struct disassemble_info *info)
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&& strstr (info->disassembler_options, "power5") != NULL)
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dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;
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if (info->disassembler_options
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&& strstr (info->disassembler_options, "power6") != NULL)
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dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;
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if (info->disassembler_options
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&& strstr (info->disassembler_options, "any") != NULL)
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dialect |= PPC_OPCODE_ANY;
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@ -306,6 +310,7 @@ the -M switch:\n");
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fprintf (stream, " efs Disassemble the EFS instructions\n");
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fprintf (stream, " power4 Disassemble the Power4 instructions\n");
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fprintf (stream, " power5 Disassemble the Power5 instructions\n");
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fprintf (stream, " power6 Disassemble the Power6 instructions\n");
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fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
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fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");
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}
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