* gdbint.texinfo (Algorithms): New section "Watchpoints" and new
subsection "x86 Watchpoints". (Target Architecture Definition): Document I386_USE_GENERIC_WATCHPOINTS and TARGET_HAS_HARDWARE_WATCHPOINTS. (Native Debugging): Document I386_USE_GENERIC_WATCHPOINTS.
This commit is contained in:
Eli Zaretskii
parent
52b9821179
commit
9742079a31
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@ -1,3 +1,11 @@
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2001-03-21 Eli Zaretskii <eliz@is.elta.co.il>
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* gdbint.texinfo (Algorithms): New section "Watchpoints" and new
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subsection "x86 Watchpoints".
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(Target Architecture Definition): Document the macros
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I386_USE_GENERIC_WATCHPOINTS and TARGET_HAS_HARDWARE_WATCHPOINTS.
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(Native Debugging): Document I386_USE_GENERIC_WATCHPOINTS.
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2001-03-20 Andrew Cagney <ac131313@redhat.com>
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* gdbint.texinfo (Target Architecture Definition): Update
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@ -1,4 +1,4 @@
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\input texinfo
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\input texinfo @c -*- texinfo -*-
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@setfilename gdbint.info
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@include gdb-cfg.texi
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@ifinfo
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@ -292,7 +292,11 @@ for something to happen.
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Since they depend on hardware resources, hardware breakpoints may be
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limited in number; when the user asks for more, @value{GDBN} will
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start trying to set software breakpoints.
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start trying to set software breakpoints. (On some architectures,
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notably the 32-bit x86 platforms, @value{GDBN} cannot alsways know
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whether there's enough hardware resources to insert all the hardware
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breakpoints and watchpoints. On those platforms, @value{GDBN} prints
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an error message only when the program being debugged is continued.)
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@cindex software breakpoints
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Software breakpoints require @value{GDBN} to do somewhat more work.
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@ -351,6 +355,357 @@ is target specific, you will need to define it in the appropriate
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@file{tm-@var{target}.h} file. Look in @file{tm-sun4os4.h} and
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@file{sparc-tdep.c} for examples of how to do this.
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@section Watchpoints
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@cindex watchpoints
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Watchpoints are a special kind of breakpoints (@pxref{Algorithms,
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breakpoints}) which break when data is accessed rather than when some
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instruction is executed. When you have data which changes without
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your knowing what code does that, watchpoints are the silver bullet to
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hunt down and kill such bugs.
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@cindex hardware watchpoints
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@cindex software watchpoints
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Watchpoints can be either hardware-assisted or not; the latter type is
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known as ``software watchpoints.'' @value{GDBN} always uses
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hardware-assisted watchpoints if they are available, and falls back on
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software watchpoints otherwise. Typical situations where @value{GDBN}
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will use software watchpoints are:
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@itemize @bullet
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@item
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The watched memory region is too large for the underlying hardware
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watchpoint support. For example, each x86 debug register can watch up
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to 4 bytes of memory, so trying to watch data structures whose size is
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more than 16 bytes will cause @value{GDBN} to use software
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watchpoints.
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@item
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The value of the expression to be watched depends on data held in
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registers (as opposed to memory).
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@item
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Too many different watchpoints requested. (On some architectures,
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this situation is impossible to detect until the debugged program is
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resumed.) Note that x86 debug registers are used both for hardware
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breakpoints and for watchpoints, so setting too many hardware
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breakpoints might cause watchpoint insertion to fail.
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@item
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No hardware-assisted watchpoints provided by the target
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implementation.
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@end itemize
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Software watchpoints are very slow, since @value{GDBN} needs to
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single-step the program being debugged and test the value of the
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watched expression(s) after each instruction. The rest of this
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section is mostly irrelevant for software watchpoints.
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@value{GDBN} uses several macros and primitives to support hardware
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watchpoints:
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@table @code
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@findex TARGET_HAS_HARDWARE_WATCHPOINTS
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@item TARGET_HAS_HARDWARE_WATCHPOINTS
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If defined, the target supports hardware watchpoints.
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@findex TARGET_CAN_USE_HARDWARE_WATCHPOINT
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@item TARGET_CAN_USE_HARDWARE_WATCHPOINT (@var{type}, @var{count}, @var{other})
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Return the number of hardware watchpoints of type @var{type} that are
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possible to be set. The value is positive if @var{count} watchpoints
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of this type can be set, zero if setting watchpoints of this type is
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not supported, and negative if @var{count} is more than the maximum
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number of watchpoints of type @var{type} that can be set. @var{other}
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is non-zero if other types of watchpoints are currently enabled (there
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are architectures which cannot set watchpoints of different types at
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the same time).
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@findex TARGET_REGION_OK_FOR_HW_WATCHPOINT
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@item TARGET_REGION_OK_FOR_HW_WATCHPOINT (@var{addr}, @var{len})
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Return non-zero if hardware watchpoints can be used to watch a region
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whose address is @var{addr} and whose length in bytes is @var{len}.
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@findex TARGET_REGION_SIZE_OK_FOR_HW_WATCHPOINT
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@item TARGET_REGION_SIZE_OK_FOR_HW_WATCHPOINT (@var{size})
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Return non-zero if hardware watchpoints can be used to watch a region
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whose size is @var{size}. @value{GDBN} only uses this macro as a
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fall-back, in case @code{TARGET_REGION_OK_FOR_HW_WATCHPOINT} is not
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defined.
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@findex TARGET_DISABLE_HW_WATCHPOINTS
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@item TARGET_DISABLE_HW_WATCHPOINTS (@var{pid})
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Disables watchpoints in the process identified by @var{pid}. This is
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used, e.g., on HP-UX which provides operations to disable and enable
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the page-level memory protection that implements hardware watchpoints
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on that platform.
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@findex TARGET_ENABLE_HW_WATCHPOINTS
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@item TARGET_ENABLE_HW_WATCHPOINTS (@var{pid})
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Enables watchpoints in the process identified by @var{pid}. This is
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used, e.g., on HP-UX which provides operations to disable and enable
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the page-level memory protection that implements hardware watchpoints
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on that platform.
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@findex TARGET_RANGE_PROFITABLE_FOR_HW_WATCHPOINT
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@item TARGET_RANGE_PROFITABLE_FOR_HW_WATCHPOINT (@var{pid},@var{start},@var{len})
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Some addresses may not be profitable to use hardware to watch, or may
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be difficult to understand when the addressed object is out of scope,
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and hence should not be watched with hardware watchpoints. On some
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targets, this may have severe performance penalties, such that we
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might as well use regular watchpoints, and save (possibly precious)
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hardware watchpoints for other locations.
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@findex target_insert_watchpoint
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@findex target_remove_watchpoint
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@item target_insert_watchpoint (@var{addr}, @var{len}, @var{type})
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@itemx target_remove_watchpoint (@var{addr}, @var{len}, @var{type})
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Insert or remove a hardware watchpoint starting at @var{addr}, for
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@var{len} bytes. @var{type} is the watchpoint type, one of the
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possible values of the enumerated data type @code{target_hw_bp_type},
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defined by @file{breakpoint.h} as follows:
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@example
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enum target_hw_bp_type
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@{
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hw_write = 0, /* Common (write) HW watchpoint */
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hw_read = 1, /* Read HW watchpoint */
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hw_access = 2, /* Access (read or write) HW watchpoint */
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hw_execute = 3 /* Execute HW breakpoint */
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@};
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@end example
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@noindent
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These two macros should return 0 for success, non-zero for failure.
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@cindex insert or remove hardware breakpoint
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@findex target_remove_hw_breakpoint
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@findex target_insert_hw_breakpoint
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@item target_remove_hw_breakpoint (@var{addr}, @var{shadow})
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@itemx target_insert_hw_breakpoint (@var{addr}, @var{shadow})
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Insert or remove a hardware-assisted breakpoint at address @var{addr}.
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Returns zero for success, non-zero for failure. @var{shadow} is the
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real contents of the byte where the breakpoint has been inserted; it
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is generally not valid when hardware breakpoints are used, but since
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no other code touches these values, the implementations of the above
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two macros can use them for their internal purposes.
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@findex target_stopped_data_address
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@item target_stopped_data_address ()
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If the inferior has some watchpoint that triggered, return the address
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associated with that watchpoint. Otherwise, return zero.
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@findex DECR_PC_AFTER_HW_BREAK
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@item DECR_PC_AFTER_HW_BREAK
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If defined, @value{GDBN} decrements the program counter by the value
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of @code{DECR_PC_AFTER_HW_BREAK} after a hardware break-point. This
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overrides the value of @code{DECR_PC_AFTER_BREAK} when a breakpoint
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that breaks is a hardware-assisted breakpoint.
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@findex HAVE_STEPPABLE_WATCHPOINT
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@item HAVE_STEPPABLE_WATCHPOINT
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If defined to a non-zero value, it is not necessary to disable a
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watchpoint to step over it.
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@findex HAVE_NONSTEPPABLE_WATCHPOINT
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@item HAVE_NONSTEPPABLE_WATCHPOINT
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If defined to a non-zero value, @value{GDBN} should disable a
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watchpoint to step the inferior over it.
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@findex HAVE_CONTINUABLE_WATCHPOINT
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@item HAVE_CONTINUABLE_WATCHPOINT
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If defined to a non-zero value, it is possible to continue the
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inferior after a watchpoint has been hit.
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@findex CANNOT_STEP_HW_WATCHPOINTS
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@item CANNOT_STEP_HW_WATCHPOINTS
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If this is defined to a non-zero value, @value{GDBN} will remove all
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watchpoints before stepping the inferior.
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@findex STOPPED_BY_WATCHPOINT
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@item STOPPED_BY_WATCHPOINT (@var{wait_status})
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Return non-zero if stopped by a watchpoint. @var{wait_status} is of
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the type @code{struct target_waitstatus}, defined by @file{target.h}.
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@end table
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@subsection x86 Watchpoints
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@cindex x86 debug registers
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@cindex watchpoints, on x86
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The 32-bit Intel x86 (a.k.a.@: ia32) processors feature special debug
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registers designed to facilitate debugging. @value{GDBN} provides a
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generic library of functions that x86-based ports can use to implement
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support for watchpoints and hardware-assisted breakpoints. This
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subsection documents the x86 watchpoint facilities in @value{GDBN}.
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To use the generic x86 watchpoint support, a port should do the
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following:
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@itemize @bullet
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@findex I386_USE_GENERIC_WATCHPOINTS
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@item
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Define the macro @code{I386_USE_GENERIC_WATCHPOINTS} somewhere in the
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target-dependent headers.
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@item
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Include the @file{config/i386/nm-i386.h} header file @emph{after}
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defining @code{I386_USE_GENERIC_WATCHPOINTS}.
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@item
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Add @file{i386-nat.o} to the value of the Make variable
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@code{NATDEPFILES} (@pxref{Native Debugging, NATDEPFILES}) or
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@code{TDEPFILES} (@pxref{Target Architecture Definition, TDEPFILES}).
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@item
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Provide implementations for the @code{I386_DR_LOW_*} macros described
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below. Typically, each macro should call a target-specific function
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which does the real work.
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@end itemize
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The x86 watchpoint support works by maintaining mirror images of the
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debug registers. Values are copied between the mirror images and the
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real debug registers via a set of macros which each target needs to
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provide:
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@table @code
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@findex I386_DR_LOW_SET_CONTROL
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@item I386_DR_LOW_SET_CONTROL (@var{val})
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Set the Debug Control (DR7) register to the value @var{val}.
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@findex I386_DR_LOW_SET_ADDR
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@item I386_DR_LOW_SET_ADDR (@var{idx}, @var{addr})
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Put the address @var{addr} into the debug register number @var{idx}.
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@findex I386_DR_LOW_RESET_ADDR
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@item I386_DR_LOW_RESET_ADDR (@var{idx})
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Reset (i.e.@: zero out) the address stored in the debug register
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number @var{idx}.
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@findex I386_DR_LOW_GET_STATUS
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@item I386_DR_LOW_GET_STATUS
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Return the value of the Debug Status (DR6) register. This value is
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used immediately after it is returned by
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@code{I386_DR_LOW_GET_STATUS}, so as to support per-thread status
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register values.
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@end table
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For each one of the 4 debug registers (whose indices are from 0 to 3)
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that store addresses, a reference count is maintained by @value{GDBN},
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to allow sharing of debug registers by several watchpoints. This
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allows users to define several watchpoints that watch the same
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expression, but with different conditions and/or commands, without
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wasting debug registers which are in short supply. @value{GDBN}
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maintains the reference counts internally, targets don't have to do
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anything to use this feature.
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The x86 debug registers can each watch a region that is 1, 2, or 4
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bytes long. The ia32 architecture requires that each watched region
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be appropriately aligned: 2-byte region on 2-byte boundary, 4-byte
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region on 4-byte boundary. However, the x86 watchpoint support in
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@value{GDBN} can watch unaligned regions and regions larger than 4
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bytes (up to 16 bytes) by allocating several debug registers to watch
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a single region. This allocation of several registers per a watched
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region is also done automatically without target code intervention.
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The generic x86 watchpoint support provides the following API for the
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@value{GDBN}'s application code:
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@table @code
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@findex i386_region_ok_for_watchpoint
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@item i386_region_ok_for_watchpoint (@var{addr}, @var{len})
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The macro @code{TARGET_REGION_OK_FOR_HW_WATCHPOINT} is set to call
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this function. It counts the number of debug registers required to
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watch a given region, and returns a non-zero value if that number is
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less than 4, the number of debug registers available to x86
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processors.
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@findex i386_stopped_data_address
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@item i386_stopped_data_address (void)
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The macros @code{STOPPED_BY_WATCHPOINT} and
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@code{target_stopped_data_address} are set to call this function. The
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argument passed to @code{STOPPED_BY_WATCHPOINT} is ignored. This
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function examines the breakpoint condition bits in the DR6 Debug
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Status register, as returned by the @code{I386_DR_LOW_GET_STATUS}
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macro, and returns the address associated with the first bit that is
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set in DR6.
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@findex i386_insert_watchpoint
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@findex i386_remove_watchpoint
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@item i386_insert_watchpoint (@var{addr}, @var{len}, @var{type})
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@itemx i386_remove_watchpoint (@var{addr}, @var{len}, @var{type})
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Insert or remove a watchpoint. The macros
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@code{target_insert_watchpoint} and @code{target_remove_watchpoint}
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are set to call these functions. @code{i386_insert_watchpoint} first
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looks for a debug register which is already set to watch the same
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region for the same access types; if found, it just increments the
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reference count of that debug register, thus implementing debug
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register sharing between watchpoints. If no such register is found,
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the function looks for a vacant debug register, sets its mirrorred
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value to @var{addr}, sets the mirrorred value of DR7 Debug Control
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register as appropriate for the @var{len} and @var{type} parameters,
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and then passes the new values of the debug register and DR7 to the
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inferior by calling @code{I386_DR_LOW_SET_ADDR} and
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@code{I386_DR_LOW_SET_CONTROL}. If more than one debug register is
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required to cover the given region, the above process is repeated for
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each debug register.
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@code{i386_remove_watchpoint} does the opposite: it resets the address
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in the mirrorred value of the debug register and its read/write and
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length bits in the mirrorred value of DR7, then passes these new
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values to the inferior via @code{I386_DR_LOW_RESET_ADDR} and
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@code{I386_DR_LOW_SET_CONTROL}. If a register is shared by several
|
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watchpoints, each time a @code{i386_remove_watchpoint} is called, it
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decrements the reference count, and only calls
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@code{I386_DR_LOW_RESET_ADDR} and @code{I386_DR_LOW_SET_CONTROL} when
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the count goes to zero.
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@findex i386_insert_hw_breakpoint
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@findex i386_remove_hw_breakpoint
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@item i386_insert_hw_breakpoint (@var{addr}, @var{shadow}
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@itemx i386_remove_hw_breakpoint (@var{addr}, @var{shadow})
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These functions insert and remove hardware-assisted breakpoints. The
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macros @code{target_insert_hw_breakpoint} and
|
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@code{target_remove_hw_breakpoint} are set to call these functions.
|
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These functions work like @code{i386_insert_watchpoint} and
|
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@code{i386_remove_watchpoint}, respectively, except that they set up
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the debug registers to watch instruction execution, and each
|
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hardware-assisted breakpoint always requires exactly one debug
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register.
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@findex i386_stopped_by_hwbp
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@item i386_stopped_by_hwbp (void)
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This function returns non-zero if the inferior has some watchpoint or
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hardware breakpoint that triggered. It works like
|
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@code{i386_stopped_data_address}, except that it doesn't return the
|
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address whose watchpoint triggered.
|
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@findex i386_cleanup_dregs
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@item i386_cleanup_dregs (void)
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This function clears all the reference counts, addresses, and control
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bits in the mirror images of the debug registers. It doesn't affect
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the actual debug registers in the inferior process.
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@end table
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@noindent
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@strong{Notes:}
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@enumerate 1
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@item
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x86 processors support setting watchpoints on I/O reads or writes.
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However, since no target supports this (as of March 2001), and since
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@code{enum target_hw_bp_type} doesn't even have an enumeration for I/O
|
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watchpoints, this feature is not yet available to @value{GDBN} running
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on x86.
|
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|
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@item
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x86 processors can enable watchpoints locally, for the current task
|
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only, or globally, for all the tasks. For each debug register,
|
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there's a bit in the DR7 Debug Control register that determines
|
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whether the associated address is watched locally or globally. The
|
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current implementation of x86 watchpoint support in @value{GDBN}
|
||||
always sets watchpoints to be locally enabled, since global
|
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watchpoints might interfere with the underlying OS and are probably
|
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unavailable in many platforms.
|
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@end enumerate
|
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@node User Interface
|
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|
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@chapter User Interface
|
||||
|
|
@ -375,7 +730,7 @@ to the @code{set_thread_cmd_list}.
|
|||
To add commands in general, use @code{add_cmd}. @code{add_com} adds to
|
||||
the main command list, and should be used for those commands. The usual
|
||||
place to add commands is in the @code{_initialize_@var{xyz}} routines at
|
||||
the ends of most source files.
|
||||
the ends of most source files.
|
||||
|
||||
@cindex deprecating commands
|
||||
@findex deprecate_cmd
|
||||
|
|
@ -1103,10 +1458,10 @@ The ordering of bytes in the host. This must be defined to be either
|
|||
@code{BIG_ENDIAN} or @code{LITTLE_ENDIAN}.
|
||||
|
||||
@item INT_MAX
|
||||
@item INT_MIN
|
||||
@item LONG_MAX
|
||||
@item UINT_MAX
|
||||
@item ULONG_MAX
|
||||
@itemx INT_MIN
|
||||
@itemx LONG_MAX
|
||||
@itemx UINT_MAX
|
||||
@itemx ULONG_MAX
|
||||
Values for host-side constants.
|
||||
|
||||
@item ISATTY
|
||||
|
|
@ -1223,7 +1578,7 @@ Define this to indicate that @code{siginterrupt} is not available.
|
|||
Define if this is not in a system header file (typically, @file{unistd.h}).
|
||||
|
||||
@item SEEK_CUR
|
||||
@item SEEK_SET
|
||||
@itemx SEEK_SET
|
||||
Define these to appropriate value for the system @code{lseek}, if not already
|
||||
defined.
|
||||
|
||||
|
|
@ -1991,6 +2346,10 @@ conditional should be eliminated (FIXME) and replaced by
|
|||
feature-specific macros. It was introduced in a haste and we are
|
||||
repenting at leisure.
|
||||
|
||||
@item I386_USE_GENERIC_WATCHPOINTS
|
||||
An x86-based target can define this to use the generic x86 watchpoint
|
||||
support; see @ref{Algorithms, I386_USE_GENERIC_WATCHPOINTS}.
|
||||
|
||||
@item SYMBOLS_CAN_START_WITH_DOLLAR
|
||||
@findex SYMBOLS_CAN_START_WITH_DOLLAR
|
||||
Some systems have routines whose names start with @samp{$}. Giving this
|
||||
|
|
@ -2467,6 +2826,11 @@ frame pointer in use at the code address @var{pc}. If virtual
|
|||
frame pointers are not used, a default definition simply returns
|
||||
@code{FP_REGNUM}, with an offset of zero.
|
||||
|
||||
@item TARGET_HAS_HARDWARE_WATCHPOINTS
|
||||
If non-zero, the target has support for hardware-assisted
|
||||
watchpoints. @xref{Algorithms, watchpoints}, for more details and
|
||||
other related macros.
|
||||
|
||||
@item USE_STRUCT_CONVENTION (@var{gcc_p}, @var{type})
|
||||
@findex USE_STRUCT_CONVENTION
|
||||
If defined, this must be an expression that is nonzero if a value of the
|
||||
|
|
@ -2796,6 +3160,10 @@ assuming that we have just stopped at a longjmp breakpoint. It takes a
|
|||
@code{CORE_ADDR *} as argument, and stores the target PC value through this
|
||||
pointer. It examines the current state of the machine as needed.
|
||||
|
||||
@item I386_USE_GENERIC_WATCHPOINTS
|
||||
An x86-based machine can define this to use the generic x86 watchpoint
|
||||
support; see @ref{Algorithms, I386_USE_GENERIC_WATCHPOINTS}.
|
||||
|
||||
@item KERNEL_U_ADDR
|
||||
@findex KERNEL_U_ADDR
|
||||
Define this to the address of the @code{u} structure (the ``user
|
||||
|
|
|
|||
Loading…
Reference in New Issue