configure.in: add -DTARGET_SKY for mips64r5900-sky-elf configure.
sim-main.h: Define regs for sky if -DTARGET_SKY interp.c: Initial register upload/download support for sky.
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@ -202,7 +202,7 @@ AC_SUBST(sim_gen)
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case "${target}" in
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# start-sanitize-sky
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mips64r59*-sky-*) mips_extra_objs='$(SIM_SKY_OBJS)' ;
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SIM_SUBTARGET="-DWITH_DEVICES=1 -DDEVICE_INIT=1";;
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SIM_SUBTARGET="-DTARGET_SKY -DWITH_DEVICES=1 -DDEVICE_INIT=1";;
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# end-sanitize-sky
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*) mips_extra_objs="" ;;
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@ -255,13 +255,20 @@ interrupt_event (SIM_DESC sd, void *data)
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/*---------------------------------------------------------------------------*/
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/*-- Device registration hook -----------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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static device_init(SIM_DESC sd) {
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static void device_init(SIM_DESC sd) {
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#ifdef DEVICE_INIT
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extern void register_devices(SIM_DESC);
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register_devices(sd);
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#endif
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}
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/* start-sanitize-sky */
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static struct {
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short i[16];
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int f[NUM_VU_REGS - 16];
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} vu_regs[2];
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/* end-sanitize-sky */
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/*---------------------------------------------------------------------------*/
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/*-- GDB simulator interface ------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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@ -369,6 +376,41 @@ sim_open (kind, cb, abfd, argv)
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for( rn = LAST_EMBED_REGNUM+1; rn < NUM_REGS; rn++)
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cpu->register_widths[rn] = 64;
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/* end-sanitize-r5900 */
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/* start-sanitize-sky */
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#ifdef TARGET_SKY
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/* Now the VU registers */
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for( rn = 0; rn < 16; rn++ ) { /* first the integer registers */
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cpu->register_widths[rn + NUM_R5900_REGS] = 16;
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cpu->register_widths[rn + NUM_R5900_REGS + NUM_VU_REGS] = 16;
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/* Hack for now - to test gdb interface */
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vu_regs[0].i[rn] = rn + 0x100;
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vu_regs[1].i[rn] = rn + 0x200;
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}
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for( rn = 16; rn < NUM_VU_REGS; rn++ ) { /* then the FP registers */
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float f;
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cpu->register_widths[rn + NUM_R5900_REGS] = 32;
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cpu->register_widths[rn + NUM_R5900_REGS + NUM_VU_REGS] = 32;
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/* Hack for now - to test gdb interface */
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if( rn < 24 ) {
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f = rn - 16 + 100.0;
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vu_regs[0].f[rn-16] = *((unsigned *) &f);
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f = rn - 16 + 200.0;
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vu_regs[1].f[rn-16] = *((unsigned *) &f);
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}
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else {
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f = (rn - 24)/4 + (rn - 24)%4 + 1000.0;
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vu_regs[0].f[rn-16] = *((unsigned *) &f);
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f = (rn - 24)/4 + (rn - 24)%4 + 2000.0;
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vu_regs[1].f[rn-16] = *((unsigned *) &f);
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}
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}
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#endif
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/* end-sanitize-sky */
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}
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#if defined(TRACE)
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@ -561,6 +603,28 @@ sim_store_register (sd,rn,memory)
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if (cpu->register_widths[rn] == 0)
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sim_io_eprintf(sd,"Invalid register width for %d (register store ignored)\n",rn);
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/* start-sanitize-sky */
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#ifdef TARGET_SKY
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else if( rn > NUM_R5900_REGS ) {
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rn = rn - NUM_R5900_REGS;
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if( rn < 16 )
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vu_regs[0].i[rn] = T2H_2( *(unsigned short *) memory );
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else if( rn < NUM_VU_REGS )
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vu_regs[0].f[rn - 16] = T2H_4( *(unsigned int *) memory );
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else {
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rn = rn - NUM_VU_REGS;
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if( rn < 16 )
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vu_regs[1].i[rn] = T2H_2( *(unsigned short *) memory );
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else if( rn < NUM_VU_REGS )
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vu_regs[1].f[rn - 16] = T2H_4( *(unsigned int *) memory );
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else
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sim_io_eprintf( sd, "Invalid VU register (register store ignored)\n" );
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}
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}
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#endif
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/* end-sanitize-sky */
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/* start-sanitize-r5900 */
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else if (rn == REGISTER_SA)
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SA = T2H_8(*(unsigned64*)memory);
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@ -597,6 +661,28 @@ sim_fetch_register (sd,rn,memory)
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if (cpu->register_widths[rn] == 0)
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sim_io_eprintf(sd,"Invalid register width for %d (register fetch ignored)\n",rn);
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/* start-sanitize-sky */
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#ifdef TARGET_SKY
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else if( rn > NUM_R5900_REGS ) {
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rn = rn - NUM_R5900_REGS;
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if( rn < 16 )
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*((unsigned short *) memory) = H2T_2( vu_regs[0].i[rn] );
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else if( rn < NUM_VU_REGS )
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*((unsigned int *) memory) = H2T_4( vu_regs[0].f[rn - 16] );
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else {
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rn = rn - NUM_VU_REGS;
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if( rn < 16 )
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(*(unsigned short *) memory) = H2T_2( vu_regs[1].i[rn] );
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else if( rn < NUM_VU_REGS )
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(*(unsigned int *) memory) = H2T_4( vu_regs[1].f[rn - 16] );
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else
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sim_io_eprintf( sd, "Invalid VU register (register fetch ignored)\n" );
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}
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}
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#endif
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/* end-sanitize-sky */
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/* start-sanitize-r5900 */
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else if (rn == REGISTER_SA)
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*((unsigned64*)memory) = H2T_8(SA);
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