Remove soft reg hack in the 68hc11 simulator
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9830501b31
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@ -1,3 +1,10 @@
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2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr>
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* interp.c (sim_store_register): Remove soft register hack.
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(sim_fetch_register): Likewise.
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(sim_create_inferior): Likewise.
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* sim-main.h: Likewise.
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2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr>
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* interrupts.c (interrupts_update_pending): Clear the mask of
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@ -325,32 +325,6 @@ sim_create_inferior (SIM_DESC sd, struct _bfd *abfd,
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/* reset all state information */
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sim_board_reset (sd);
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/* Get information about the number of pseudo registers. */
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for (i = FIRST_SOFT_REGNUM; i <= ZD32_REGNUM; i++)
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{
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switch (i)
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{
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case TMP_REGNUM:
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cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 0;
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break;
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case Z_REGNUM:
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case ZS_REGNUM:
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cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 2;
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break;
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case XY_REGNUM:
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cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 4;
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break;
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case FP_REGNUM:
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cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 6;
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break;
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default:
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cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM]
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= ((i - FIRST_SOFT_REGNUM) * 2) - 2;
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break;
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}
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}
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cpu->cpu_nb_pseudo_regs = 8;
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return SIM_RC_OK;
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}
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@ -403,21 +377,8 @@ sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
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val = cpu_get_ccr (cpu);
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break;
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/* Read a pseudo register. Pseudo registers are located at
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beginning of page 0. Each of them is 2 bytes. */
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default:
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if (rn < FIRST_SOFT_REGNUM || rn >= ZD32_REGNUM)
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{
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val = 0;
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}
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else
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{
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uint16 addr;
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addr = cpu->cpu_page0_reg[rn - FIRST_SOFT_REGNUM];
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val = memory_read16 (cpu, addr);
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}
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val = 0;
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break;
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}
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memory[0] = val >> 8;
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@ -471,16 +432,7 @@ sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
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cpu_set_ccr (cpu, val);
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break;
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/* Write a pseudo register. Pseudo registers are located at
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beginning of page 0. Each of them is 2 bytes. */
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default:
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if (rn >= FIRST_SOFT_REGNUM && rn <= ZD32_REGNUM)
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{
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uint16 addr;
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addr = cpu->cpu_page0_reg[rn - FIRST_SOFT_REGNUM];
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memory_write16 (cpu, addr, val);
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}
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break;
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}
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@ -75,15 +75,6 @@ enum m68hc11_map_level
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#define B_REGNUM 6
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#define PSW_REGNUM 7
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#define Z_REGNUM 8
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#define FP_REGNUM 9
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#define TMP_REGNUM 10
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#define ZS_REGNUM 11
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#define XY_REGNUM 12
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#define ZD1_REGNUM 13
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#define ZD32_REGNUM (ZD1_REGNUM+31)
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#define FIRST_SOFT_REGNUM (Z_REGNUM)
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#define MAX_SOFT_REG (ZD32_REGNUM - Z_REGNUM + 1)
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typedef struct m6811_regs {
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unsigned short d;
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@ -186,8 +177,6 @@ struct _sim_cpu {
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int cpu_elf_start;
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uint16 cpu_insn_pc;
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unsigned short cpu_nb_pseudo_regs;
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uint16 cpu_page0_reg[MAX_SOFT_REG];
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/* CPU frequency. This is the quartz frequency. It is divided by 4 to
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get the cycle time. This is used for the timer rate and for the baud
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