Remove fake operand handling for extended mnemonics.
opcodes/ * ppc-opc.c (insert_bat, extract_bat, insert_bba, extract_bba, insert_rbs, extract_rbs, insert_xb6s, extract_xb6s): Delete functions. (insert_bab, extract_bab, insert_btab, extract_btab, insert_rsb, extract_rsb, insert_xab6, extract_xab6): New functions. (BAT, BBA VBA RBS XB6S): Delete macros. (BTAB, BAB, VAB, RAB, RSB, XAB6): New macros. (BB, BD, RBX, XC6): Update for new macros. (powerpc_opcodes) <evmr, evnot, vmr, vnot, crnot, crclr, crset, crmove, not, not., mr, mr., xxspltd, xxswapd, xvmovsp, xvmovdp, e_crnot, e_crclr, e_crset, e_crmove>: Likewise. * ppc-dis.c (print_insn_powerpc): Delete handling of fake operands. include/ * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro. gas/ * config/tc-ppc.c (md_assemble): Delete handling of fake operands. * testsuite/gas/ppc/common.s (crmove, cror, or., or, nor., nor): Add test of extended mnemonics. * testsuite/gas/ppc/common.d: Likewise. Don't match instruction offset. * testsuite/gas/ppc/spe.s (evor, evnor): Add test of extended mnemonics. * testsuite/gas/ppc/spe.d: Likewise. Don't match instruction offset.
This commit is contained in:
Peter Bergner
parent
122b53ea6a
commit
98553ad33e
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@ -1,3 +1,12 @@
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2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
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* config/tc-ppc.c (md_assemble): Delete handling of fake operands.
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* testsuite/gas/ppc/common.s (crmove, cror, or., or, nor., nor): Add
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test of extended mnemonics.
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* testsuite/gas/ppc/common.d: Likewise. Don't match instruction offset.
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* testsuite/gas/ppc/spe.s (evor, evnor): Add test of extended mnemonics.
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* testsuite/gas/ppc/spe.d: Likewise. Don't match instruction offset.
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2018-05-18 Kito Cheng <kito.cheng@gmail.com>
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Monk Chiang <sh.chiang04@gmail.com>
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Jim Wilson <jimw@sifive.com>
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@ -2807,11 +2807,9 @@ md_assemble (char *str)
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}
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}
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/* Compute the number of expected operands.
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Do not count fake operands. */
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/* Compute the number of expected operands. */
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for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
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if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
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++ num_operands_expected;
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++ num_operands_expected;
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/* If there are fewer operands in the line then are called
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for by the instruction, we want to skip the optional
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@ -2844,16 +2842,6 @@ md_assemble (char *str)
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}
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errmsg = NULL;
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/* If this is a fake operand, then we do not expect anything
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from the input. */
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if ((operand->flags & PPC_OPERAND_FAKE) != 0)
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{
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insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
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if (errmsg != (const char *) NULL)
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as_bad ("%s", errmsg);
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continue;
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}
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/* If this is an optional operand, and we are skipping it, just
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insert a zero. */
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if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
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@ -8,187 +8,194 @@ Disassembly of section \.text:
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0+00 <start>:
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0: (7c 83 28 39|39 28 83 7c) and. r3,r4,r5
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4: (7c 83 28 38|38 28 83 7c) and r3,r4,r5
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8: (7d cd 78 78|78 78 cd 7d) andc r13,r14,r15
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c: (7e 30 90 79|79 90 30 7e) andc. r16,r17,r18
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10: (48 00 00 02|02 00 00 48) ba 0 <start>
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14: (40 01 00 00|00 00 01 40) bdnzf- 1,14 <start\+0x14>
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18: (40 85 00 02|02 00 85 40) blea- 1,0 <start>
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1c: (40 43 00 01|01 00 43 40) bdzfl- 3,1c <start\+0x1c>
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20: (41 47 00 03|03 00 47 41) bdztla- 7,0 <start>
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24: (4e 80 04 20|20 04 80 4e) bctr
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28: (4e 80 04 21|21 04 80 4e) bctrl
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2c: (42 40 00 02|02 00 40 42) bdza- 0 <start>
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30: (42 40 00 00|00 00 40 42) bdz- 30 <start\+0x30>
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34: (42 40 00 03|03 00 40 42) bdzla- 0 <start>
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38: (42 40 00 01|01 00 40 42) bdzl- 38 <start\+0x38>
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3c: (41 82 00 00|00 00 82 41) beq- 3c <start\+0x3c>
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40: (41 8a 00 02|02 00 8a 41) beqa- 2,0 <start>
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44: (41 86 00 01|01 00 86 41) beql- 1,44 <start\+0x44>
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48: (41 8e 00 03|03 00 8e 41) beqla- 3,0 <start>
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4c: (40 80 00 00|00 00 80 40) bge- 4c <start\+0x4c>
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50: (40 90 00 02|02 00 90 40) bgea- 4,0 <start>
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54: (40 88 00 01|01 00 88 40) bgel- 2,54 <start\+0x54>
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58: (40 98 00 03|03 00 98 40) bgela- 6,0 <start>
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5c: (41 91 00 00|00 00 91 41) bgt- 4,5c <start\+0x5c>
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60: (41 99 00 02|02 00 99 41) bgta- 6,0 <start>
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64: (41 95 00 01|01 00 95 41) bgtl- 5,64 <start\+0x64>
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68: (41 9d 00 03|03 00 9d 41) bgtla- 7,0 <start>
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6c: (48 00 00 00|00 00 00 48) b 6c <start\+0x6c>
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70: (48 00 00 03|03 00 00 48) bla 0 <start>
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74: (40 81 00 00|00 00 81 40) ble- 74 <start\+0x74>
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78: (40 91 00 02|02 00 91 40) blea- 4,0 <start>
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7c: (40 89 00 01|01 00 89 40) blel- 2,7c <start\+0x7c>
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80: (40 99 00 03|03 00 99 40) blela- 6,0 <start>
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84: (48 00 00 01|01 00 00 48) bl 84 <start\+0x84>
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88: (41 80 00 00|00 00 80 41) blt- 88 <start\+0x88>
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8c: (41 88 00 02|02 00 88 41) blta- 2,0 <start>
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90: (41 84 00 01|01 00 84 41) bltl- 1,90 <start\+0x90>
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94: (41 8c 00 03|03 00 8c 41) bltla- 3,0 <start>
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98: (40 82 00 00|00 00 82 40) bne- 98 <start\+0x98>
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9c: (40 8a 00 02|02 00 8a 40) bnea- 2,0 <start>
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a0: (40 86 00 01|01 00 86 40) bnel- 1,a0 <start\+0xa0>
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a4: (40 8e 00 03|03 00 8e 40) bnela- 3,0 <start>
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a8: (40 85 00 00|00 00 85 40) ble- 1,a8 <start\+0xa8>
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ac: (40 95 00 02|02 00 95 40) blea- 5,0 <start>
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b0: (40 8d 00 01|01 00 8d 40) blel- 3,b0 <start\+0xb0>
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b4: (40 9d 00 03|03 00 9d 40) blela- 7,0 <start>
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b8: (40 84 00 00|00 00 84 40) bge- 1,b8 <start\+0xb8>
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bc: (40 94 00 02|02 00 94 40) bgea- 5,0 <start>
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c0: (40 8c 00 01|01 00 8c 40) bgel- 3,c0 <start\+0xc0>
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c4: (40 9c 00 03|03 00 9c 40) bgela- 7,0 <start>
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c8: (40 93 00 00|00 00 93 40) bns- 4,c8 <start\+0xc8>
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cc: (40 9b 00 02|02 00 9b 40) bnsa- 6,0 <start>
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d0: (40 97 00 01|01 00 97 40) bnsl- 5,d0 <start\+0xd0>
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d4: (40 9f 00 03|03 00 9f 40) bnsla- 7,0 <start>
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d8: (41 93 00 00|00 00 93 41) bso- 4,d8 <start\+0xd8>
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dc: (41 9b 00 02|02 00 9b 41) bsoa- 6,0 <start>
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e0: (41 97 00 01|01 00 97 41) bsol- 5,e0 <start\+0xe0>
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e4: (41 9f 00 03|03 00 9f 41) bsola- 7,0 <start>
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e8: (4c 85 32 02|02 32 85 4c) crand 4,5,6
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ec: (4c 64 29 02|02 29 64 4c) crandc 3,4,5
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f0: (4c e0 0a 42|42 0a e0 4c) creqv 7,0,1
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f4: (4c 22 19 c2|c2 19 22 4c) crnand 1,2,3
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f8: (4c 01 10 42|42 10 01 4c) crnor 0,1,2
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fc: (4c a6 3b 82|82 3b a6 4c) cror 5,6,7
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100: (4c 43 23 42|42 23 43 4c) crorc 2,3,4
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104: (4c c7 01 82|82 01 c7 4c) crxor 6,7,0
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108: (7d 6a 62 39|39 62 6a 7d) eqv. r10,r11,r12
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10c: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12
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110: (fe a0 fa 11|11 fa a0 fe) fabs. f21,f31
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114: (fe a0 fa 10|10 fa a0 fe) fabs f21,f31
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118: (fd 8a 58 40|40 58 8a fd) fcmpo 3,f10,f11
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11c: (fd 84 28 00|00 28 84 fd) fcmpu 3,f4,f5
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120: (fc 60 20 91|91 20 60 fc) fmr. f3,f4
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124: (fc 60 20 90|90 20 60 fc) fmr f3,f4
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128: (fe 80 f1 11|11 f1 80 fe) fnabs. f20,f30
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12c: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30
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130: (fc 60 20 51|51 20 60 fc) fneg. f3,f4
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134: (fc 60 20 50|50 20 60 fc) fneg f3,f4
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138: (fc c0 38 18|18 38 c0 fc) frsp f6,f7
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13c: (fd 00 48 19|19 48 00 fd) frsp. f8,f9
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140: (89 21 00 00|00 00 21 89) lbz r9,0\(r1\)
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144: (8d 41 00 01|01 00 41 8d) lbzu r10,1\(r1\)
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148: (7e 95 b0 ee|ee b0 95 7e) lbzux r20,r21,r22
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14c: (7c 64 28 ae|ae 28 64 7c) lbzx r3,r4,r5
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150: (ca a1 00 08|08 00 a1 ca) lfd f21,8\(r1\)
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154: (ce c1 00 10|10 00 c1 ce) lfdu f22,16\(r1\)
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158: (7e 95 b4 ee|ee b4 95 7e) lfdux f20,r21,r22
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15c: (7d ae 7c ae|ae 7c ae 7d) lfdx f13,r14,r15
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160: (c2 61 00 00|00 00 61 c2) lfs f19,0\(r1\)
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164: (c6 81 00 04|04 00 81 c6) lfsu f20,4\(r1\)
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168: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12
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16c: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12
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170: (a9 e1 00 06|06 00 e1 a9) lha r15,6\(r1\)
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174: (ae 01 00 08|08 00 01 ae) lhau r16,8\(r1\)
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178: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11
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17c: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11
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180: (7c 64 2e 2c|2c 2e 64 7c) lhbrx r3,r4,r5
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184: (a1 a1 00 00|00 00 a1 a1) lhz r13,0\(r1\)
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188: (a5 c1 00 02|02 00 c1 a5) lhzu r14,2\(r1\)
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18c: (7e 96 c2 6e|6e c2 96 7e) lhzux r20,r22,r24
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190: (7e f8 ca 2e|2e ca f8 7e) lhzx r23,r24,r25
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194: (4c 04 00 00|00 00 04 4c) mcrf 0,1
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198: (fd 90 00 80|80 00 90 fd) mcrfs 3,4
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19c: (7d 80 04 00|00 04 80 7d) mcrxr 3
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1a0: (7c 60 00 26|26 00 60 7c) mfcr r3
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1a4: (7c 69 02 a6|a6 02 69 7c) mfctr r3
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1a8: (7c b3 02 a6|a6 02 b3 7c) mfdar r5
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1ac: (7c 92 02 a6|a6 02 92 7c) mfdsisr r4
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1b0: (ff c0 04 8e|8e 04 c0 ff) mffs f30
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1b4: (ff e0 04 8f|8f 04 e0 ff) mffs. f31
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1b8: (7c 48 02 a6|a6 02 48 7c) mflr r2
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1bc: (7e 60 00 a6|a6 00 60 7e) mfmsr r19
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1c0: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
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1c4: (7c 25 02 a6|a6 02 25 7c) mfrtcl r1
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1c8: (7c 04 02 a6|a6 02 04 7c) mfrtcu r0
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1cc: (7c d9 02 a6|a6 02 d9 7c) mfsdr1 r6
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1d0: (7c 60 22 a6|a6 22 60 7c) mfspr r3,128
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1d4: (7c fa 02 a6|a6 02 fa 7c) mfsrr0 r7
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1d8: (7d 1b 02 a6|a6 02 1b 7d) mfsrr1 r8
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1dc: (7f c1 02 a6|a6 02 c1 7f) mfxer r30
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1e0: (7f fe fb 79|79 fb fe 7f) mr. r30,r31
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1e4: (7f fe fb 78|78 fb fe 7f) mr r30,r31
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1e8: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
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1ec: (7c 68 01 20|20 01 68 7c) mtcrf 128,r3
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1f0: (7e 69 03 a6|a6 03 69 7e) mtctr r19
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1f4: (7e b3 03 a6|a6 03 b3 7e) mtdar r21
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1f8: (7f 16 03 a6|a6 03 16 7f) mtdec r24
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1fc: (7e 92 03 a6|a6 03 92 7e) mtdsisr r20
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200: (fc 60 00 8d|8d 00 60 fc) mtfsb0. 3
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204: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3
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208: (fc 60 00 4d|4d 00 60 fc) mtfsb1. 3
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20c: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3
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210: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
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214: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf. 6,f11
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218: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
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21c: (ff 00 f1 0d|0d f1 00 ff) mtfsfi. 6,15
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220: (7e 48 03 a6|a6 03 48 7e) mtlr r18
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224: (7d 40 01 24|24 01 40 7d) mtmsr r10
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228: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
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22c: (7e f5 03 a6|a6 03 f5 7e) mtrtcl r23
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230: (7e d4 03 a6|a6 03 d4 7e) mtrtcu r22
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234: (7f 39 03 a6|a6 03 39 7f) mtsdr1 r25
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238: (7c 60 23 a6|a6 23 60 7c) mtspr 128,r3
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23c: (7f 5a 03 a6|a6 03 5a 7f) mtsrr0 r26
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240: (7f 7b 03 a6|a6 03 7b 7f) mtsrr1 r27
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244: (7e 21 03 a6|a6 03 21 7e) mtxer r17
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248: (7f bc f3 b9|b9 f3 bc 7f) nand. r28,r29,r30
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24c: (7f bc f3 b8|b8 f3 bc 7f) nand r28,r29,r30
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250: (7c 64 00 d1|d1 00 64 7c) neg. r3,r4
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254: (7c 64 00 d0|d0 00 64 7c) neg r3,r4
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258: (7e 11 04 d0|d0 04 11 7e) nego r16,r17
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25c: (7e 53 04 d1|d1 04 53 7e) nego. r18,r19
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260: (7e b4 b0 f9|f9 b0 b4 7e) nor. r20,r21,r22
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264: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22
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268: (7e b4 a8 f9|f9 a8 b4 7e) not. r20,r21
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26c: (7e b4 a8 f8|f8 a8 b4 7e) not r20,r21
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270: (7c 40 23 78|78 23 40 7c) or r0,r2,r4
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274: (7d cc 83 79|79 83 cc 7d) or. r12,r14,r16
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278: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17
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27c: (7e 72 a3 39|39 a3 72 7e) orc. r18,r19,r20
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280: (4c 00 00 64|64 00 00 4c) rfi
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284: (99 61 00 02|02 00 61 99) stb r11,2\(r1\)
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288: (9d 81 00 03|03 00 81 9d) stbu r12,3\(r1\)
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28c: (7d ae 79 ee|ee 79 ae 7d) stbux r13,r14,r15
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290: (7c 64 29 ae|ae 29 64 7c) stbx r3,r4,r5
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294: (db 21 00 20|20 00 21 db) stfd f25,32\(r1\)
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298: (df 41 00 28|28 00 41 df) stfdu f26,40\(r1\)
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29c: (7c 01 15 ee|ee 15 01 7c) stfdux f0,r1,r2
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2a0: (7f be fd ae|ae fd be 7f) stfdx f29,r30,r31
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2a4: (d2 e1 00 14|14 00 e1 d2) stfs f23,20\(r1\)
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2a8: (d7 01 00 18|18 00 01 d7) stfsu f24,24\(r1\)
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2ac: (7f 5b e5 6e|6e e5 5b 7f) stfsux f26,r27,r28
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2b0: (7e f8 cd 2e|2e cd f8 7e) stfsx f23,r24,r25
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2b4: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\)
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2b8: (7c c7 47 2c|2c 47 c7 7c) sthbrx r6,r7,r8
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2bc: (b6 41 00 0c|0c 00 41 b6) sthu r18,12\(r1\)
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2c0: (7e b6 bb 6e|6e bb b6 7e) sthux r21,r22,r23
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2c4: (7d 8d 73 2e|2e 73 8d 7d) sthx r12,r13,r14
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2c8: (7f dd fa 79|79 fa dd 7f) xor. r29,r30,r31
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2cc: (7f dd fa 78|78 fa dd 7f) xor r29,r30,r31
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2d0: (60 00 00 00|00 00 00 60) nop
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2d4: (60 00 00 00|00 00 00 60) nop
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2d8: (68 00 00 00|00 00 00 68) xnop
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2dc: (68 00 00 00|00 00 00 68) xnop
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.*: (7c 83 28 39|39 28 83 7c) and. r3,r4,r5
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.*: (7c 83 28 38|38 28 83 7c) and r3,r4,r5
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.*: (7d cd 78 78|78 78 cd 7d) andc r13,r14,r15
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.*: (7e 30 90 79|79 90 30 7e) andc. r16,r17,r18
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.*: (48 00 00 02|02 00 00 48) ba 0 <start>
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.*: (40 01 00 00|00 00 01 40) bdnzf- 1,14 <start\+0x14>
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.*: (40 85 00 02|02 00 85 40) blea- 1,0 <start>
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.*: (40 43 00 01|01 00 43 40) bdzfl- 3,1c <start\+0x1c>
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.*: (41 47 00 03|03 00 47 41) bdztla- 7,0 <start>
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.*: (4e 80 04 20|20 04 80 4e) bctr
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.*: (4e 80 04 21|21 04 80 4e) bctrl
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.*: (42 40 00 02|02 00 40 42) bdza- 0 <start>
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.*: (42 40 00 00|00 00 40 42) bdz- 30 <start\+0x30>
|
||||
.*: (42 40 00 03|03 00 40 42) bdzla- 0 <start>
|
||||
.*: (42 40 00 01|01 00 40 42) bdzl- 38 <start\+0x38>
|
||||
.*: (41 82 00 00|00 00 82 41) beq- 3c <start\+0x3c>
|
||||
.*: (41 8a 00 02|02 00 8a 41) beqa- 2,0 <start>
|
||||
.*: (41 86 00 01|01 00 86 41) beql- 1,44 <start\+0x44>
|
||||
.*: (41 8e 00 03|03 00 8e 41) beqla- 3,0 <start>
|
||||
.*: (40 80 00 00|00 00 80 40) bge- 4c <start\+0x4c>
|
||||
.*: (40 90 00 02|02 00 90 40) bgea- 4,0 <start>
|
||||
.*: (40 88 00 01|01 00 88 40) bgel- 2,54 <start\+0x54>
|
||||
.*: (40 98 00 03|03 00 98 40) bgela- 6,0 <start>
|
||||
.*: (41 91 00 00|00 00 91 41) bgt- 4,5c <start\+0x5c>
|
||||
.*: (41 99 00 02|02 00 99 41) bgta- 6,0 <start>
|
||||
.*: (41 95 00 01|01 00 95 41) bgtl- 5,64 <start\+0x64>
|
||||
.*: (41 9d 00 03|03 00 9d 41) bgtla- 7,0 <start>
|
||||
.*: (48 00 00 00|00 00 00 48) b 6c <start\+0x6c>
|
||||
.*: (48 00 00 03|03 00 00 48) bla 0 <start>
|
||||
.*: (40 81 00 00|00 00 81 40) ble- 74 <start\+0x74>
|
||||
.*: (40 91 00 02|02 00 91 40) blea- 4,0 <start>
|
||||
.*: (40 89 00 01|01 00 89 40) blel- 2,7c <start\+0x7c>
|
||||
.*: (40 99 00 03|03 00 99 40) blela- 6,0 <start>
|
||||
.*: (48 00 00 01|01 00 00 48) bl 84 <start\+0x84>
|
||||
.*: (41 80 00 00|00 00 80 41) blt- 88 <start\+0x88>
|
||||
.*: (41 88 00 02|02 00 88 41) blta- 2,0 <start>
|
||||
.*: (41 84 00 01|01 00 84 41) bltl- 1,90 <start\+0x90>
|
||||
.*: (41 8c 00 03|03 00 8c 41) bltla- 3,0 <start>
|
||||
.*: (40 82 00 00|00 00 82 40) bne- 98 <start\+0x98>
|
||||
.*: (40 8a 00 02|02 00 8a 40) bnea- 2,0 <start>
|
||||
.*: (40 86 00 01|01 00 86 40) bnel- 1,a0 <start\+0xa0>
|
||||
.*: (40 8e 00 03|03 00 8e 40) bnela- 3,0 <start>
|
||||
.*: (40 85 00 00|00 00 85 40) ble- 1,a8 <start\+0xa8>
|
||||
.*: (40 95 00 02|02 00 95 40) blea- 5,0 <start>
|
||||
.*: (40 8d 00 01|01 00 8d 40) blel- 3,b0 <start\+0xb0>
|
||||
.*: (40 9d 00 03|03 00 9d 40) blela- 7,0 <start>
|
||||
.*: (40 84 00 00|00 00 84 40) bge- 1,b8 <start\+0xb8>
|
||||
.*: (40 94 00 02|02 00 94 40) bgea- 5,0 <start>
|
||||
.*: (40 8c 00 01|01 00 8c 40) bgel- 3,c0 <start\+0xc0>
|
||||
.*: (40 9c 00 03|03 00 9c 40) bgela- 7,0 <start>
|
||||
.*: (40 93 00 00|00 00 93 40) bns- 4,c8 <start\+0xc8>
|
||||
.*: (40 9b 00 02|02 00 9b 40) bnsa- 6,0 <start>
|
||||
.*: (40 97 00 01|01 00 97 40) bnsl- 5,d0 <start\+0xd0>
|
||||
.*: (40 9f 00 03|03 00 9f 40) bnsla- 7,0 <start>
|
||||
.*: (41 93 00 00|00 00 93 41) bso- 4,d8 <start\+0xd8>
|
||||
.*: (41 9b 00 02|02 00 9b 41) bsoa- 6,0 <start>
|
||||
.*: (41 97 00 01|01 00 97 41) bsol- 5,e0 <start\+0xe0>
|
||||
.*: (41 9f 00 03|03 00 9f 41) bsola- 7,0 <start>
|
||||
.*: (4c 85 32 02|02 32 85 4c) crand 4,5,6
|
||||
.*: (4c 64 29 02|02 29 64 4c) crandc 3,4,5
|
||||
.*: (4c e0 0a 42|42 0a e0 4c) creqv 7,0,1
|
||||
.*: (4c 22 19 c2|c2 19 22 4c) crnand 1,2,3
|
||||
.*: (4c 01 10 42|42 10 01 4c) crnor 0,1,2
|
||||
.*: (4c a6 3b 82|82 3b a6 4c) cror 5,6,7
|
||||
.*: (4c a6 33 82|82 33 a6 4c) crmove 5,6
|
||||
.*: (4c a6 33 82|82 33 a6 4c) crmove 5,6
|
||||
.*: (4c 43 23 42|42 23 43 4c) crorc 2,3,4
|
||||
.*: (4c c7 01 82|82 01 c7 4c) crxor 6,7,0
|
||||
.*: (7d 6a 62 39|39 62 6a 7d) eqv. r10,r11,r12
|
||||
.*: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12
|
||||
.*: (fe a0 fa 11|11 fa a0 fe) fabs. f21,f31
|
||||
.*: (fe a0 fa 10|10 fa a0 fe) fabs f21,f31
|
||||
.*: (fd 8a 58 40|40 58 8a fd) fcmpo 3,f10,f11
|
||||
.*: (fd 84 28 00|00 28 84 fd) fcmpu 3,f4,f5
|
||||
.*: (fc 60 20 91|91 20 60 fc) fmr. f3,f4
|
||||
.*: (fc 60 20 90|90 20 60 fc) fmr f3,f4
|
||||
.*: (fe 80 f1 11|11 f1 80 fe) fnabs. f20,f30
|
||||
.*: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30
|
||||
.*: (fc 60 20 51|51 20 60 fc) fneg. f3,f4
|
||||
.*: (fc 60 20 50|50 20 60 fc) fneg f3,f4
|
||||
.*: (fc c0 38 18|18 38 c0 fc) frsp f6,f7
|
||||
.*: (fd 00 48 19|19 48 00 fd) frsp. f8,f9
|
||||
.*: (89 21 00 00|00 00 21 89) lbz r9,0\(r1\)
|
||||
.*: (8d 41 00 01|01 00 41 8d) lbzu r10,1\(r1\)
|
||||
.*: (7e 95 b0 ee|ee b0 95 7e) lbzux r20,r21,r22
|
||||
.*: (7c 64 28 ae|ae 28 64 7c) lbzx r3,r4,r5
|
||||
.*: (ca a1 00 08|08 00 a1 ca) lfd f21,8\(r1\)
|
||||
.*: (ce c1 00 10|10 00 c1 ce) lfdu f22,16\(r1\)
|
||||
.*: (7e 95 b4 ee|ee b4 95 7e) lfdux f20,r21,r22
|
||||
.*: (7d ae 7c ae|ae 7c ae 7d) lfdx f13,r14,r15
|
||||
.*: (c2 61 00 00|00 00 61 c2) lfs f19,0\(r1\)
|
||||
.*: (c6 81 00 04|04 00 81 c6) lfsu f20,4\(r1\)
|
||||
.*: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12
|
||||
.*: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12
|
||||
.*: (a9 e1 00 06|06 00 e1 a9) lha r15,6\(r1\)
|
||||
.*: (ae 01 00 08|08 00 01 ae) lhau r16,8\(r1\)
|
||||
.*: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11
|
||||
.*: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11
|
||||
.*: (7c 64 2e 2c|2c 2e 64 7c) lhbrx r3,r4,r5
|
||||
.*: (a1 a1 00 00|00 00 a1 a1) lhz r13,0\(r1\)
|
||||
.*: (a5 c1 00 02|02 00 c1 a5) lhzu r14,2\(r1\)
|
||||
.*: (7e 96 c2 6e|6e c2 96 7e) lhzux r20,r22,r24
|
||||
.*: (7e f8 ca 2e|2e ca f8 7e) lhzx r23,r24,r25
|
||||
.*: (4c 04 00 00|00 00 04 4c) mcrf 0,1
|
||||
.*: (fd 90 00 80|80 00 90 fd) mcrfs 3,4
|
||||
.*: (7d 80 04 00|00 04 80 7d) mcrxr 3
|
||||
.*: (7c 60 00 26|26 00 60 7c) mfcr r3
|
||||
.*: (7c 69 02 a6|a6 02 69 7c) mfctr r3
|
||||
.*: (7c b3 02 a6|a6 02 b3 7c) mfdar r5
|
||||
.*: (7c 92 02 a6|a6 02 92 7c) mfdsisr r4
|
||||
.*: (ff c0 04 8e|8e 04 c0 ff) mffs f30
|
||||
.*: (ff e0 04 8f|8f 04 e0 ff) mffs. f31
|
||||
.*: (7c 48 02 a6|a6 02 48 7c) mflr r2
|
||||
.*: (7e 60 00 a6|a6 00 60 7e) mfmsr r19
|
||||
.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
|
||||
.*: (7c 25 02 a6|a6 02 25 7c) mfrtcl r1
|
||||
.*: (7c 04 02 a6|a6 02 04 7c) mfrtcu r0
|
||||
.*: (7c d9 02 a6|a6 02 d9 7c) mfsdr1 r6
|
||||
.*: (7c 60 22 a6|a6 22 60 7c) mfspr r3,128
|
||||
.*: (7c fa 02 a6|a6 02 fa 7c) mfsrr0 r7
|
||||
.*: (7d 1b 02 a6|a6 02 1b 7d) mfsrr1 r8
|
||||
.*: (7f c1 02 a6|a6 02 c1 7f) mfxer r30
|
||||
.*: (7f fe fb 79|79 fb fe 7f) mr. r30,r31
|
||||
.*: (7f fe fb 79|79 fb fe 7f) mr. r30,r31
|
||||
.*: (7f fe fb 78|78 fb fe 7f) mr r30,r31
|
||||
.*: (7f fe fb 78|78 fb fe 7f) mr r30,r31
|
||||
.*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
|
||||
.*: (7c 68 01 20|20 01 68 7c) mtcrf 128,r3
|
||||
.*: (7e 69 03 a6|a6 03 69 7e) mtctr r19
|
||||
.*: (7e b3 03 a6|a6 03 b3 7e) mtdar r21
|
||||
.*: (7f 16 03 a6|a6 03 16 7f) mtdec r24
|
||||
.*: (7e 92 03 a6|a6 03 92 7e) mtdsisr r20
|
||||
.*: (fc 60 00 8d|8d 00 60 fc) mtfsb0. 3
|
||||
.*: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3
|
||||
.*: (fc 60 00 4d|4d 00 60 fc) mtfsb1. 3
|
||||
.*: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3
|
||||
.*: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
|
||||
.*: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf. 6,f11
|
||||
.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
|
||||
.*: (ff 00 f1 0d|0d f1 00 ff) mtfsfi. 6,15
|
||||
.*: (7e 48 03 a6|a6 03 48 7e) mtlr r18
|
||||
.*: (7d 40 01 24|24 01 40 7d) mtmsr r10
|
||||
.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
|
||||
.*: (7e f5 03 a6|a6 03 f5 7e) mtrtcl r23
|
||||
.*: (7e d4 03 a6|a6 03 d4 7e) mtrtcu r22
|
||||
.*: (7f 39 03 a6|a6 03 39 7f) mtsdr1 r25
|
||||
.*: (7c 60 23 a6|a6 23 60 7c) mtspr 128,r3
|
||||
.*: (7f 5a 03 a6|a6 03 5a 7f) mtsrr0 r26
|
||||
.*: (7f 7b 03 a6|a6 03 7b 7f) mtsrr1 r27
|
||||
.*: (7e 21 03 a6|a6 03 21 7e) mtxer r17
|
||||
.*: (7f bc f3 b9|b9 f3 bc 7f) nand. r28,r29,r30
|
||||
.*: (7f bc f3 b8|b8 f3 bc 7f) nand r28,r29,r30
|
||||
.*: (7c 64 00 d1|d1 00 64 7c) neg. r3,r4
|
||||
.*: (7c 64 00 d0|d0 00 64 7c) neg r3,r4
|
||||
.*: (7e 11 04 d0|d0 04 11 7e) nego r16,r17
|
||||
.*: (7e 53 04 d1|d1 04 53 7e) nego. r18,r19
|
||||
.*: (7e b4 b0 f9|f9 b0 b4 7e) nor. r20,r21,r22
|
||||
.*: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22
|
||||
.*: (7e b4 a8 f9|f9 a8 b4 7e) not. r20,r21
|
||||
.*: (7e b4 a8 f9|f9 a8 b4 7e) not. r20,r21
|
||||
.*: (7e b4 a8 f8|f8 a8 b4 7e) not r20,r21
|
||||
.*: (7e b4 a8 f8|f8 a8 b4 7e) not r20,r21
|
||||
.*: (7c 40 23 78|78 23 40 7c) or r0,r2,r4
|
||||
.*: (7d cc 83 79|79 83 cc 7d) or. r12,r14,r16
|
||||
.*: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17
|
||||
.*: (7e 72 a3 39|39 a3 72 7e) orc. r18,r19,r20
|
||||
.*: (4c 00 00 64|64 00 00 4c) rfi
|
||||
.*: (99 61 00 02|02 00 61 99) stb r11,2\(r1\)
|
||||
.*: (9d 81 00 03|03 00 81 9d) stbu r12,3\(r1\)
|
||||
.*: (7d ae 79 ee|ee 79 ae 7d) stbux r13,r14,r15
|
||||
.*: (7c 64 29 ae|ae 29 64 7c) stbx r3,r4,r5
|
||||
.*: (db 21 00 20|20 00 21 db) stfd f25,32\(r1\)
|
||||
.*: (df 41 00 28|28 00 41 df) stfdu f26,40\(r1\)
|
||||
.*: (7c 01 15 ee|ee 15 01 7c) stfdux f0,r1,r2
|
||||
.*: (7f be fd ae|ae fd be 7f) stfdx f29,r30,r31
|
||||
.*: (d2 e1 00 14|14 00 e1 d2) stfs f23,20\(r1\)
|
||||
.*: (d7 01 00 18|18 00 01 d7) stfsu f24,24\(r1\)
|
||||
.*: (7f 5b e5 6e|6e e5 5b 7f) stfsux f26,r27,r28
|
||||
.*: (7e f8 cd 2e|2e cd f8 7e) stfsx f23,r24,r25
|
||||
.*: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\)
|
||||
.*: (7c c7 47 2c|2c 47 c7 7c) sthbrx r6,r7,r8
|
||||
.*: (b6 41 00 0c|0c 00 41 b6) sthu r18,12\(r1\)
|
||||
.*: (7e b6 bb 6e|6e bb b6 7e) sthux r21,r22,r23
|
||||
.*: (7d 8d 73 2e|2e 73 8d 7d) sthx r12,r13,r14
|
||||
.*: (7f dd fa 79|79 fa dd 7f) xor. r29,r30,r31
|
||||
.*: (7f dd fa 78|78 fa dd 7f) xor r29,r30,r31
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (68 00 00 00|00 00 00 68) xnop
|
||||
.*: (68 00 00 00|00 00 00 68) xnop
|
||||
#pass
|
||||
|
|
|
|||
|
|
@ -64,6 +64,8 @@ start:
|
|||
crnand 1,2,3
|
||||
crnor 0,1,2
|
||||
cror 5,6,7
|
||||
crmove 5,6
|
||||
cror 5,6,6
|
||||
crorc 2,3,4
|
||||
crxor 6,7,0
|
||||
eqv. 10,11,12
|
||||
|
|
@ -121,7 +123,9 @@ start:
|
|||
mfsrr1 8
|
||||
mfxer 30
|
||||
mr. 30,31
|
||||
or. 30,31,31
|
||||
mr 30,31
|
||||
or 30,31,31
|
||||
mtcr 3
|
||||
mtcrf 0x80,3
|
||||
mtctr 19
|
||||
|
|
@ -155,7 +159,9 @@ start:
|
|||
nor. 20,21,22
|
||||
nor 20,21,22
|
||||
not. 20,21
|
||||
nor. 20,21,21
|
||||
not 20,21
|
||||
nor 20,21,21
|
||||
or 0,2,4
|
||||
or. 12,14,16
|
||||
orc 15,16,17
|
||||
|
|
|
|||
|
|
@ -8,260 +8,263 @@
|
|||
Disassembly of section .text:
|
||||
|
||||
00000000 <.text>:
|
||||
0: 10 01 12 00 evaddw r0,r1,r2
|
||||
4: 10 1f 12 02 evaddiw r0,r2,31
|
||||
8: 10 01 12 04 evsubfw r0,r1,r2
|
||||
c: 10 01 12 04 evsubfw r0,r1,r2
|
||||
10: 10 1f 12 06 evsubifw r0,31,r2
|
||||
14: 10 1f 12 06 evsubifw r0,31,r2
|
||||
18: 10 01 02 08 evabs r0,r1
|
||||
1c: 10 01 02 09 evneg r0,r1
|
||||
20: 10 01 02 0a evextsb r0,r1
|
||||
24: 10 01 02 0b evextsh r0,r1
|
||||
28: 10 01 02 0c evrndw r0,r1
|
||||
2c: 10 01 02 0d evcntlzw r0,r1
|
||||
30: 10 01 02 0e evcntlsw r0,r1
|
||||
34: 10 01 12 0f brinc r0,r1,r2
|
||||
38: 10 01 12 11 evand r0,r1,r2
|
||||
3c: 10 01 12 12 evandc r0,r1,r2
|
||||
40: 10 01 12 16 evxor r0,r1,r2
|
||||
44: 10 01 0a 17 evmr r0,r1
|
||||
48: 10 01 12 17 evor r0,r1,r2
|
||||
4c: 10 01 12 18 evnor r0,r1,r2
|
||||
50: 10 01 0a 18 evnor r0,r1,r1
|
||||
54: 10 01 12 19 eveqv r0,r1,r2
|
||||
58: 10 01 12 1b evorc r0,r1,r2
|
||||
5c: 10 01 12 1e evnand r0,r1,r2
|
||||
60: 10 01 12 20 evsrwu r0,r1,r2
|
||||
64: 10 01 12 21 evsrws r0,r1,r2
|
||||
68: 10 01 fa 22 evsrwiu r0,r1,31
|
||||
6c: 10 01 fa 23 evsrwis r0,r1,31
|
||||
70: 10 01 12 24 evslw r0,r1,r2
|
||||
74: 10 01 fa 26 evslwi r0,r1,31
|
||||
78: 10 01 12 28 evrlw r0,r1,r2
|
||||
7c: 10 10 02 29 evsplati r0,-16
|
||||
80: 10 01 fa 2a evrlwi r0,r1,31
|
||||
84: 10 10 02 2b evsplatfi r0,-16
|
||||
88: 10 01 12 2c evmergehi r0,r1,r2
|
||||
8c: 10 01 12 2d evmergelo r0,r1,r2
|
||||
90: 10 01 12 2e evmergehilo r0,r1,r2
|
||||
94: 10 01 12 2f evmergelohi r0,r1,r2
|
||||
98: 10 01 12 30 evcmpgtu cr0,r1,r2
|
||||
9c: 10 01 12 31 evcmpgts cr0,r1,r2
|
||||
a0: 10 01 12 32 evcmpltu cr0,r1,r2
|
||||
a4: 10 01 12 33 evcmplts cr0,r1,r2
|
||||
a8: 10 01 12 34 evcmpeq cr0,r1,r2
|
||||
ac: 10 01 12 78 evsel r0,r1,r2,cr0
|
||||
b0: 10 01 12 80 evfsadd r0,r1,r2
|
||||
b4: 10 01 12 81 evfssub r0,r1,r2
|
||||
b8: 10 01 12 82 evfsmadd r0,r1,r2
|
||||
bc: 10 01 12 83 evfsmsub r0,r1,r2
|
||||
c0: 10 01 02 84 evfsabs r0,r1
|
||||
c4: 10 01 02 85 evfsnabs r0,r1
|
||||
c8: 10 01 02 86 evfsneg r0,r1
|
||||
cc: 10 01 12 88 evfsmul r0,r1,r2
|
||||
d0: 10 01 12 89 evfsdiv r0,r1,r2
|
||||
d4: 10 01 12 8a evfsnmadd r0,r1,r2
|
||||
d8: 10 01 12 8b evfsnmsub r0,r1,r2
|
||||
dc: 10 01 12 8c evfscmpgt cr0,r1,r2
|
||||
e0: 10 01 12 8d evfscmplt cr0,r1,r2
|
||||
e4: 10 01 12 8e evfscmpeq cr0,r1,r2
|
||||
e8: 10 00 12 90 evfscfui r0,r2
|
||||
ec: 10 00 12 91 evfscfsi r0,r2
|
||||
f0: 10 00 12 92 evfscfuf r0,r2
|
||||
f4: 10 00 12 93 evfscfsf r0,r2
|
||||
f8: 10 00 12 94 evfsctui r0,r2
|
||||
fc: 10 00 12 95 evfsctsi r0,r2
|
||||
100: 10 00 12 96 evfsctuf r0,r2
|
||||
104: 10 00 12 97 evfsctsf r0,r2
|
||||
108: 10 00 12 98 evfsctuiz r0,r2
|
||||
10c: 10 00 12 9a evfsctsiz r0,r2
|
||||
110: 10 01 12 9c evfststgt cr0,r1,r2
|
||||
114: 10 01 12 9d evfststlt cr0,r1,r2
|
||||
118: 10 01 12 9e evfststeq cr0,r1,r2
|
||||
11c: 10 01 13 00 evlddx r0,r1,r2
|
||||
120: 10 01 0b 01 evldd r0,8\(r1\)
|
||||
124: 10 01 13 02 evldwx r0,r1,r2
|
||||
128: 10 01 0b 03 evldw r0,8\(r1\)
|
||||
12c: 10 01 13 04 evldhx r0,r1,r2
|
||||
130: 10 01 0b 05 evldh r0,8\(r1\)
|
||||
134: 10 01 13 08 evlhhesplatx r0,r1,r2
|
||||
138: 10 01 0b 09 evlhhesplat r0,2\(r1\)
|
||||
13c: 10 01 13 0c evlhhousplatx r0,r1,r2
|
||||
140: 10 01 0b 0d evlhhousplat r0,2\(r1\)
|
||||
144: 10 01 13 0e evlhhossplatx r0,r1,r2
|
||||
148: 10 01 0b 0f evlhhossplat r0,2\(r1\)
|
||||
14c: 10 01 13 10 evlwhex r0,r1,r2
|
||||
150: 10 01 0b 11 evlwhe r0,4\(r1\)
|
||||
154: 10 01 13 14 evlwhoux r0,r1,r2
|
||||
158: 10 01 0b 15 evlwhou r0,4\(r1\)
|
||||
15c: 10 01 13 16 evlwhosx r0,r1,r2
|
||||
160: 10 01 0b 17 evlwhos r0,4\(r1\)
|
||||
164: 10 01 13 18 evlwwsplatx r0,r1,r2
|
||||
168: 10 01 0b 19 evlwwsplat r0,4\(r1\)
|
||||
16c: 10 01 13 1c evlwhsplatx r0,r1,r2
|
||||
170: 10 01 0b 1d evlwhsplat r0,4\(r1\)
|
||||
174: 10 01 13 20 evstddx r0,r1,r2
|
||||
178: 10 01 0b 21 evstdd r0,8\(r1\)
|
||||
17c: 10 01 13 22 evstdwx r0,r1,r2
|
||||
180: 10 01 0b 23 evstdw r0,8\(r1\)
|
||||
184: 10 01 13 24 evstdhx r0,r1,r2
|
||||
188: 10 01 0b 25 evstdh r0,8\(r1\)
|
||||
18c: 10 01 13 30 evstwhex r0,r1,r2
|
||||
190: 10 01 0b 31 evstwhe r0,4\(r1\)
|
||||
194: 10 01 13 34 evstwhox r0,r1,r2
|
||||
198: 10 01 0b 35 evstwho r0,4\(r1\)
|
||||
19c: 10 01 13 38 evstwwex r0,r1,r2
|
||||
1a0: 10 01 0b 39 evstwwe r0,4\(r1\)
|
||||
1a4: 10 01 13 3c evstwwox r0,r1,r2
|
||||
1a8: 10 01 0b 3d evstwwo r0,4\(r1\)
|
||||
1ac: 10 01 14 03 evmhessf r0,r1,r2
|
||||
1b0: 10 01 14 07 evmhossf r0,r1,r2
|
||||
1b4: 10 01 14 08 evmheumi r0,r1,r2
|
||||
1b8: 10 01 14 09 evmhesmi r0,r1,r2
|
||||
1bc: 10 01 14 0b evmhesmf r0,r1,r2
|
||||
1c0: 10 01 14 0c evmhoumi r0,r1,r2
|
||||
1c4: 10 01 14 0d evmhosmi r0,r1,r2
|
||||
1c8: 10 01 14 0f evmhosmf r0,r1,r2
|
||||
1cc: 10 01 14 23 evmhessfa r0,r1,r2
|
||||
1d0: 10 01 14 27 evmhossfa r0,r1,r2
|
||||
1d4: 10 01 14 28 evmheumia r0,r1,r2
|
||||
1d8: 10 01 14 29 evmhesmia r0,r1,r2
|
||||
1dc: 10 01 14 2b evmhesmfa r0,r1,r2
|
||||
1e0: 10 01 14 2c evmhoumia r0,r1,r2
|
||||
1e4: 10 01 14 2d evmhosmia r0,r1,r2
|
||||
1e8: 10 01 14 2f evmhosmfa r0,r1,r2
|
||||
1ec: 10 01 14 43 evmwlssf r0,r1,r2
|
||||
1f0: 10 01 14 47 evmwhssf r0,r1,r2
|
||||
1f4: 10 01 14 48 evmwlumi r0,r1,r2
|
||||
1f8: 10 01 14 4b evmwlsmf r0,r1,r2
|
||||
1fc: 10 01 14 4c evmwhumi r0,r1,r2
|
||||
200: 10 01 14 4d evmwhsmi r0,r1,r2
|
||||
204: 10 01 14 4f evmwhsmf r0,r1,r2
|
||||
208: 10 01 14 53 evmwssf r0,r1,r2
|
||||
20c: 10 01 14 58 evmwumi r0,r1,r2
|
||||
210: 10 01 14 59 evmwsmi r0,r1,r2
|
||||
214: 10 01 14 5b evmwsmf r0,r1,r2
|
||||
218: 10 01 14 63 evmwlssfa r0,r1,r2
|
||||
21c: 10 01 14 67 evmwhssfa r0,r1,r2
|
||||
220: 10 01 14 68 evmwlumia r0,r1,r2
|
||||
224: 10 01 14 6b evmwlsmfa r0,r1,r2
|
||||
228: 10 01 14 6c evmwhumia r0,r1,r2
|
||||
22c: 10 01 14 6d evmwhsmia r0,r1,r2
|
||||
230: 10 01 14 6f evmwhsmfa r0,r1,r2
|
||||
234: 10 01 14 73 evmwssfa r0,r1,r2
|
||||
238: 10 01 14 78 evmwumia r0,r1,r2
|
||||
23c: 10 01 14 79 evmwsmia r0,r1,r2
|
||||
240: 10 01 14 7b evmwsmfa r0,r1,r2
|
||||
244: 10 01 04 c0 evaddusiaaw r0,r1
|
||||
248: 10 01 04 c1 evaddssiaaw r0,r1
|
||||
24c: 10 01 04 c2 evsubfusiaaw r0,r1
|
||||
250: 10 01 04 c3 evsubfssiaaw r0,r1
|
||||
254: 10 01 04 c4 evmra r0,r1
|
||||
258: 10 01 14 c6 evdivws r0,r1,r2
|
||||
25c: 10 01 14 c7 evdivwu r0,r1,r2
|
||||
260: 10 01 04 c8 evaddumiaaw r0,r1
|
||||
264: 10 01 04 c9 evaddsmiaaw r0,r1
|
||||
268: 10 01 04 ca evsubfumiaaw r0,r1
|
||||
26c: 10 01 04 cb evsubfsmiaaw r0,r1
|
||||
270: 10 01 15 00 evmheusiaaw r0,r1,r2
|
||||
274: 10 01 15 01 evmhessiaaw r0,r1,r2
|
||||
278: 10 01 15 03 evmhessfaaw r0,r1,r2
|
||||
27c: 10 01 15 04 evmhousiaaw r0,r1,r2
|
||||
280: 10 01 15 05 evmhossiaaw r0,r1,r2
|
||||
284: 10 01 15 07 evmhossfaaw r0,r1,r2
|
||||
288: 10 01 15 08 evmheumiaaw r0,r1,r2
|
||||
28c: 10 01 15 09 evmhesmiaaw r0,r1,r2
|
||||
290: 10 01 15 0b evmhesmfaaw r0,r1,r2
|
||||
294: 10 01 15 0c evmhoumiaaw r0,r1,r2
|
||||
298: 10 01 15 0d evmhosmiaaw r0,r1,r2
|
||||
29c: 10 01 15 0f evmhosmfaaw r0,r1,r2
|
||||
2a0: 10 01 15 28 evmhegumiaa r0,r1,r2
|
||||
2a4: 10 01 15 29 evmhegsmiaa r0,r1,r2
|
||||
2a8: 10 01 15 2b evmhegsmfaa r0,r1,r2
|
||||
2ac: 10 01 15 2c evmhogumiaa r0,r1,r2
|
||||
2b0: 10 01 15 2d evmhogsmiaa r0,r1,r2
|
||||
2b4: 10 01 15 2f evmhogsmfaa r0,r1,r2
|
||||
2b8: 10 01 15 40 evmwlusiaaw r0,r1,r2
|
||||
2bc: 10 01 15 41 evmwlssiaaw r0,r1,r2
|
||||
2c0: 10 01 15 43 evmwlssfaaw r0,r1,r2
|
||||
2c4: 10 01 15 44 evmwhusiaa r0,r1,r2
|
||||
2c8: 10 01 15 45 evmwhssmaa r0,r1,r2
|
||||
2cc: 10 01 15 47 evmwhssfaa r0,r1,r2
|
||||
2d0: 10 01 15 48 evmwlumiaaw r0,r1,r2
|
||||
2d4: 10 01 15 49 evmwlsmiaaw r0,r1,r2
|
||||
2d8: 10 01 15 4b evmwlsmfaaw r0,r1,r2
|
||||
2dc: 10 01 15 4c evmwhumiaa r0,r1,r2
|
||||
2e0: 10 01 15 4d evmwhsmiaa r0,r1,r2
|
||||
2e4: 10 01 15 4f evmwhsmfaa r0,r1,r2
|
||||
2e8: 10 01 15 53 evmwssfaa r0,r1,r2
|
||||
2ec: 10 01 15 58 evmwumiaa r0,r1,r2
|
||||
2f0: 10 01 15 59 evmwsmiaa r0,r1,r2
|
||||
2f4: 10 01 15 5b evmwsmfaa r0,r1,r2
|
||||
2f8: 10 01 15 64 evmwhgumiaa r0,r1,r2
|
||||
2fc: 10 01 15 65 evmwhgsmiaa r0,r1,r2
|
||||
300: 10 01 15 67 evmwhgssfaa r0,r1,r2
|
||||
304: 10 01 15 6f evmwhgsmfaa r0,r1,r2
|
||||
308: 10 01 15 80 evmheusianw r0,r1,r2
|
||||
30c: 10 01 15 81 evmhessianw r0,r1,r2
|
||||
310: 10 01 15 83 evmhessfanw r0,r1,r2
|
||||
314: 10 01 15 84 evmhousianw r0,r1,r2
|
||||
318: 10 01 15 85 evmhossianw r0,r1,r2
|
||||
31c: 10 01 15 87 evmhossfanw r0,r1,r2
|
||||
320: 10 01 15 88 evmheumianw r0,r1,r2
|
||||
324: 10 01 15 89 evmhesmianw r0,r1,r2
|
||||
328: 10 01 15 8b evmhesmfanw r0,r1,r2
|
||||
32c: 10 01 15 8c evmhoumianw r0,r1,r2
|
||||
330: 10 01 15 8d evmhosmianw r0,r1,r2
|
||||
334: 10 01 15 8f evmhosmfanw r0,r1,r2
|
||||
338: 10 01 15 a8 evmhegumian r0,r1,r2
|
||||
33c: 10 01 15 a9 evmhegsmian r0,r1,r2
|
||||
340: 10 01 15 ab evmhegsmfan r0,r1,r2
|
||||
344: 10 01 15 ac evmhogumian r0,r1,r2
|
||||
348: 10 01 15 ad evmhogsmian r0,r1,r2
|
||||
34c: 10 01 15 af evmhogsmfan r0,r1,r2
|
||||
350: 10 01 15 c0 evmwlusianw r0,r1,r2
|
||||
354: 10 01 15 c1 evmwlssianw r0,r1,r2
|
||||
358: 10 01 15 c3 evmwlssfanw r0,r1,r2
|
||||
35c: 10 01 15 c4 evmwhusian r0,r1,r2
|
||||
360: 10 01 15 c5 evmwhssian r0,r1,r2
|
||||
364: 10 01 15 c7 evmwhssfan r0,r1,r2
|
||||
368: 10 01 15 c8 evmwlumianw r0,r1,r2
|
||||
36c: 10 01 15 c9 evmwlsmianw r0,r1,r2
|
||||
370: 10 01 15 cb evmwlsmfanw r0,r1,r2
|
||||
374: 10 01 15 cc evmwhumian r0,r1,r2
|
||||
378: 10 01 15 cd evmwhsmian r0,r1,r2
|
||||
37c: 10 01 15 cf evmwhsmfan r0,r1,r2
|
||||
380: 10 01 15 d3 evmwssfan r0,r1,r2
|
||||
384: 10 01 15 d8 evmwumian r0,r1,r2
|
||||
388: 10 01 15 d9 evmwsmian r0,r1,r2
|
||||
38c: 10 01 15 db evmwsmfan r0,r1,r2
|
||||
390: 10 01 15 e4 evmwhgumian r0,r1,r2
|
||||
394: 10 01 15 e5 evmwhgsmian r0,r1,r2
|
||||
398: 10 01 15 e7 evmwhgssfan r0,r1,r2
|
||||
39c: 10 01 15 ef evmwhgsmfan r0,r1,r2
|
||||
3a0: 7c 01 16 3e evlddepx r0,r1,r2
|
||||
3a4: 7c 01 17 3e evstddepx r0,r1,r2
|
||||
3a8: 10 01 12 c0 efsadd r0,r1,r2
|
||||
3ac: 10 01 12 c1 efssub r0,r1,r2
|
||||
3b0: 10 01 02 c4 efsabs r0,r1
|
||||
3b4: 10 01 02 c5 efsnabs r0,r1
|
||||
3b8: 10 01 02 c6 efsneg r0,r1
|
||||
3bc: 10 01 12 c8 efsmul r0,r1,r2
|
||||
3c0: 10 01 12 c9 efsdiv r0,r1,r2
|
||||
3c4: 10 01 12 cc efscmpgt cr0,r1,r2
|
||||
3c8: 10 01 12 cd efscmplt cr0,r1,r2
|
||||
3cc: 10 01 12 ce efscmpeq cr0,r1,r2
|
||||
3d0: 10 00 12 d0 efscfui r0,r2
|
||||
3d4: 10 00 12 d1 efscfsi r0,r2
|
||||
3d8: 10 00 12 d2 efscfuf r0,r2
|
||||
3dc: 10 00 12 d3 efscfsf r0,r2
|
||||
3e0: 10 00 12 d4 efsctui r0,r2
|
||||
3e4: 10 00 12 d5 efsctsi r0,r2
|
||||
3e8: 10 00 12 d6 efsctuf r0,r2
|
||||
3ec: 10 00 12 d7 efsctsf r0,r2
|
||||
3f0: 10 00 12 d8 efsctuiz r0,r2
|
||||
3f4: 10 00 12 da efsctsiz r0,r2
|
||||
3f8: 10 01 12 dc efststgt cr0,r1,r2
|
||||
3fc: 10 01 12 dd efststlt cr0,r1,r2
|
||||
400: 10 01 12 de efststeq cr0,r1,r2
|
||||
.*: 10 01 12 00 evaddw r0,r1,r2
|
||||
.*: 10 1f 12 02 evaddiw r0,r2,31
|
||||
.*: 10 01 12 04 evsubfw r0,r1,r2
|
||||
.*: 10 01 12 04 evsubfw r0,r1,r2
|
||||
.*: 10 1f 12 06 evsubifw r0,31,r2
|
||||
.*: 10 1f 12 06 evsubifw r0,31,r2
|
||||
.*: 10 01 02 08 evabs r0,r1
|
||||
.*: 10 01 02 09 evneg r0,r1
|
||||
.*: 10 01 02 0a evextsb r0,r1
|
||||
.*: 10 01 02 0b evextsh r0,r1
|
||||
.*: 10 01 02 0c evrndw r0,r1
|
||||
.*: 10 01 02 0d evcntlzw r0,r1
|
||||
.*: 10 01 02 0e evcntlsw r0,r1
|
||||
.*: 10 01 12 0f brinc r0,r1,r2
|
||||
.*: 10 01 12 11 evand r0,r1,r2
|
||||
.*: 10 01 12 12 evandc r0,r1,r2
|
||||
.*: 10 01 12 16 evxor r0,r1,r2
|
||||
.*: 10 01 0a 17 evmr r0,r1
|
||||
.*: 10 01 0a 17 evmr r0,r1
|
||||
.*: 10 01 12 17 evor r0,r1,r2
|
||||
.*: 10 01 12 18 evnor r0,r1,r2
|
||||
.*: 10 01 0a 18 evnot r0,r1
|
||||
.*: 10 01 0a 18 evnot r0,r1
|
||||
.*: 10 01 12 19 eveqv r0,r1,r2
|
||||
.*: 10 01 12 1b evorc r0,r1,r2
|
||||
.*: 10 01 12 1e evnand r0,r1,r2
|
||||
.*: 10 01 12 20 evsrwu r0,r1,r2
|
||||
.*: 10 01 12 21 evsrws r0,r1,r2
|
||||
.*: 10 01 fa 22 evsrwiu r0,r1,31
|
||||
.*: 10 01 fa 23 evsrwis r0,r1,31
|
||||
.*: 10 01 12 24 evslw r0,r1,r2
|
||||
.*: 10 01 fa 26 evslwi r0,r1,31
|
||||
.*: 10 01 12 28 evrlw r0,r1,r2
|
||||
.*: 10 10 02 29 evsplati r0,-16
|
||||
.*: 10 01 fa 2a evrlwi r0,r1,31
|
||||
.*: 10 10 02 2b evsplatfi r0,-16
|
||||
.*: 10 01 12 2c evmergehi r0,r1,r2
|
||||
.*: 10 01 12 2d evmergelo r0,r1,r2
|
||||
.*: 10 01 12 2e evmergehilo r0,r1,r2
|
||||
.*: 10 01 12 2f evmergelohi r0,r1,r2
|
||||
.*: 10 01 12 30 evcmpgtu cr0,r1,r2
|
||||
.*: 10 01 12 31 evcmpgts cr0,r1,r2
|
||||
.*: 10 01 12 32 evcmpltu cr0,r1,r2
|
||||
.*: 10 01 12 33 evcmplts cr0,r1,r2
|
||||
.*: 10 01 12 34 evcmpeq cr0,r1,r2
|
||||
.*: 10 01 12 78 evsel r0,r1,r2,cr0
|
||||
.*: 10 01 12 80 evfsadd r0,r1,r2
|
||||
.*: 10 01 12 81 evfssub r0,r1,r2
|
||||
.*: 10 01 12 82 evfsmadd r0,r1,r2
|
||||
.*: 10 01 12 83 evfsmsub r0,r1,r2
|
||||
.*: 10 01 02 84 evfsabs r0,r1
|
||||
.*: 10 01 02 85 evfsnabs r0,r1
|
||||
.*: 10 01 02 86 evfsneg r0,r1
|
||||
.*: 10 01 12 88 evfsmul r0,r1,r2
|
||||
.*: 10 01 12 89 evfsdiv r0,r1,r2
|
||||
.*: 10 01 12 8a evfsnmadd r0,r1,r2
|
||||
.*: 10 01 12 8b evfsnmsub r0,r1,r2
|
||||
.*: 10 01 12 8c evfscmpgt cr0,r1,r2
|
||||
.*: 10 01 12 8d evfscmplt cr0,r1,r2
|
||||
.*: 10 01 12 8e evfscmpeq cr0,r1,r2
|
||||
.*: 10 00 12 90 evfscfui r0,r2
|
||||
.*: 10 00 12 91 evfscfsi r0,r2
|
||||
.*: 10 00 12 92 evfscfuf r0,r2
|
||||
.*: 10 00 12 93 evfscfsf r0,r2
|
||||
.*: 10 00 12 94 evfsctui r0,r2
|
||||
.*: 10 00 12 95 evfsctsi r0,r2
|
||||
.*: 10 00 12 96 evfsctuf r0,r2
|
||||
.*: 10 00 12 97 evfsctsf r0,r2
|
||||
.*: 10 00 12 98 evfsctuiz r0,r2
|
||||
.*: 10 00 12 9a evfsctsiz r0,r2
|
||||
.*: 10 01 12 9c evfststgt cr0,r1,r2
|
||||
.*: 10 01 12 9d evfststlt cr0,r1,r2
|
||||
.*: 10 01 12 9e evfststeq cr0,r1,r2
|
||||
.*: 10 01 13 00 evlddx r0,r1,r2
|
||||
.*: 10 01 0b 01 evldd r0,8\(r1\)
|
||||
.*: 10 01 13 02 evldwx r0,r1,r2
|
||||
.*: 10 01 0b 03 evldw r0,8\(r1\)
|
||||
.*: 10 01 13 04 evldhx r0,r1,r2
|
||||
.*: 10 01 0b 05 evldh r0,8\(r1\)
|
||||
.*: 10 01 13 08 evlhhesplatx r0,r1,r2
|
||||
.*: 10 01 0b 09 evlhhesplat r0,2\(r1\)
|
||||
.*: 10 01 13 0c evlhhousplatx r0,r1,r2
|
||||
.*: 10 01 0b 0d evlhhousplat r0,2\(r1\)
|
||||
.*: 10 01 13 0e evlhhossplatx r0,r1,r2
|
||||
.*: 10 01 0b 0f evlhhossplat r0,2\(r1\)
|
||||
.*: 10 01 13 10 evlwhex r0,r1,r2
|
||||
.*: 10 01 0b 11 evlwhe r0,4\(r1\)
|
||||
.*: 10 01 13 14 evlwhoux r0,r1,r2
|
||||
.*: 10 01 0b 15 evlwhou r0,4\(r1\)
|
||||
.*: 10 01 13 16 evlwhosx r0,r1,r2
|
||||
.*: 10 01 0b 17 evlwhos r0,4\(r1\)
|
||||
.*: 10 01 13 18 evlwwsplatx r0,r1,r2
|
||||
.*: 10 01 0b 19 evlwwsplat r0,4\(r1\)
|
||||
.*: 10 01 13 1c evlwhsplatx r0,r1,r2
|
||||
.*: 10 01 0b 1d evlwhsplat r0,4\(r1\)
|
||||
.*: 10 01 13 20 evstddx r0,r1,r2
|
||||
.*: 10 01 0b 21 evstdd r0,8\(r1\)
|
||||
.*: 10 01 13 22 evstdwx r0,r1,r2
|
||||
.*: 10 01 0b 23 evstdw r0,8\(r1\)
|
||||
.*: 10 01 13 24 evstdhx r0,r1,r2
|
||||
.*: 10 01 0b 25 evstdh r0,8\(r1\)
|
||||
.*: 10 01 13 30 evstwhex r0,r1,r2
|
||||
.*: 10 01 0b 31 evstwhe r0,4\(r1\)
|
||||
.*: 10 01 13 34 evstwhox r0,r1,r2
|
||||
.*: 10 01 0b 35 evstwho r0,4\(r1\)
|
||||
.*: 10 01 13 38 evstwwex r0,r1,r2
|
||||
.*: 10 01 0b 39 evstwwe r0,4\(r1\)
|
||||
.*: 10 01 13 3c evstwwox r0,r1,r2
|
||||
.*: 10 01 0b 3d evstwwo r0,4\(r1\)
|
||||
.*: 10 01 14 03 evmhessf r0,r1,r2
|
||||
.*: 10 01 14 07 evmhossf r0,r1,r2
|
||||
.*: 10 01 14 08 evmheumi r0,r1,r2
|
||||
.*: 10 01 14 09 evmhesmi r0,r1,r2
|
||||
.*: 10 01 14 0b evmhesmf r0,r1,r2
|
||||
.*: 10 01 14 0c evmhoumi r0,r1,r2
|
||||
.*: 10 01 14 0d evmhosmi r0,r1,r2
|
||||
.*: 10 01 14 0f evmhosmf r0,r1,r2
|
||||
.*: 10 01 14 23 evmhessfa r0,r1,r2
|
||||
.*: 10 01 14 27 evmhossfa r0,r1,r2
|
||||
.*: 10 01 14 28 evmheumia r0,r1,r2
|
||||
.*: 10 01 14 29 evmhesmia r0,r1,r2
|
||||
.*: 10 01 14 2b evmhesmfa r0,r1,r2
|
||||
.*: 10 01 14 2c evmhoumia r0,r1,r2
|
||||
.*: 10 01 14 2d evmhosmia r0,r1,r2
|
||||
.*: 10 01 14 2f evmhosmfa r0,r1,r2
|
||||
.*: 10 01 14 43 evmwlssf r0,r1,r2
|
||||
.*: 10 01 14 47 evmwhssf r0,r1,r2
|
||||
.*: 10 01 14 48 evmwlumi r0,r1,r2
|
||||
.*: 10 01 14 4b evmwlsmf r0,r1,r2
|
||||
.*: 10 01 14 4c evmwhumi r0,r1,r2
|
||||
.*: 10 01 14 4d evmwhsmi r0,r1,r2
|
||||
.*: 10 01 14 4f evmwhsmf r0,r1,r2
|
||||
.*: 10 01 14 53 evmwssf r0,r1,r2
|
||||
.*: 10 01 14 58 evmwumi r0,r1,r2
|
||||
.*: 10 01 14 59 evmwsmi r0,r1,r2
|
||||
.*: 10 01 14 5b evmwsmf r0,r1,r2
|
||||
.*: 10 01 14 63 evmwlssfa r0,r1,r2
|
||||
.*: 10 01 14 67 evmwhssfa r0,r1,r2
|
||||
.*: 10 01 14 68 evmwlumia r0,r1,r2
|
||||
.*: 10 01 14 6b evmwlsmfa r0,r1,r2
|
||||
.*: 10 01 14 6c evmwhumia r0,r1,r2
|
||||
.*: 10 01 14 6d evmwhsmia r0,r1,r2
|
||||
.*: 10 01 14 6f evmwhsmfa r0,r1,r2
|
||||
.*: 10 01 14 73 evmwssfa r0,r1,r2
|
||||
.*: 10 01 14 78 evmwumia r0,r1,r2
|
||||
.*: 10 01 14 79 evmwsmia r0,r1,r2
|
||||
.*: 10 01 14 7b evmwsmfa r0,r1,r2
|
||||
.*: 10 01 04 c0 evaddusiaaw r0,r1
|
||||
.*: 10 01 04 c1 evaddssiaaw r0,r1
|
||||
.*: 10 01 04 c2 evsubfusiaaw r0,r1
|
||||
.*: 10 01 04 c3 evsubfssiaaw r0,r1
|
||||
.*: 10 01 04 c4 evmra r0,r1
|
||||
.*: 10 01 14 c6 evdivws r0,r1,r2
|
||||
.*: 10 01 14 c7 evdivwu r0,r1,r2
|
||||
.*: 10 01 04 c8 evaddumiaaw r0,r1
|
||||
.*: 10 01 04 c9 evaddsmiaaw r0,r1
|
||||
.*: 10 01 04 ca evsubfumiaaw r0,r1
|
||||
.*: 10 01 04 cb evsubfsmiaaw r0,r1
|
||||
.*: 10 01 15 00 evmheusiaaw r0,r1,r2
|
||||
.*: 10 01 15 01 evmhessiaaw r0,r1,r2
|
||||
.*: 10 01 15 03 evmhessfaaw r0,r1,r2
|
||||
.*: 10 01 15 04 evmhousiaaw r0,r1,r2
|
||||
.*: 10 01 15 05 evmhossiaaw r0,r1,r2
|
||||
.*: 10 01 15 07 evmhossfaaw r0,r1,r2
|
||||
.*: 10 01 15 08 evmheumiaaw r0,r1,r2
|
||||
.*: 10 01 15 09 evmhesmiaaw r0,r1,r2
|
||||
.*: 10 01 15 0b evmhesmfaaw r0,r1,r2
|
||||
.*: 10 01 15 0c evmhoumiaaw r0,r1,r2
|
||||
.*: 10 01 15 0d evmhosmiaaw r0,r1,r2
|
||||
.*: 10 01 15 0f evmhosmfaaw r0,r1,r2
|
||||
.*: 10 01 15 28 evmhegumiaa r0,r1,r2
|
||||
.*: 10 01 15 29 evmhegsmiaa r0,r1,r2
|
||||
.*: 10 01 15 2b evmhegsmfaa r0,r1,r2
|
||||
.*: 10 01 15 2c evmhogumiaa r0,r1,r2
|
||||
.*: 10 01 15 2d evmhogsmiaa r0,r1,r2
|
||||
.*: 10 01 15 2f evmhogsmfaa r0,r1,r2
|
||||
.*: 10 01 15 40 evmwlusiaaw r0,r1,r2
|
||||
.*: 10 01 15 41 evmwlssiaaw r0,r1,r2
|
||||
.*: 10 01 15 43 evmwlssfaaw r0,r1,r2
|
||||
.*: 10 01 15 44 evmwhusiaa r0,r1,r2
|
||||
.*: 10 01 15 45 evmwhssmaa r0,r1,r2
|
||||
.*: 10 01 15 47 evmwhssfaa r0,r1,r2
|
||||
.*: 10 01 15 48 evmwlumiaaw r0,r1,r2
|
||||
.*: 10 01 15 49 evmwlsmiaaw r0,r1,r2
|
||||
.*: 10 01 15 4b evmwlsmfaaw r0,r1,r2
|
||||
.*: 10 01 15 4c evmwhumiaa r0,r1,r2
|
||||
.*: 10 01 15 4d evmwhsmiaa r0,r1,r2
|
||||
.*: 10 01 15 4f evmwhsmfaa r0,r1,r2
|
||||
.*: 10 01 15 53 evmwssfaa r0,r1,r2
|
||||
.*: 10 01 15 58 evmwumiaa r0,r1,r2
|
||||
.*: 10 01 15 59 evmwsmiaa r0,r1,r2
|
||||
.*: 10 01 15 5b evmwsmfaa r0,r1,r2
|
||||
.*: 10 01 15 64 evmwhgumiaa r0,r1,r2
|
||||
.*: 10 01 15 65 evmwhgsmiaa r0,r1,r2
|
||||
.*: 10 01 15 67 evmwhgssfaa r0,r1,r2
|
||||
.*: 10 01 15 6f evmwhgsmfaa r0,r1,r2
|
||||
.*: 10 01 15 80 evmheusianw r0,r1,r2
|
||||
.*: 10 01 15 81 evmhessianw r0,r1,r2
|
||||
.*: 10 01 15 83 evmhessfanw r0,r1,r2
|
||||
.*: 10 01 15 84 evmhousianw r0,r1,r2
|
||||
.*: 10 01 15 85 evmhossianw r0,r1,r2
|
||||
.*: 10 01 15 87 evmhossfanw r0,r1,r2
|
||||
.*: 10 01 15 88 evmheumianw r0,r1,r2
|
||||
.*: 10 01 15 89 evmhesmianw r0,r1,r2
|
||||
.*: 10 01 15 8b evmhesmfanw r0,r1,r2
|
||||
.*: 10 01 15 8c evmhoumianw r0,r1,r2
|
||||
.*: 10 01 15 8d evmhosmianw r0,r1,r2
|
||||
.*: 10 01 15 8f evmhosmfanw r0,r1,r2
|
||||
.*: 10 01 15 a8 evmhegumian r0,r1,r2
|
||||
.*: 10 01 15 a9 evmhegsmian r0,r1,r2
|
||||
.*: 10 01 15 ab evmhegsmfan r0,r1,r2
|
||||
.*: 10 01 15 ac evmhogumian r0,r1,r2
|
||||
.*: 10 01 15 ad evmhogsmian r0,r1,r2
|
||||
.*: 10 01 15 af evmhogsmfan r0,r1,r2
|
||||
.*: 10 01 15 c0 evmwlusianw r0,r1,r2
|
||||
.*: 10 01 15 c1 evmwlssianw r0,r1,r2
|
||||
.*: 10 01 15 c3 evmwlssfanw r0,r1,r2
|
||||
.*: 10 01 15 c4 evmwhusian r0,r1,r2
|
||||
.*: 10 01 15 c5 evmwhssian r0,r1,r2
|
||||
.*: 10 01 15 c7 evmwhssfan r0,r1,r2
|
||||
.*: 10 01 15 c8 evmwlumianw r0,r1,r2
|
||||
.*: 10 01 15 c9 evmwlsmianw r0,r1,r2
|
||||
.*: 10 01 15 cb evmwlsmfanw r0,r1,r2
|
||||
.*: 10 01 15 cc evmwhumian r0,r1,r2
|
||||
.*: 10 01 15 cd evmwhsmian r0,r1,r2
|
||||
.*: 10 01 15 cf evmwhsmfan r0,r1,r2
|
||||
.*: 10 01 15 d3 evmwssfan r0,r1,r2
|
||||
.*: 10 01 15 d8 evmwumian r0,r1,r2
|
||||
.*: 10 01 15 d9 evmwsmian r0,r1,r2
|
||||
.*: 10 01 15 db evmwsmfan r0,r1,r2
|
||||
.*: 10 01 15 e4 evmwhgumian r0,r1,r2
|
||||
.*: 10 01 15 e5 evmwhgsmian r0,r1,r2
|
||||
.*: 10 01 15 e7 evmwhgssfan r0,r1,r2
|
||||
.*: 10 01 15 ef evmwhgsmfan r0,r1,r2
|
||||
.*: 7c 01 16 3e evlddepx r0,r1,r2
|
||||
.*: 7c 01 17 3e evstddepx r0,r1,r2
|
||||
.*: 10 01 12 c0 efsadd r0,r1,r2
|
||||
.*: 10 01 12 c1 efssub r0,r1,r2
|
||||
.*: 10 01 02 c4 efsabs r0,r1
|
||||
.*: 10 01 02 c5 efsnabs r0,r1
|
||||
.*: 10 01 02 c6 efsneg r0,r1
|
||||
.*: 10 01 12 c8 efsmul r0,r1,r2
|
||||
.*: 10 01 12 c9 efsdiv r0,r1,r2
|
||||
.*: 10 01 12 cc efscmpgt cr0,r1,r2
|
||||
.*: 10 01 12 cd efscmplt cr0,r1,r2
|
||||
.*: 10 01 12 ce efscmpeq cr0,r1,r2
|
||||
.*: 10 00 12 d0 efscfui r0,r2
|
||||
.*: 10 00 12 d1 efscfsi r0,r2
|
||||
.*: 10 00 12 d2 efscfuf r0,r2
|
||||
.*: 10 00 12 d3 efscfsf r0,r2
|
||||
.*: 10 00 12 d4 efsctui r0,r2
|
||||
.*: 10 00 12 d5 efsctsi r0,r2
|
||||
.*: 10 00 12 d6 efsctuf r0,r2
|
||||
.*: 10 00 12 d7 efsctsf r0,r2
|
||||
.*: 10 00 12 d8 efsctuiz r0,r2
|
||||
.*: 10 00 12 da efsctsiz r0,r2
|
||||
.*: 10 01 12 dc efststgt cr0,r1,r2
|
||||
.*: 10 01 12 dd efststlt cr0,r1,r2
|
||||
.*: 10 01 12 de efststeq cr0,r1,r2
|
||||
#pass
|
||||
|
|
|
|||
|
|
@ -31,9 +31,11 @@
|
|||
evandc rS, rA, rB
|
||||
evxor rS, rA, rB
|
||||
evmr rS, rA
|
||||
evor rS, rA, rA
|
||||
evor rS, rA, rB
|
||||
evnor rS, rA, rB
|
||||
evnot rS, rA
|
||||
evnor rS, rA, rA
|
||||
eveqv rS, rA, rB
|
||||
evorc rS, rA, rB
|
||||
evnand rS, rA, rB
|
||||
|
|
|
|||
|
|
@ -1,3 +1,7 @@
|
|||
2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
|
||||
|
||||
* opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
|
||||
|
||||
2018-05-18 Kito Cheng <kito.cheng@gmail.com>
|
||||
|
||||
* elf/riscv.h (EF_RISCV_RVE): New define.
|
||||
|
|
|
|||
|
|
@ -405,14 +405,6 @@ extern const unsigned int num_powerpc_operands;
|
|||
/* Valid range of operand is 0..n rather than 0..n-1. */
|
||||
#define PPC_OPERAND_PLUS1 (0x20000)
|
||||
|
||||
/* This operand does not actually exist in the assembler input. This
|
||||
is used to support extended mnemonics such as mr, for which two
|
||||
operands fields are identical. The assembler should call the
|
||||
insert function with any op value. The disassembler should call
|
||||
the extract function, ignore the return value, and check the value
|
||||
placed in the valid argument. */
|
||||
#define PPC_OPERAND_FAKE (0x40000)
|
||||
|
||||
/* This operand is optional, and is zero if omitted. This is used for
|
||||
example, in the optional BF field in the comparison instructions. The
|
||||
assembler must count the number of operands remaining on the line,
|
||||
|
|
|
|||
|
|
@ -1,3 +1,17 @@
|
|||
2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
|
||||
|
||||
* ppc-opc.c (insert_bat, extract_bat, insert_bba, extract_bba,
|
||||
insert_rbs, extract_rbs, insert_xb6s, extract_xb6s): Delete functions.
|
||||
(insert_bab, extract_bab, insert_btab, extract_btab,
|
||||
insert_rsb, extract_rsb, insert_xab6, extract_xab6): New functions.
|
||||
(BAT, BBA VBA RBS XB6S): Delete macros.
|
||||
(BTAB, BAB, VAB, RAB, RSB, XAB6): New macros.
|
||||
(BB, BD, RBX, XC6): Update for new macros.
|
||||
(powerpc_opcodes) <evmr, evnot, vmr, vnot, crnot, crclr, crset,
|
||||
crmove, not, not., mr, mr., xxspltd, xxswapd, xvmovsp, xvmovdp,
|
||||
e_crnot, e_crclr, e_crset, e_crmove>: Likewise.
|
||||
* ppc-dis.c (print_insn_powerpc): Delete handling of fake operands.
|
||||
|
||||
2018-05-18 John Darrington <john@darrington.wattle.id.au>
|
||||
|
||||
* Makefile.am: Add support for s12z architecture.
|
||||
|
|
|
|||
|
|
@ -725,12 +725,6 @@ print_insn_powerpc (bfd_vma memaddr,
|
|||
|
||||
operand = powerpc_operands + *opindex;
|
||||
|
||||
/* Operands that are marked FAKE are simply ignored. We
|
||||
already made sure that the extract function considered
|
||||
the instruction to be valid. */
|
||||
if ((operand->flags & PPC_OPERAND_FAKE) != 0)
|
||||
continue;
|
||||
|
||||
/* If all of the optional operands have the value zero,
|
||||
then don't print any of them. */
|
||||
if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
|
||||
|
|
|
|||
|
|
@ -143,54 +143,59 @@ extract_ry (uint64_t insn,
|
|||
return value + 16;
|
||||
}
|
||||
|
||||
/* The BA field in an XL form instruction when it must be the same as
|
||||
the BT field in the same instruction. This operand is marked FAKE.
|
||||
The insertion function just copies the BT field into the BA field,
|
||||
and the extraction function just checks that the fields are the
|
||||
same. */
|
||||
/* The BA and BB fields in an XL form instruction or the RA and RB fields or
|
||||
VRA and VRB fields in a VX form instruction when they must be the same.
|
||||
This is used for extended mnemonics like crclr. The extraction function
|
||||
enforces that the fields are the same. */
|
||||
|
||||
static uint64_t
|
||||
insert_bat (uint64_t insn,
|
||||
int64_t value ATTRIBUTE_UNUSED,
|
||||
insert_bab (uint64_t insn,
|
||||
int64_t value,
|
||||
ppc_cpu_t dialect ATTRIBUTE_UNUSED,
|
||||
const char **errmsg ATTRIBUTE_UNUSED)
|
||||
{
|
||||
return insn | (((insn >> 21) & 0x1f) << 16);
|
||||
value &= 0x1f;
|
||||
return insn | (value << 16) | (value << 11);
|
||||
}
|
||||
|
||||
static int64_t
|
||||
extract_bat (uint64_t insn,
|
||||
extract_bab (uint64_t insn,
|
||||
ppc_cpu_t dialect ATTRIBUTE_UNUSED,
|
||||
int *invalid)
|
||||
{
|
||||
if (((insn >> 21) & 0x1f) != ((insn >> 16) & 0x1f))
|
||||
int64_t ba = (insn >> 16) & 0x1f;
|
||||
int64_t bb = (insn >> 11) & 0x1f;
|
||||
|
||||
if (ba != bb)
|
||||
*invalid = 1;
|
||||
return 0;
|
||||
return ba;
|
||||
}
|
||||
|
||||
/* The BB field in an XL form instruction when it must be the same as
|
||||
the BA field in the same instruction. This operand is marked FAKE.
|
||||
The insertion function just copies the BA field into the BB field,
|
||||
and the extraction function just checks that the fields are the
|
||||
same. */
|
||||
/* The BT, BA and BB fields in an XL form instruction when they must all be
|
||||
the same. This is used for extended mnemonics like crclr. The extraction
|
||||
function enforces that the fields are the same. */
|
||||
|
||||
static uint64_t
|
||||
insert_bba (uint64_t insn,
|
||||
int64_t value ATTRIBUTE_UNUSED,
|
||||
ppc_cpu_t dialect ATTRIBUTE_UNUSED,
|
||||
const char **errmsg ATTRIBUTE_UNUSED)
|
||||
insert_btab (uint64_t insn,
|
||||
int64_t value,
|
||||
ppc_cpu_t dialect,
|
||||
const char **errmsg)
|
||||
{
|
||||
return insn | (((insn >> 16) & 0x1f) << 11);
|
||||
value &= 0x1f;
|
||||
return (value << 21) | insert_bab (insn, value, dialect, errmsg);
|
||||
}
|
||||
|
||||
static int64_t
|
||||
extract_bba (uint64_t insn,
|
||||
ppc_cpu_t dialect ATTRIBUTE_UNUSED,
|
||||
extract_btab (uint64_t insn,
|
||||
ppc_cpu_t dialect,
|
||||
int *invalid)
|
||||
{
|
||||
if (((insn >> 16) & 0x1f) != ((insn >> 11) & 0x1f))
|
||||
int64_t bt = (insn >> 21) & 0x1f;
|
||||
int64_t bab = extract_bab (insn, dialect, invalid);
|
||||
|
||||
if (bt != bab)
|
||||
*invalid = 1;
|
||||
return 0;
|
||||
return bt;
|
||||
}
|
||||
|
||||
/* The BD field in a B form instruction when the - modifier is used.
|
||||
|
|
@ -944,29 +949,31 @@ extract_ras (uint64_t insn,
|
|||
return ravalue;
|
||||
}
|
||||
|
||||
/* The RB field in an X form instruction when it must be the same as
|
||||
the RS field in the instruction. This is used for extended
|
||||
mnemonics like mr. This operand is marked FAKE. The insertion
|
||||
function just copies the BT field into the BA field, and the
|
||||
extraction function just checks that the fields are the same. */
|
||||
/* The RS and RB fields in an X form instruction when they must be the same.
|
||||
This is used for extended mnemonics like mr. The extraction function
|
||||
enforces that the fields are the same. */
|
||||
|
||||
static uint64_t
|
||||
insert_rbs (uint64_t insn,
|
||||
int64_t value ATTRIBUTE_UNUSED,
|
||||
insert_rsb (uint64_t insn,
|
||||
int64_t value,
|
||||
ppc_cpu_t dialect ATTRIBUTE_UNUSED,
|
||||
const char **errmsg ATTRIBUTE_UNUSED)
|
||||
{
|
||||
return insn | (((insn >> 21) & 0x1f) << 11);
|
||||
value &= 0x1f;
|
||||
return insn | (value << 21) | (value << 11);
|
||||
}
|
||||
|
||||
static int64_t
|
||||
extract_rbs (uint64_t insn,
|
||||
extract_rsb (uint64_t insn,
|
||||
ppc_cpu_t dialect ATTRIBUTE_UNUSED,
|
||||
int *invalid)
|
||||
{
|
||||
if (((insn >> 21) & 0x1f) != ((insn >> 11) & 0x1f))
|
||||
int64_t rs = (insn >> 21) & 0x1f;
|
||||
int64_t rb = (insn >> 11) & 0x1f;
|
||||
|
||||
if (rs != rb)
|
||||
*invalid = 1;
|
||||
return 0;
|
||||
return rs;
|
||||
}
|
||||
|
||||
/* The RB field in an lswx instruction, which has special value
|
||||
|
|
@ -1318,30 +1325,31 @@ extract_xb6 (uint64_t insn,
|
|||
return ((insn << 4) & 0x20) | ((insn >> 11) & 0x1f);
|
||||
}
|
||||
|
||||
/* The XB field in an XX3 form instruction when it must be the same as
|
||||
the XA field in the instruction. This is used for extended
|
||||
mnemonics like xvmovdp. This operand is marked FAKE. The insertion
|
||||
function just copies the XA field into the XB field, and the
|
||||
extraction function just checks that the fields are the same. */
|
||||
/* The XA and XB fields in an XX3 form instruction when they must be the same.
|
||||
This is used for extended mnemonics like xvmovdp. The extraction function
|
||||
enforces that the fields are the same. */
|
||||
|
||||
static uint64_t
|
||||
insert_xb6s (uint64_t insn,
|
||||
int64_t value ATTRIBUTE_UNUSED,
|
||||
ppc_cpu_t dialect ATTRIBUTE_UNUSED,
|
||||
const char **errmsg ATTRIBUTE_UNUSED)
|
||||
insert_xab6 (uint64_t insn,
|
||||
int64_t value,
|
||||
ppc_cpu_t dialect,
|
||||
const char **errmsg)
|
||||
{
|
||||
return insn | (((insn >> 16) & 0x1f) << 11) | (((insn >> 2) & 0x1) << 1);
|
||||
return insert_xa6 (insn, value, dialect, errmsg)
|
||||
| insert_xb6 (insn, value, dialect, errmsg);
|
||||
}
|
||||
|
||||
static int64_t
|
||||
extract_xb6s (uint64_t insn,
|
||||
ppc_cpu_t dialect ATTRIBUTE_UNUSED,
|
||||
extract_xab6 (uint64_t insn,
|
||||
ppc_cpu_t dialect,
|
||||
int *invalid)
|
||||
{
|
||||
if ((((insn >> 16) & 0x1f) != ((insn >> 11) & 0x1f))
|
||||
|| (((insn >> 2) & 0x1) != ((insn >> 1) & 0x1)))
|
||||
int64_t xa6 = extract_xa6 (insn, dialect, invalid);
|
||||
int64_t xb6 = extract_xb6 (insn, dialect, invalid);
|
||||
|
||||
if (xa6 != xb6)
|
||||
*invalid = 1;
|
||||
return 0;
|
||||
return xa6;
|
||||
}
|
||||
|
||||
/* The XC field in an XX4 form instruction. This is split. */
|
||||
|
|
@ -1756,27 +1764,34 @@ const struct powerpc_operand powerpc_operands[] =
|
|||
#define BI_MASK (0x1f << 16)
|
||||
{ 0x1f, 16, NULL, NULL, PPC_OPERAND_CR_BIT },
|
||||
|
||||
/* The BA field in an XL form instruction when it must be the same
|
||||
as the BT field in the same instruction. */
|
||||
#define BAT BA + 1
|
||||
{ 0x1f, 16, insert_bat, extract_bat, PPC_OPERAND_FAKE },
|
||||
/* The BT, BA and BB fields in a XL form instruction when they must all
|
||||
be the same. */
|
||||
#define BTAB BA + 1
|
||||
{ 0x1f, 21, insert_btab, extract_btab, PPC_OPERAND_CR_BIT },
|
||||
|
||||
/* The BB field in an XL form instruction. */
|
||||
#define BB BAT + 1
|
||||
#define BB BTAB + 1
|
||||
#define BB_MASK (0x1f << 11)
|
||||
{ 0x1f, 11, NULL, NULL, PPC_OPERAND_CR_BIT },
|
||||
|
||||
/* The BB field in an XL form instruction when it must be the same
|
||||
as the BA field in the same instruction. */
|
||||
#define BBA BB + 1
|
||||
/* The VB field in a VX form instruction when it must be the same
|
||||
as the VA field in the same instruction. */
|
||||
#define VBA BBA
|
||||
{ 0x1f, 11, insert_bba, extract_bba, PPC_OPERAND_FAKE },
|
||||
/* The BA and BB fields in a XL form instruction when they must be
|
||||
the same. */
|
||||
#define BAB BB + 1
|
||||
{ 0x1f, 16, insert_bab, extract_bab, PPC_OPERAND_CR_BIT },
|
||||
|
||||
/* The VRA and VRB fields in a VX form instruction when they must be the same.
|
||||
This is used for extended mnemonics like vmr. */
|
||||
#define VAB BAB + 1
|
||||
{ 0x1f, 16, insert_bab, extract_bab, PPC_OPERAND_VR },
|
||||
|
||||
/* The RA and RB fields in a VX form instruction when they must be the same.
|
||||
This is used for extended mnemonics like evmr. */
|
||||
#define RAB VAB + 1
|
||||
{ 0x1f, 16, insert_bab, extract_bab, PPC_OPERAND_GPR },
|
||||
|
||||
/* The BD field in a B form instruction. The lower two bits are
|
||||
forced to zero. */
|
||||
#define BD BBA + 1
|
||||
#define BD RAB + 1
|
||||
{ 0xfffc, 0, NULL, NULL, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
|
||||
|
||||
/* The BD field in a B form instruction when absolute addressing is
|
||||
|
|
@ -2155,15 +2170,14 @@ const struct powerpc_operand powerpc_operands[] =
|
|||
#define RB_MASK (0x1f << 11)
|
||||
{ 0x1f, 11, NULL, NULL, PPC_OPERAND_GPR },
|
||||
|
||||
/* The RB field in an X form instruction when it must be the same as
|
||||
the RS field in the instruction. This is used for extended
|
||||
mnemonics like mr. */
|
||||
#define RBS RB + 1
|
||||
{ 0x1f, 11, insert_rbs, extract_rbs, PPC_OPERAND_FAKE },
|
||||
/* The RS and RB fields in an X form instruction when they must be the same.
|
||||
This is used for extended mnemonics like mr. */
|
||||
#define RSB RB + 1
|
||||
{ 0x1f, 11, insert_rsb, extract_rsb, PPC_OPERAND_GPR },
|
||||
|
||||
/* The RB field in an lswx instruction, which has special value
|
||||
restrictions. */
|
||||
#define RBX RBS + 1
|
||||
#define RBX RSB + 1
|
||||
{ 0x1f, 11, insert_rbx, extract_rbx, PPC_OPERAND_GPR },
|
||||
|
||||
/* The RB field of the dccci and iccci instructions, which are optional. */
|
||||
|
|
@ -2564,14 +2578,13 @@ const struct powerpc_operand powerpc_operands[] =
|
|||
#define XB6 XA6 + 1
|
||||
{ 0x3f, PPC_OPSHIFT_INV, insert_xb6, extract_xb6, PPC_OPERAND_VSR },
|
||||
|
||||
/* The XB field in an XX3 form instruction when it must be the same as
|
||||
the XA field in the instruction. This is used in extended mnemonics
|
||||
like xvmovdp. This is split. */
|
||||
#define XB6S XB6 + 1
|
||||
{ 0x3f, PPC_OPSHIFT_INV, insert_xb6s, extract_xb6s, PPC_OPERAND_FAKE },
|
||||
/* The XA and XB fields in an XX3 form instruction when they must be the same.
|
||||
This is used in extended mnemonics like xvmovdp. This is split. */
|
||||
#define XAB6 XB6 + 1
|
||||
{ 0x3f, PPC_OPSHIFT_INV, insert_xab6, extract_xab6, PPC_OPERAND_VSR },
|
||||
|
||||
/* The XC field in an XX4 form instruction. This is split. */
|
||||
#define XC6 XB6S + 1
|
||||
#define XC6 XAB6 + 1
|
||||
{ 0x3f, PPC_OPSHIFT_INV, insert_xc6, extract_xc6, PPC_OPERAND_VSR },
|
||||
|
||||
/* The DM or SHW field in an XX3 form instruction. */
|
||||
|
|
@ -3792,10 +3805,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"evand", VX (4, 529), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
|
||||
{"evandc", VX (4, 530), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
|
||||
{"evxor", VX (4, 534), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
|
||||
{"evmr", VX (4, 535), VX_MASK, PPCSPE, 0, {RS, RA, BBA}},
|
||||
{"evmr", VX (4, 535), VX_MASK, PPCSPE, 0, {RS, RAB}},
|
||||
{"evor", VX (4, 535), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
|
||||
{"evnot", VX (4, 536), VX_MASK, PPCSPE, 0, {RS, RAB}},
|
||||
{"evnor", VX (4, 536), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
|
||||
{"evnot", VX (4, 536), VX_MASK, PPCSPE, 0, {RS, RA, BBA}},
|
||||
{"get", APU(4, 268,0), APU_RA_MASK, PPC405, 0, {RT, FSL}},
|
||||
{"eveqv", VX (4, 537), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
|
||||
{"evorc", VX (4, 539), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
|
||||
|
|
@ -4139,7 +4152,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"bcdus.", VX (4,1153), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
|
||||
{"vavguw", VX (4,1154), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
|
||||
{"vabsduw", VX (4,1155), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
|
||||
{"vmr", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VA, VBA}},
|
||||
{"vmr", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VAB}},
|
||||
{"vor", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
|
||||
{"vcmpnew.", VXR(4, 135,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
|
||||
{"vpmsumw", VX (4,1160), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
|
||||
|
|
@ -4183,7 +4196,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"vavgsb", VX (4,1282), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
|
||||
{"evmhessfaaw", VX (4,1283), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
|
||||
{"evmhousiaaw", VX (4,1284), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
|
||||
{"vnot", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VA, VBA}},
|
||||
{"vnot", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VAB}},
|
||||
{"vnor", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
|
||||
{"evmhossiaaw", VX (4,1285), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
|
||||
{"udi4fcm.", APU(4, 643,0), APU_MASK, PPC405|PPC440, 0, {URT, URA, URB}},
|
||||
|
|
@ -4955,7 +4968,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
|
||||
{"rfid", XL(19,18), 0xffffffff, PPC64, PPCVLE, {0}},
|
||||
|
||||
{"crnot", XL(19,33), XL_MASK, PPCCOM, PPCVLE, {BT, BA, BBA}},
|
||||
{"crnot", XL(19,33), XL_MASK, PPCCOM, PPCVLE, {BT, BAB}},
|
||||
{"crnor", XL(19,33), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
|
||||
{"rfmci", X(19,38), 0xffffffff, PPCRFMCI|PPCA2|PPC476, PPCVLE, {0}},
|
||||
|
||||
|
|
@ -4975,7 +4988,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"isync", XL(19,150), 0xffffffff, PPCCOM, PPCVLE, {0}},
|
||||
{"ics", XL(19,150), 0xffffffff, PWRCOM, PPCVLE, {0}},
|
||||
|
||||
{"crclr", XL(19,193), XL_MASK, PPCCOM, PPCVLE, {BT, BAT, BBA}},
|
||||
{"crclr", XL(19,193), XL_MASK, PPCCOM, PPCVLE, {BTAB}},
|
||||
{"crxor", XL(19,193), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
|
||||
|
||||
{"dnh", X(19,198), X_MASK, E500MC, PPCVLE, {DUI, DUIS}},
|
||||
|
|
@ -4986,7 +4999,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
|
||||
{"hrfid", XL(19,274), 0xffffffff, POWER5|CELL, PPC476|PPCVLE, {0}},
|
||||
|
||||
{"crset", XL(19,289), XL_MASK, PPCCOM, PPCVLE, {BT, BAT, BBA}},
|
||||
{"crset", XL(19,289), XL_MASK, PPCCOM, PPCVLE, {BTAB}},
|
||||
{"creqv", XL(19,289), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
|
||||
|
||||
{"urfid", XL(19,306), 0xffffffff, POWER9, PPCVLE, {0}},
|
||||
|
|
@ -4998,7 +5011,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
|
||||
{"nap", XL(19,434), 0xffffffff, POWER6, POWER9|PPCVLE, {0}},
|
||||
|
||||
{"crmove", XL(19,449), XL_MASK, PPCCOM, PPCVLE, {BT, BA, BBA}},
|
||||
{"crmove", XL(19,449), XL_MASK, PPCCOM, PPCVLE, {BT, BAB}},
|
||||
{"cror", XL(19,449), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
|
||||
|
||||
{"sleep", XL(19,466), 0xffffffff, POWER6, POWER9|PPCVLE, {0}},
|
||||
|
|
@ -5463,9 +5476,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
|
||||
{"popcntb", X(31,122), XRB_MASK, POWER5, 0, {RA, RS}},
|
||||
|
||||
{"not", XRC(31,124,0), X_MASK, COM, 0, {RA, RS, RBS}},
|
||||
{"not", XRC(31,124,0), X_MASK, COM, 0, {RA, RSB}},
|
||||
{"nor", XRC(31,124,0), X_MASK, COM, 0, {RA, RS, RB}},
|
||||
{"not.", XRC(31,124,1), X_MASK, COM, 0, {RA, RS, RBS}},
|
||||
{"not.", XRC(31,124,1), X_MASK, COM, 0, {RA, RSB}},
|
||||
{"nor.", XRC(31,124,1), X_MASK, COM, 0, {RA, RS, RB}},
|
||||
|
||||
{"dcbfep", XRT(31,127,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
|
||||
|
|
@ -6073,9 +6086,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"yield", 0x7f7bdb78, 0xffffffff, POWER7, 0, {0}},
|
||||
{"mdoio", 0x7fbdeb78, 0xffffffff, POWER7, 0, {0}},
|
||||
{"mdoom", 0x7fdef378, 0xffffffff, POWER7, 0, {0}},
|
||||
{"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RBS}},
|
||||
{"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RSB}},
|
||||
{"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}},
|
||||
{"mr.", XRC(31,444,1), X_MASK, COM, 0, {RA, RS, RBS}},
|
||||
{"mr.", XRC(31,444,1), X_MASK, COM, 0, {RA, RSB}},
|
||||
{"or.", XRC(31,444,1), X_MASK, COM, 0, {RA, RS, RB}},
|
||||
|
||||
{"mtexisr", XSPR(31,451, 64), XSPR_MASK, PPC403, 0, {RS}},
|
||||
|
|
@ -7052,9 +7065,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"xxsel", XX4(60,3), XX4_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6, XC6}},
|
||||
{"xssubsp", XX3(60,8), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
|
||||
{"xsmaddmsp", XX3(60,9), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
|
||||
{"xxspltd", XX3(60,10), XX3DM_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6S, DMEX}},
|
||||
{"xxspltd", XX3(60,10), XX3DM_MASK, PPCVSX, PPCVLE, {XT6, XAB6, DMEX}},
|
||||
{"xxmrghd", XX3(60,10), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
|
||||
{"xxswapd", XX3(60,10)|(2<<8), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6S}},
|
||||
{"xxswapd", XX3(60,10)|(2<<8), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
|
||||
{"xxmrgld", XX3(60,10)|(3<<8), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
|
||||
{"xxpermdi", XX3(60,10), XX3DM_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6, DM}},
|
||||
{"xscmpgtdp", XX3(60,11), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},
|
||||
|
|
@ -7202,7 +7215,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"xvnmaddmsp", XX3(60,201), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
|
||||
{"xvcvspsxds", XX2(60,408), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
|
||||
{"xvabssp", XX2(60,409), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
|
||||
{"xvmovsp", XX3(60,208), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6S}},
|
||||
{"xvmovsp", XX3(60,208), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
|
||||
{"xvcpsgnsp", XX3(60,208), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
|
||||
{"xvnmsubasp", XX3(60,209), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
|
||||
{"xvcvuxdsp", XX2(60,424), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
|
||||
|
|
@ -7231,7 +7244,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"xvcvhpsp", XX2VA(60,475,24),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
|
||||
{"xvcvsphp", XX2VA(60,475,25),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
|
||||
{"xxbrq", XX2VA(60,475,31),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
|
||||
{"xvmovdp", XX3(60,240), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6S}},
|
||||
{"xvmovdp", XX3(60,240), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
|
||||
{"xvcpsgndp", XX3(60,240), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
|
||||
{"xvnmsubadp", XX3(60,241), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
|
||||
{"xvcvuxddp", XX2(60,488), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
|
||||
|
|
@ -8419,9 +8432,9 @@ const struct powerpc_opcode vle_opcodes[] = {
|
|||
{"e_cmphl", X(31,46), X_MASK, PPCVLE, 0, {CRD, RA, RB}},
|
||||
{"e_crandc", XL(31,129), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
|
||||
{"e_crnand", XL(31,225), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
|
||||
{"e_crnot", XL(31,33), XL_MASK, PPCVLE, 0, {BT, BA, BBA}},
|
||||
{"e_crnot", XL(31,33), XL_MASK, PPCVLE, 0, {BT, BAB}},
|
||||
{"e_crnor", XL(31,33), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
|
||||
{"e_crclr", XL(31,193), XL_MASK, PPCVLE, 0, {BT, BAT, BBA}},
|
||||
{"e_crclr", XL(31,193), XL_MASK, PPCVLE, 0, {BTAB}},
|
||||
{"e_crxor", XL(31,193), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
|
||||
{"e_mcrf", XL(31,16), XL_MASK, PPCVLE, 0, {CRD, CR}},
|
||||
{"e_slwi", EX(31,112), EX_MASK, PPCVLE, 0, {RA, RS, SH}},
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@ -8432,7 +8445,7 @@ const struct powerpc_opcode vle_opcodes[] = {
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{"e_rlw", EX(31,560), EX_MASK, PPCVLE, 0, {RA, RS, RB}},
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{"e_rlw.", EX(31,561), EX_MASK, PPCVLE, 0, {RA, RS, RB}},
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{"e_crset", XL(31,289), XL_MASK, PPCVLE, 0, {BT, BAT, BBA}},
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{"e_crset", XL(31,289), XL_MASK, PPCVLE, 0, {BTAB}},
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{"e_creqv", XL(31,289), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
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{"e_rlwi", EX(31,624), EX_MASK, PPCVLE, 0, {RA, RS, SH}},
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@ -8440,7 +8453,7 @@ const struct powerpc_opcode vle_opcodes[] = {
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{"e_crorc", XL(31,417), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
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{"e_crmove", XL(31,449), XL_MASK, PPCVLE, 0, {BT, BA, BBA}},
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{"e_crmove", XL(31,449), XL_MASK, PPCVLE, 0, {BT, BAB}},
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{"e_cror", XL(31,449), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
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{"mtmas1", XSPR(31,467,625), XSPR_MASK, PPCVLE, 0, {RS}},
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||||
|
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Loading…
Reference in New Issue