* sparc-dis.c (print_insn_sparc): Renamed from print_insn.
If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode architecture. (print_insn_sparc64): Deleted. * disassemble.c (disassembler, case bfd_arch_sparc): Always use print_insn_sparc.
This commit is contained in:
David Edelsohn
parent
458bbd1f1e
commit
986c92a711
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@ -1,7 +1,11 @@
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Mon Jan 22 08:29:59 1996 Doug Evans <dje@charmed.cygnus.com>
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* disassemble.c (disassembler, case bfd_arch_sparc): bfd_mach_sparc64
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renamed to bfd_mach_sparc_v9. Check for bfd_mach_sparc_v9a.
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* sparc-dis.c (print_insn_sparc): Renamed from print_insn.
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If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
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architecture.
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(print_insn_sparc64): Deleted.
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* disassemble.c (disassembler, case bfd_arch_sparc): Always use
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print_insn_sparc.
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* sparc-opc.c (architecture_pname): Add v9a.
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@ -1,5 +1,5 @@
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/* Print SPARC instructions.
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Copyright 1989, 1991, 1992, 1993, 1995 Free Software Foundation, Inc.
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Copyright (C) 1989, 91-93, 1995, 1996 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -52,19 +52,16 @@ static char *reg_names[] =
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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#ifndef NO_V9
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"f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
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"f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
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"f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
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"f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
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/* psr, wim, tbr, fpsr, cpsr are v8 only. */
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#endif
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"y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr"
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};
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#define freg_names (®_names[4 * 8])
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#ifndef NO_V9
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/* These are ordered according to there register number in
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rdpr and wrpr insns. */
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static char *v9_priv_reg_names[] =
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@ -74,7 +71,6 @@ static char *v9_priv_reg_names[] =
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"wstate", "fq"
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/* "ver" - special cased */
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};
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#endif
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/* Macros used to extract instruction fields. Not all fields have
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macros defined here, only those which are actually used. */
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@ -89,10 +85,10 @@ static char *v9_priv_reg_names[] =
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#define X_IMM22(i) X_DISP22 (i)
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#define X_DISP30(i) (((i) >> 0) & 0x3fffffff)
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#ifndef NO_V9
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/* These are for v9. */
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#define X_DISP16(i) (((((i) >> 20) & 3) << 14) | (((i) >> 0) & 0x3fff))
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#define X_DISP19(i) (((i) >> 0) & 0x7ffff)
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#define X_MEMBAR(i) ((i) & 0x7f)
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#endif
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/* Here is the union which was used to extract instruction fields
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before the shift and mask macros were written.
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@ -132,7 +128,6 @@ static char *v9_priv_reg_names[] =
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#define disp22 branch.DISP22
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#define imm22 disp22
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} branch;
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#ifndef NO_V9
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struct
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{
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unsigned int anop:2;
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@ -145,7 +140,6 @@ static char *v9_priv_reg_names[] =
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unsigned int _rs1:5;
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unsigned int DISP16LO:14;
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} branch16;
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#endif
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struct
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{
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unsigned int anop:2;
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@ -187,17 +181,17 @@ static int compare_opcodes ();
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displacement to that register, or it is an `add' or `or' instruction
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on that register. */
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static int
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print_insn (memaddr, info, sparc64_p)
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int
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print_insn_sparc (memaddr, info)
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bfd_vma memaddr;
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disassemble_info *info;
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int sparc64_p;
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{
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FILE *stream = info->stream;
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bfd_byte buffer[4];
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unsigned long insn;
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register unsigned int i;
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register struct opcode_hash *op;
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int sparc_v9_p = bfd_mach_sparc_v9_p (info->mach);
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if (!opcodes_initialized)
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{
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@ -219,6 +213,9 @@ print_insn (memaddr, info, sparc64_p)
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insn = bfd_getb32 (buffer);
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if (DISASM_RAW_INSN (info))
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(*info->fprintf_func) (stream, "0x%08lx\t", insn);
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info->insn_info_valid = 1; /* We do return this info */
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info->insn_type = dis_nonbranch; /* Assume non branch insn */
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info->branch_delay_insns = 0; /* Assume no delay */
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@ -229,12 +226,12 @@ print_insn (memaddr, info, sparc64_p)
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CONST struct sparc_opcode *opcode = op->opcode;
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/* If the current architecture isn't sparc64, skip sparc64 insns. */
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if (!sparc64_p
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&& opcode->architecture == v9)
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if (!sparc_v9_p
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&& opcode->architecture >= v9)
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continue;
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/* If the current architecture is sparc64, skip sparc32 only insns. */
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if (sparc64_p
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if (sparc_v9_p
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&& (opcode->flags & F_NOTV9))
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continue;
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@ -283,7 +280,6 @@ print_insn (memaddr, info, sparc64_p)
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is_annulled = 1;
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++s;
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continue;
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#ifndef NO_V9
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case 'N':
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(*info->fprintf_func) (stream, "pn");
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++s;
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@ -293,7 +289,6 @@ print_insn (memaddr, info, sparc64_p)
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(*info->fprintf_func) (stream, "pt");
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++s;
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continue;
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#endif /* NO_V9 */
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default:
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break;
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@ -400,7 +395,6 @@ print_insn (memaddr, info, sparc64_p)
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}
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break;
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#ifndef NO_V9
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case 'I': /* 11 bit immediate. */
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case 'j': /* 10 bit immediate. */
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{
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@ -453,12 +447,12 @@ print_insn (memaddr, info, sparc64_p)
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}
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case 'k':
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info->target = memaddr + (SEX (X_DISP16 (insn), 16)) * 4;
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info->target = memaddr + SEX (X_DISP16 (insn), 16) * 4;
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(*info->print_address_func) (info->target, info);
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break;
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case 'G':
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info->target = memaddr + (SEX (X_DISP22 (insn), 19)) * 4;
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info->target = memaddr + SEX (X_DISP19 (insn), 19) * 4;
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(*info->print_address_func) (info->target, info);
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break;
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@ -525,7 +519,6 @@ print_insn (memaddr, info, sparc64_p)
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(*info->fprintf_func) (stream, "%d", X_RD (insn));
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break;
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}
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#endif /* NO_V9 */
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case 'M':
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(*info->fprintf_func) (stream, "%%asr%d", X_RS1 (insn));
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@ -536,17 +529,17 @@ print_insn (memaddr, info, sparc64_p)
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break;
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case 'L':
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info->target = memaddr + X_DISP30 (insn) * 4;
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info->target = memaddr + SEX (X_DISP30 (insn), 30) * 4;
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(*info->print_address_func) (info->target, info);
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break;
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case 'n':
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(*info->fprintf_func)
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(stream, "%#x", (SEX (X_DISP22 (insn), 22)));
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(stream, "%#x", SEX (X_DISP22 (insn), 22));
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break;
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case 'l':
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info->target = memaddr + (SEX (X_DISP22 (insn), 22)) * 4;
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info->target = memaddr + SEX (X_DISP22 (insn), 22) * 4;
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(*info->print_address_func) (info->target, info);
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break;
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@ -731,8 +724,8 @@ compare_opcodes (a, b)
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}
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/* Put non-sparc64 insns ahead of sparc64 ones. */
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if ((op0->architecture == v9) != (op1->architecture == v9))
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return (op0->architecture == v9) - (op1->architecture == v9);
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if ((op0->architecture >= v9) != (op1->architecture >= v9))
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return (op0->architecture >= v9) - (op1->architecture >= v9);
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/* They are functionally equal. So as long as the opcode table is
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valid, we can put whichever one first we want, on aesthetic grounds. */
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@ -848,19 +841,3 @@ build_hash_table (table, hash_table, num_opcodes)
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}
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#endif
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}
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int
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print_insn_sparc (memaddr, info)
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bfd_vma memaddr;
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disassemble_info *info;
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{
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return print_insn (memaddr, info, 0);
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}
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int
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print_insn_sparc64 (memaddr, info)
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bfd_vma memaddr;
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disassemble_info *info;
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{
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return print_insn (memaddr, info, 1);
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}
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