2008-03-06 Florian Krohm <fkrohm@us.ibm.com>
* s390-opc.c (INSTR_RSL_R0RD): Fix operands. * s390-opc.txt (cmpsc): Duplicate entry removed. (dxr, sqdr, sqer, cxfbr, cdfbr, cefbr, lzer, lzdr, lzxr, cegbr, cdgbr, cxgbr, cegr, cdgr, cxgr, cxfr, cdfr, cefr, fixr, fidr, fier, cu42, cu41): Fix operand format. 2008-03-06 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr, dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix operand format. * gas/s390/esa-g5.s: Likewise. * gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr, cxgr): Likewise. * gas/s390/zarch-z900.s: Likewise. * gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand. * gas/s390/zarch-z9-109.s: Likewise.
This commit is contained in:
Andreas Krebbel
parent
6be6f3bdcd
commit
98c3d90597
@ -1,3 +1,11 @@
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2008-03-06 Florian Krohm <fkrohm@us.ibm.com>
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* s390-opc.c (INSTR_RSL_R0RD): Fix operands.
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* s390-opc.txt (cmpsc): Duplicate entry removed.
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(dxr, sqdr, sqer, cxfbr, cdfbr, cefbr, lzer, lzdr, lzxr,
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cegbr, cdgbr, cxgbr, cegr, cdgr, cxgr, cxfr, cdfr, cefr, fixr, fidr,
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fier, cu42, cu41): Fix operand format.
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2008-02-20 Paolo Bonzini <bonzini@gnu.org>
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PR bootstrap/32009
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@ -1,3 +1,15 @@
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2008-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
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* gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr,
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dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix
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operand format.
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* gas/s390/esa-g5.s: Likewise.
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* gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr,
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cxgr): Likewise.
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* gas/s390/zarch-z900.s: Likewise.
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* gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand.
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* gas/s390/zarch-z9-109.s: Likewise.
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2008-03-04 Paul Brook <paul@codesourcery.com>
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* gas/arm/archv6m.d: New test.
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@ -93,15 +93,15 @@ Disassembly of section .text:
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.*: 69 65 af ff [ ]*cd %f6,4095\(%r5,%r10\)
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.*: ed 65 af ff 00 19 [ ]*cdb %f6,4095\(%r5,%r10\)
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.*: b3 19 00 69 [ ]*cdbr %f6,%f9
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.*: b3 95 00 69 [ ]*cdfbr %r6,%f9
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.*: b3 b5 00 69 [ ]*cdfr %r6,%f9
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.*: b3 95 00 69 [ ]*cdfbr %f6,%r9
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.*: b3 b5 00 69 [ ]*cdfr %f6,%r9
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.*: 29 69 [ ]*cdr %f6,%f9
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.*: bb 69 5f ff [ ]*cds %r6,%r9,4095\(%r5\)
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.*: 79 65 af ff [ ]*ce %f6,4095\(%r5,%r10\)
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.*: ed 65 af ff 00 09 [ ]*ceb %f6,4095\(%r5,%r10\)
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.*: b3 09 00 69 [ ]*cebr %f6,%f9
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.*: b3 94 00 69 [ ]*cefbr %r6,%f9
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.*: b3 b4 00 69 [ ]*cefr %r6,%f9
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.*: b3 94 00 69 [ ]*cefbr %f6,%r9
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.*: b3 b4 00 69 [ ]*cefr %f6,%r9
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.*: 39 69 [ ]*cer %f6,%f9
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.*: b2 1a 5f ff [ ]*cfc 4095\(%r5\)
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.*: b3 99 50 69 [ ]*cfdbr %r6,5,%f9
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@ -131,8 +131,8 @@ Disassembly of section .text:
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.*: 4f 65 af ff [ ]*cvb %r6,4095\(%r5,%r10\)
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.*: 4e 65 af ff [ ]*cvd %r6,4095\(%r5,%r10\)
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.*: b3 49 00 69 [ ]*cxbr %f6,%f9
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.*: b3 96 00 69 [ ]*cxfbr %r6,%f9
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.*: b3 b6 00 69 [ ]*cxfr %r6,%f9
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.*: b3 96 00 69 [ ]*cxfbr %f6,%r9
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.*: b3 b6 00 69 [ ]*cxfr %f6,%r9
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.*: b3 69 00 69 [ ]*cxr %f6,%f9
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.*: 5d 65 af ff [ ]*d %r6,4095\(%r5,%r10\)
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.*: 6d 65 af ff [ ]*dd %f6,4095\(%r5,%r10\)
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@ -149,7 +149,7 @@ Disassembly of section .text:
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.*: fd 58 5f ff af ff [ ]*dp 4095\(6,%r5\),4095\(9,%r10\)
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.*: 1d 69 [ ]*dr %r6,%r9
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.*: b3 4d 00 69 [ ]*dxbr %f6,%f9
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.*: b2 2d 00 60 [ ]*dxr %f6
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.*: b2 2d 00 69 [ ]*dxr %f6,%f9
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.*: b2 4f 00 69 [ ]*ear %r6,%a9
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.*: de ff 5f ff af ff [ ]*ed 4095\(256,%r5\),4095\(%r10\)
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.*: df ff 5f ff af ff [ ]*edmk 4095\(256,%r5\),4095\(%r10\)
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@ -160,11 +160,11 @@ Disassembly of section .text:
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.*: b2 4a 00 69 [ ]*esta %r6,%r9
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.*: 44 65 af ff [ ]*ex %r6,4095\(%r5,%r10\)
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.*: b3 5f 50 69 [ ]*fidbr %f6,5,%f9
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.*: b3 7f 50 69 [ ]*fidr %f6,5,%f9
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.*: b3 7f 00 69 [ ]*fidr %f6,%f9
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.*: b3 57 50 69 [ ]*fiebr %f6,5,%f9
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.*: b3 77 50 69 [ ]*fier %f6,5,%f9
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.*: b3 77 00 69 [ ]*fier %f6,%f9
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.*: b3 47 50 69 [ ]*fixbr %f6,5,%f9
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.*: b3 67 50 69 [ ]*fixr %f6,5,%f9
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.*: b3 67 00 69 [ ]*fixr %f6,%f9
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.*: 24 69 [ ]*hdr %f6,%f9
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.*: 34 69 [ ]*her %f6,%f9
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.*: b2 31 00 00 [ ]*hsch
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@ -269,9 +269,9 @@ Disassembly of section .text:
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.*: b3 06 00 69 [ ]*lxebr %f6,%f9
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.*: b3 26 00 69 [ ]*lxer %f6,%f9
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.*: b3 65 00 69 [ ]*lxr %r6,%r9
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.*: b3 75 00 60 [ ]*lzdr %r6
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.*: b3 74 00 60 [ ]*lzer %r6
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.*: b3 76 00 60 [ ]*lzxr %r6
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.*: b3 75 00 60 [ ]*lzdr %f6
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.*: b3 74 00 60 [ ]*lzer %f6
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.*: b3 76 00 60 [ ]*lzxr %f6
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.*: 5c 65 af ff [ ]*m %r6,4095\(%r5,%r10\)
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.*: ed 95 af ff 60 1e [ ]*madb %f6,%f9,4095\(%r5,%r10\)
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.*: b3 1e 60 95 [ ]*madbr %f6,%f9,%f5
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@ -386,11 +386,11 @@ Disassembly of section .text:
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.*: b2 10 5f ff [ ]*spx 4095\(%r5\)
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.*: ed 65 af ff 00 15 [ ]*sqdb %f6,4095\(%r5,%r10\)
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.*: b3 15 00 69 [ ]*sqdbr %f6,%f9
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.*: b2 44 00 60 [ ]*sqdr %f6
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.*: b2 44 00 69 [ ]*sqdr %f6,%f9
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.*: ed 65 af ff 00 34 [ ]*sqe %f6,4095\(%r5,%r10\)
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.*: ed 65 af ff 00 14 [ ]*sqeb %f6,4095\(%r5,%r10\)
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.*: b3 14 00 69 [ ]*sqebr %f6,%f9
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.*: b2 45 00 60 [ ]*sqer %f6
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.*: b2 45 00 69 [ ]*sqer %f6,%f9
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.*: b3 16 00 69 [ ]*sqxbr %f6,%f9
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.*: b3 36 00 69 [ ]*sqxr %f6,%f9
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.*: 1b 69 [ ]*sr %r6,%r9
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@ -450,7 +450,7 @@ Disassembly of section .text:
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.*: a7 61 ff ff [ ]*tml %r6,65535
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.*: a7 60 ff ff [ ]*tmh %r6,65535
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.*: a7 61 ff ff [ ]*tml %r6,65535
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.*: eb 60 5f ff 00 c0 [ ]*tp %r6,4095\(%r5\)
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.*: eb 50 5f ff 00 c0 [ ]*tp 4095\(6,%r5\)
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.*: b2 36 5f ff [ ]*tpi 4095\(%r5\)
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.*: e5 01 5f ff af ff [ ]*tprot 4095\(%r5\),4095\(%r10\)
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.*: dc ff 5f ff af ff [ ]*tr 4095\(256,%r5\),4095\(%r10\)
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@ -87,15 +87,15 @@ foo:
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cd %f6,4095(%r5,%r10)
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cdb %f6,4095(%r5,%r10)
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cdbr %f6,%f9
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cdfbr %r6,%f9
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cdfr %r6,%f9
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cdfbr %f6,%r9
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cdfr %f6,%r9
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cdr %f6,%f9
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cds %r6,%r9,4095(%r5)
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ce %f6,4095(%r5,%r10)
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ceb %f6,4095(%r5,%r10)
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cebr %f6,%f9
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cefbr %r6,%f9
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cefr %r6,%f9
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cefbr %f6,%r9
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cefr %f6,%r9
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cer %f6,%f9
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cfc 4095(%r5)
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cfdbr %r6,5,%f9
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@ -125,8 +125,8 @@ foo:
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cvb %r6,4095(%r5,%r10)
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cvd %r6,4095(%r5,%r10)
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cxbr %f6,%f9
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cxfbr %r6,%f9
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cxfr %r6,%f9
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cxfbr %f6,%r9
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cxfr %f6,%r9
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cxr %f6,%f9
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d %r6,4095(%r5,%r10)
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dd %f6,4095(%r5,%r10)
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@ -143,7 +143,7 @@ foo:
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dp 4095(6,%r5),4095(9,%r10)
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dr %r6,%r9
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dxbr %f6,%f9
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dxr %f6
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dxr %f6,%f9
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ear %r6,%a9
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ed 4095(256,%r5),4095(%r10)
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edmk 4095(256,%r5),4095(%r10)
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@ -154,11 +154,11 @@ foo:
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esta %r6,%r9
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ex %r6,4095(%r5,%r10)
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fidbr %f6,5,%f9
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fidr %f6,5,%f9
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fidr %f6,%f9
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fiebr %f6,5,%f9
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fier %f6,5,%f9
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fier %f6,%f9
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fixbr %f6,5,%f9
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fixr %f6,5,%f9
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fixr %f6,%f9
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hdr %f6,%f9
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her %f6,%f9
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hsch
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@ -263,9 +263,9 @@ foo:
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lxebr %f6,%f9
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lxer %f6,%f9
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lxr %r6,%r9
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lzdr %r6
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lzer %r6
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lzxr %r6
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lzdr %f6
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lzer %f6
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lzxr %f6
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m %r6,4095(%r5,%r10)
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madb %f6,%f9,4095(%r5,%r10)
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madbr %f6,%f9,%f5
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@ -380,11 +380,11 @@ foo:
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spx 4095(%r5)
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sqdb %f6,4095(%r5,%r10)
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sqdbr %f6,%f9
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sqdr %f6
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sqdr %f6,%f9
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sqe %f6,4095(%r5,%r10)
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sqeb %f6,4095(%r5,%r10)
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sqebr %f6,%f9
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sqer %f6
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sqer %f6,%f9
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sqxbr %f6,%f9
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sqxr %f6,%f9
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sr %r6,%r9
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@ -444,7 +444,7 @@ foo:
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tml %r6,65535
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tmlh %r6,65535
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tmll %r6,65535
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tp %r6,4095(%r5)
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tp 4095(6,%r5)
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tpi 4095(%r5)
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tprot 4095(%r5),4095(%r10)
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tr 4095(256,%r5),4095(%r10)
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@ -47,8 +47,8 @@ Disassembly of section .text:
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.*: b2 2b f0 69 [ ]*sske %r6,%r9,15
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.*: b9 b1 f0 69 [ ]*cu24 %r6,%r9,15
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.*: b2 a6 f0 69 [ ]*cu21 %r6,%r9,15
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.*: b9 b3 f0 69 [ ]*cu42 %r6,%r9,15
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.*: b9 b2 f0 69 [ ]*cu41 %r6,%r9,15
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.*: b9 b3 00 69 [ ]*cu42 %r6,%r9
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.*: b9 b2 00 69 [ ]*cu41 %r6,%r9
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.*: b2 a7 f0 69 [ ]*cu12 %r6,%r9,15
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.*: b9 b0 f0 69 [ ]*cu14 %r6,%r9,15
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.*: b3 3b 60 95 [ ]*myr %f6,%f9,%f5
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@ -41,8 +41,8 @@ foo:
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sske %r6,%r9,15
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cu24 %r6,%r9,15
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cu21 %r6,%r9,15
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cu42 %r6,%r9,15
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cu41 %r6,%r9,15
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cu42 %r6,%r9
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cu41 %r6,%r9
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cu12 %r6,%r9,15
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cu14 %r6,%r9,15
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myr %f6,%f9,%f5
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@ -24,11 +24,11 @@ Disassembly of section .text:
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.*: ec 96 00 00 00 45 [ ]*brxlg %r9,%r6,4a <foo\+0x4a>
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.*: eb 96 5f ff 00 44 [ ]*bxhg %r9,%r6,4095\(%r5\)
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.*: eb 96 5f ff 00 45 [ ]*bxleg %r9,%r6,4095\(%r5\)
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.*: b3 a5 00 96 [ ]*cdgbr %r9,%r6
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.*: b3 c5 00 96 [ ]*cdgr %r9,%r6
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.*: b3 a5 00 96 [ ]*cdgbr %f9,%r6
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.*: b3 c5 00 96 [ ]*cdgr %f9,%r6
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.*: eb 96 5f ff 00 3e [ ]*cdsg %r9,%r6,4095\(%r5\)
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.*: b3 a4 00 96 [ ]*cegbr %r9,%r6
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.*: b3 c4 00 96 [ ]*cegr %r9,%r6
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.*: b3 a4 00 96 [ ]*cegbr %f9,%r6
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.*: b3 c4 00 96 [ ]*cegr %f9,%r6
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.*: b3 b9 90 65 [ ]*cfdr %r6,9,%f5
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.*: b3 b8 90 65 [ ]*cfer %r6,9,%f5
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.*: b3 ba 90 65 [ ]*cfxr %r6,9,%f5
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@ -51,8 +51,8 @@ Disassembly of section .text:
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.*: eb 96 5f ff 00 30 [ ]*csg %r9,%r6,4095\(%r5\)
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.*: e3 95 af ff 00 0e [ ]*cvbg %r9,4095\(%r5,%r10\)
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.*: e3 95 af ff 00 2e [ ]*cvdg %r9,4095\(%r5,%r10\)
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.*: b3 a6 00 96 [ ]*cxgbr %r9,%r6
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.*: b3 c6 00 96 [ ]*cxgr %r9,%r6
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.*: b3 a6 00 96 [ ]*cxgbr %f9,%r6
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.*: b3 c6 00 96 [ ]*cxgr %f9,%r6
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.*: e3 95 af ff 00 87 [ ]*dlg %r9,4095\(%r5,%r10\)
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.*: b9 87 00 96 [ ]*dlgr %r9,%r6
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.*: e3 95 af ff 00 0d [ ]*dsg %r9,4095\(%r5,%r10\)
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@ -18,11 +18,11 @@ foo:
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brxlg %r9,%r6,.
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bxhg %r9,%r6,4095(%r5)
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bxleg %r9,%r6,4095(%r5)
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cdgbr %r9,%r6
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cdgr %r9,%r6
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cdgbr %f9,%r6
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cdgr %f9,%r6
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cdsg %r9,%r6,4095(%r5)
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cegbr %r9,%r6
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cegr %r9,%r6
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cegbr %f9,%r6
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cegr %f9,%r6
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cfdr %r6,9,%f5
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cfer %r6,9,%f5
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cfxr %r6,9,%f5
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@ -45,8 +45,8 @@ foo:
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csg %r9,%r6,4095(%r5)
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cvbg %r9,4095(%r5,%r10)
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cvdg %r9,4095(%r5,%r10)
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cxgbr %r9,%r6
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cxgr %r9,%r6
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cxgbr %f9,%r6
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cxgr %f9,%r6
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dlg %r9,4095(%r5,%r10)
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dlgr %r9,%r6
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dsg %r9,4095(%r5,%r10)
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@ -231,7 +231,7 @@ const struct s390_operand s390_operands[] =
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#define INSTR_RSE_RRRD 6, { R_8,R_12,D_20,B_16,0,0 } /* e.g. lmh */
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#define INSTR_RSE_CCRD 6, { C_8,C_12,D_20,B_16,0,0 } /* e.g. lmh */
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#define INSTR_RSE_RURD 6, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icmh */
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#define INSTR_RSL_R0RD 6, { R_8,D_20,B_16,0,0,0 } /* e.g. tp */
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#define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
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#define INSTR_RSI_RRP 4, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxh */
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#define INSTR_RSY_RRRD 6, { R_8,R_12,D20_20,B_16,0,0 } /* e.g. stmy */
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#define INSTR_RSY_RURD 6, { R_8,U4_12,D20_20,B_16,0,0 } /* e.g. icmh */
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@ -45,7 +45,6 @@ d5 clc SS_L0RDRD "compare logical" g5 esa,zarch
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bd clm RS_RURD "compare logical characters under mask" g5 esa,zarch
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15 clr RR_RR "compare logical" g5 esa,zarch
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b25d clst RRE_RR "compare logical string" g5 esa,zarch
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b263 cmpsc RRE_RR "compression call" g5 esa,zarch
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f9 cp SS_LLRDRD "compare decimal" g5 esa,zarch
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b24d cpya RRE_AA "copy access" g5 esa,zarch
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19 cr RR_RR "compare" g5 esa,zarch
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@ -63,7 +62,7 @@ b250 csp RRE_RR "compare and swap and purge" g5 esa,zarch
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83 diag RS_RRRD "diagnose" g5 esa,zarch
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fd dp SS_LLRDRD "divide decimal" g5 esa,zarch
|
||||
1d dr RR_RR "divide" g5 esa,zarch
|
||||
b22d dxr RRE_F0 "divide (ext.)" g5 esa,zarch
|
||||
b22d dxr RRE_FF "divide (ext.)" g5 esa,zarch
|
||||
b24f ear RRE_RA "extract access" g5 esa,zarch
|
||||
de ed SS_L0RDRD "edit" g5 esa,zarch
|
||||
df edmk SS_L0RDRD "edit and mark" g5 esa,zarch
|
||||
@ -188,8 +187,8 @@ b20a spka S_RD "set PSW key from address" g5 esa,zarch
|
||||
04 spm RR_R0 "set program mask" g5 esa,zarch
|
||||
b208 spt S_RD "set CPU timer" g5 esa,zarch
|
||||
b210 spx S_RD "set prefix" g5 esa,zarch
|
||||
b244 sqdr RRE_F0 "square root (long)" g5 esa,zarch
|
||||
b245 sqer RRE_F0 "square root (short)" g5 esa,zarch
|
||||
b244 sqdr RRE_FF "square root (long)" g5 esa,zarch
|
||||
b245 sqer RRE_FF "square root (short)" g5 esa,zarch
|
||||
1b sr RR_RR "subtract" g5 esa,zarch
|
||||
8a sra RS_R0RD "shift right single" g5 esa,zarch
|
||||
8e srda RS_R0RD "shift right double (long)" g5 esa,zarch
|
||||
@ -284,9 +283,9 @@ b318 kdbr RRE_FF "compare and signal long bfp" g5 esa,zarch
|
||||
ed0000000018 kdb RXE_FRRD "compare and signal long bfp" g5 esa,zarch
|
||||
b308 kebr RRE_FF "compare and signal short bfp" g5 esa,zarch
|
||||
ed0000000008 keb RXE_FRRD "compare and signal short bfp" g5 esa,zarch
|
||||
b396 cxfbr RRE_RF "convert from fixed 32 to extended bfp" g5 esa,zarch
|
||||
b395 cdfbr RRE_RF "convert from fixed 32 to long bfp" g5 esa,zarch
|
||||
b394 cefbr RRE_RF "convert from fixed 32 to short bfp" g5 esa,zarch
|
||||
b396 cxfbr RRE_FR "convert from fixed 32 to extended bfp" g5 esa,zarch
|
||||
b395 cdfbr RRE_FR "convert from fixed 32 to long bfp" g5 esa,zarch
|
||||
b394 cefbr RRE_FR "convert from fixed 32 to short bfp" g5 esa,zarch
|
||||
b39a cfxbr RRF_U0RF "convert to fixed extended bfp to 32" g5 esa,zarch
|
||||
b399 cfdbr RRF_U0RF "convert to fixed long bfp to 32" g5 esa,zarch
|
||||
b398 cfebr RRF_U0RF "convert to fixed short bfp to 32" g5 esa,zarch
|
||||
@ -383,9 +382,9 @@ b358 thder RRE_RR "convert short bfp to long hfp" g5 esa,zarch
|
||||
b359 thdr RRE_RR "convert long bfp to long hfp" g5 esa,zarch
|
||||
b350 tbedr RRF_U0FF "convert long hfp to short bfp" g5 esa,zarch
|
||||
b351 tbdr RRF_U0FF "convert long hfp to long bfp" g5 esa,zarch
|
||||
b374 lzer RRE_R0 "load short zero" g5 esa,zarch
|
||||
b375 lzdr RRE_R0 "load long zero" g5 esa,zarch
|
||||
b376 lzxr RRE_R0 "load extended zero" g5 esa,zarch
|
||||
b374 lzer RRE_F0 "load short zero" g5 esa,zarch
|
||||
b375 lzdr RRE_F0 "load long zero" g5 esa,zarch
|
||||
b376 lzxr RRE_F0 "load extended zero" g5 esa,zarch
|
||||
# Here are the new esame instructions:
|
||||
b946 bctgr RRE_RR "branch on count 64" z900 zarch
|
||||
b900 lpgr RRE_RR "load positive 64" z900 zarch
|
||||
@ -476,15 +475,15 @@ b90e eregg RRE_RR "extract stacked registers 64" z900 zarch
|
||||
b905 lurag RRE_RR "load using real address 64" z900 zarch
|
||||
b90c msgr RRE_RR "multiply single 64" z900 zarch
|
||||
b91c msgfr RRE_RR "multiply single 64<32" z900 zarch
|
||||
b3a4 cegbr RRE_RR "convert from fixed 64 to short bfp" z900 zarch
|
||||
b3a5 cdgbr RRE_RR "convert from fixed 64 to long bfp" z900 zarch
|
||||
b3a6 cxgbr RRE_RR "convert from fixed 64 to extended bfp" z900 zarch
|
||||
b3a4 cegbr RRE_FR "convert from fixed 64 to short bfp" z900 zarch
|
||||
b3a5 cdgbr RRE_FR "convert from fixed 64 to long bfp" z900 zarch
|
||||
b3a6 cxgbr RRE_FR "convert from fixed 64 to extended bfp" z900 zarch
|
||||
b3a8 cgebr RRF_U0RF "convert to fixed short bfd to 64" z900 zarch
|
||||
b3a9 cgdbr RRF_U0RF "convert to fixed long bfp to 64" z900 zarch
|
||||
b3aa cgxbr RRF_U0RF "convert to fixed extended bfp to 64" z900 zarch
|
||||
b3c4 cegr RRE_RR "convert from fixed 64 to short hfp" z900 zarch
|
||||
b3c5 cdgr RRE_RR "convert from fixed 64 to long hfp" z900 zarch
|
||||
b3c6 cxgr RRE_RR "convert from fixed 64 to extended hfp" z900 zarch
|
||||
b3c4 cegr RRE_FR "convert from fixed 64 to short hfp" z900 zarch
|
||||
b3c5 cdgr RRE_FR "convert from fixed 64 to long hfp" z900 zarch
|
||||
b3c6 cxgr RRE_FR "convert from fixed 64 to extended hfp" z900 zarch
|
||||
b3c8 cger RRF_U0RF "convert to fixed short hfp to 64" z900 zarch
|
||||
b3c9 cgdr RRF_U0RF "convert to fixed long hfp to 64" z900 zarch
|
||||
b3ca cgxr RRF_U0RF "convert to fixed extended hfp to 64" z900 zarch
|
||||
@ -552,17 +551,17 @@ e30000000091 llgh RXE_RRRD "load logical halfword" z900 zarch
|
||||
eb000000001c rllg RSE_RRRD "rotate left single logical 64" z900 zarch
|
||||
eb000000001d rll RSE_RRRD "rotate left single logical 32" z900 esa,zarch
|
||||
b369 cxr RRE_FF "compare extended hfp" g5 esa,zarch
|
||||
b3b6 cxfr RRE_RF "convert from fixed 32 to extended hfp" g5 esa,zarch
|
||||
b3b5 cdfr RRE_RF "convert from fixed 32 to long hfp" g5 esa,zarch
|
||||
b3b4 cefr RRE_RF "convert from fixed 32 to short hfp" g5 esa,zarch
|
||||
b3b6 cxfr RRE_FR "convert from fixed 32 to extended hfp" g5 esa,zarch
|
||||
b3b5 cdfr RRE_FR "convert from fixed 32 to long hfp" g5 esa,zarch
|
||||
b3b4 cefr RRE_FR "convert from fixed 32 to short hfp" g5 esa,zarch
|
||||
b3ba cfxr RRF_U0RF "convert to fixed extended hfp to 32" z900 zarch
|
||||
b3b9 cfdr RRF_U0RF "convert to fixed long hfp to 32" z900 zarch
|
||||
b3b8 cfer RRF_U0RF "convert to fixed short hfp to 32" z900 zarch
|
||||
b362 ltxr RRE_FF "load and test extended hfp" g5 esa,zarch
|
||||
b363 lcxr RRE_FF "load complement extended hfp" g5 esa,zarch
|
||||
b367 fixr RRF_U0FF "load fp integer extended hfp" g5 esa,zarch
|
||||
b37f fidr RRF_U0FF "load fp integer long hfp" g5 esa,zarch
|
||||
b377 fier RRF_U0FF "load fp integer short hfp" g5 esa,zarch
|
||||
b367 fixr RRE_FF "load fp integer extended hfp" g5 esa,zarch
|
||||
b37f fidr RRE_FF "load fp integer long hfp" g5 esa,zarch
|
||||
b377 fier RRE_FF "load fp integer short hfp" g5 esa,zarch
|
||||
b325 lxdr RRE_FF "load lengthened long to extended hfp" g5 esa,zarch
|
||||
ed0000000025 lxd RXE_FRRD "load lengthened long to extended hfp" g5 esa,zarch
|
||||
b326 lxer RRE_FF "load lengthened short to extended hfp" g5 esa,zarch
|
||||
@ -769,8 +768,8 @@ b990 trtt RRF_M0RR "translate two to two" z9-109 esa,zarch
|
||||
b9b1 cu24 RRF_M0RR "convert utf-16 to utf-32" z9-109 zarch
|
||||
b2a6 cu21 RRF_M0RR "convert utf-16 to utf-8" z9-109 zarch
|
||||
b2a6 cuutf RRF_M0RR "convert unicode to utf-8" z9-109 zarch
|
||||
b9b3 cu42 RRF_M0RR "convert utf-32 to utf-16" z9-109 zarch
|
||||
b9b2 cu41 RRF_M0RR "convert utf-32 to utf-8" z9-109 zarch
|
||||
b9b3 cu42 RRE_RR "convert utf-32 to utf-16" z9-109 zarch
|
||||
b9b2 cu41 RRE_RR "convert utf-32 to utf-8" z9-109 zarch
|
||||
b2a7 cu12 RRF_M0RR "convert utf-8 to utf-16" z9-109 zarch
|
||||
b2a7 cutfu RRF_M0RR "convert utf-8 to unicode" z9-109 zarch
|
||||
b9b0 cu14 RRF_M0RR "convert utf-8 to utf-32" z9-109 zarch
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user