Little endian fix
This commit is contained in:
Michael Meissner
parent
b444036dd9
commit
9914665911
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@ -1,3 +1,9 @@
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Wed May 17 00:59:12 1995 Andrew Cagney - aka Noid <cagney@highland.com.au>
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* config/tc-ppc.c (md_begin): Was assuming that an instruction was
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bigendian and hence 16bit relocs withing instructions would
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ALWAYS be at addresses i+2-i+3. In LE mode it is i+0-i+1.
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Tue May 16 16:29:58 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
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* config/obj-multi.h (obj_frob_symbol, obj_frob_file, S_GET_SIZE,
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@ -62,7 +62,7 @@ static void ppc_toc PARAMS ((int));
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#ifdef OBJ_ELF
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static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **));
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static void ppc_elf_cons PARAMS ((int));
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static void ppc_elf_validate_fix (fixS *, segT);
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static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
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#endif
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/* Generic assembler global variables which must be defined by all
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@ -138,9 +138,6 @@ static int ppc_cpu = 0;
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PPC_OPCODE_32 or PPC_OPCODE_64. */
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static int ppc_size = PPC_OPCODE_32;
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/* The endianness we are using. */
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static int ppc_big_endian = PPC_BIG_ENDIAN;
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/* Opcode hash table. */
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static struct hash_control *ppc_hash;
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@ -266,14 +263,22 @@ md_parse_option (c, arg)
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/* -many means to assemble for any architecture (PWR/PWRX/PPC). */
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else if (strcmp (arg, "any") == 0)
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ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_PPC;
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#ifdef OBJ_ELF
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/* -mrelocatable -- warn about initializations that require relocation */
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else if (strcmp (arg, "relocatable") == 0)
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mrelocatable = true;
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/* -mlittle/-mbig set the endianess */
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else if (strcmp (arg, "little") == 0 || strcmp (arg, "little-endian") == 0)
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target_big_endian = 0;
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else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
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target_big_endian = 1;
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#endif
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else
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{
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as_bad ("invalid architecture -m%s", arg);
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as_bad ("invalid switch -m%s", arg);
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return 0;
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}
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break;
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@ -304,15 +309,19 @@ md_show_usage (stream)
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fprintf(stream, "\
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PowerPC options:\n\
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-u ignored\n\
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-mpwrx generate code for IBM POWER/2 (RIOS2)\n\
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-mpwrx, -mpwr2 generate code for IBM POWER/2 (RIOS2)\n\
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-mpwr generate code for IBM POWER (RIOS1)\n\
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-m601 generate code for Motorola PowerPC 601\n\
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-mppc, -mppc32, -m403, -m603, -m604\n\
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generate code for Motorola PowerPC 603/604\n\
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-mppc64, -m620 generate code for Motorola PowerPC 620\n\
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-many generate code for any architecture (PWR/PWRX/PPC)\n");
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#ifdef OBJ_ELF
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fprintf(stream, "\
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-mrelocatable warn incompatible with GCC's -mrelocatble option\n\
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-mrelocatable support for GCC's -mrelocatble option\n\
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-mlittle, -mlittle-endian\n\
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generate code for a little endian machine\n
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-mbig, -mbig-endian generate code for a big endian machine\n
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-V print assembler version number\n\
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-Qy, -Qn ignored\n");
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#endif
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@ -329,10 +338,11 @@ ppc_set_cpu ()
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{
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if (strcmp (default_cpu, "rs6000") == 0)
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ppc_cpu = PPC_OPCODE_POWER;
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else if (strcmp (default_cpu, "powerpc") == 0)
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else if (strcmp (default_cpu, "powerpc") == 0
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|| strcmp (default_cpu, "powerpcle") == 0)
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ppc_cpu = PPC_OPCODE_PPC;
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else
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abort ();
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as_fatal ("Unknown default cpu = %s", default_cpu);
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}
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}
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@ -348,7 +358,7 @@ ppc_arch ()
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else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
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return bfd_arch_rs6000;
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else
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abort ();
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as_fatal ("Neither Power nor PowerPC opcodes were selected.");
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}
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/* This function is called when the assembler starts up. It is called
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@ -427,7 +437,7 @@ md_begin ()
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}
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/* Tell the main code what the endianness is. */
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target_big_endian = ppc_big_endian;
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target_big_endian = PPC_BIG_ENDIAN;
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#ifdef OBJ_COFF
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ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
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@ -586,7 +596,9 @@ ppc_elf_cons (nbytes)
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/* Validate any relocations emitted for -mrelocatable */
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static void
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ppc_elf_validate_fix (fixS *fixp, segT seg)
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ppc_elf_validate_fix (fixp, seg)
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fixS *fixp;
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segT seg;
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{
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if (mrelocatable
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&& !fixp->fx_done
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@ -831,10 +843,11 @@ md_assemble (str)
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md_number_to_chars (f, insn, 4);
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/* Create any fixups. At this point we do not use a
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bfd_reloc_code_real_type, but instead just use the operand index.
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This lets us easily handle fixups for any operand type, although
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that is admittedly not a very exciting feature. We pick a BFD
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reloc type in md_apply_fix. */
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bfd_reloc_code_real_type, but instead just use the
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BFD_RELOC_UNUSED plus the operand index. This lets us easily
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handle fixups for any operand type, although that is admittedly
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not a very exciting feature. We pick a BFD reloc type in
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md_apply_fix. */
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for (i = 0; i < fc; i++)
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{
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const struct powerpc_operand *operand;
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@ -843,12 +856,13 @@ md_assemble (str)
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if (fixups[i].reloc != BFD_RELOC_UNUSED)
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{
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reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
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int offset = (!reloc_howto) ? 0 : (4 - bfd_get_reloc_size (reloc_howto));
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int size = (!reloc_howto) ? 0 : bfd_get_reloc_size (reloc_howto);
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int offset = target_big_endian ? (4 - size) : 0;
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if (offset < 0)
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offset = 0;
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if (size > 4)
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abort();
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fix_new_exp (frag_now, f - frag_now->fr_literal + offset, 4 - offset,
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fix_new_exp (frag_now, f - frag_now->fr_literal + offset, size,
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&fixups[i].exp, (reloc_howto && reloc_howto->pc_relative),
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fixups[i].reloc);
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}
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@ -2317,7 +2331,7 @@ md_atof (type, litp, sizep)
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*sizep = prec * 2;
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if (ppc_big_endian)
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if (target_big_endian)
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{
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for (i = 0; i < prec; i++)
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{
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@ -2346,7 +2360,7 @@ md_number_to_chars (buf, val, n)
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valueT val;
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int n;
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{
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if (ppc_big_endian)
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if (target_big_endian)
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number_to_chars_bigendian (buf, val, n);
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else
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number_to_chars_littleendian (buf, val, n);
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@ -2609,13 +2623,13 @@ md_apply_fix3 (fixp, valuep, seg)
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/* Fetch the instruction, insert the fully resolved operand
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value, and stuff the instruction back again. */
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where = fixp->fx_frag->fr_literal + fixp->fx_where;
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if (ppc_big_endian)
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if (target_big_endian)
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insn = bfd_getb32 ((unsigned char *) where);
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else
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insn = bfd_getl32 ((unsigned char *) where);
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insn = ppc_insert_operand (insn, operand, (offsetT) value,
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fixp->fx_file, fixp->fx_line);
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if (ppc_big_endian)
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if (target_big_endian)
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bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
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else
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bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
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@ -2649,7 +2663,7 @@ md_apply_fix3 (fixp, valuep, seg)
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&& ppc_is_toc_sym (fixp->fx_addsy))
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{
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fixp->fx_size = 2;
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if (ppc_big_endian)
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if (target_big_endian)
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fixp->fx_where += 2;
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fixp->fx_r_type = BFD_RELOC_PPC_TOC16;
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}
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