diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog index d3445bc313..36c8665f28 100644 --- a/sim/bfin/ChangeLog +++ b/sim/bfin/ChangeLog @@ -1,3 +1,20 @@ +2011-03-23 Mike Frysinger + + * devices.h (dv_w1c): Fix typos in documentation of "bits" arg. + * dv-bfin_cec.c (bfin_cec_io_write_buffer): Pass 0xffee to dv_w1c_4. + * dv-bfin_emac.c (bfin_emac_io_write_buffer): Pass 0xe1 to dv_w1c_4 + for systat MMR and -1 to dv_w1c_4 for [rt]x_stky/mmc_[rt]irqs MMRs. + * dv-bfin_eppi.c (bfin_eppi_io_write_buffer): Pass 0x1ff to dv_w1c_2. + * dv-bfin_gpio.c (bfin_gpio_io_write_buffer): Invert bits to dv_w1c_2. + * dv-bfin_jtag.c (bfin_jtag_io_write_buffer): Invert bits to dv_w1c_4. + * dv-bfin_nfc.c (bfin_nfc_io_write_buffer): Invert bits to dv_w1c_2. + * dv-bfin_otp.c (bfin_otp_io_write_buffer): Invert bits to dv_w1c_2. + * dv-bfin_ppi.c (bfin_ppi_io_write_buffer): Invert bits to dv_w1c_2. + * dv-bfin_rtc.c (bfin_rtc_io_write_buffer): Invert bits to dv_w1c_2. + * dv-bfin_spi.c (bfin_spi_io_write_buffer): Invert bits to dv_w1c_2. + * dv-bfin_twi.c (bfin_twi_io_write_buffer): Invert bits to dv_w1c_2. + * dv-bfin_uart2.c (bfin_uart_io_write_buffer): Invert bits to dv_w1c_2. + 2011-03-23 Mike Frysinger * dv-bfin_uart.h (TFI, BI, FE, PE, OE): Define. diff --git a/sim/bfin/devices.h b/sim/bfin/devices.h index 76854ed33a..3dc5481a11 100644 --- a/sim/bfin/devices.h +++ b/sim/bfin/devices.h @@ -81,8 +81,8 @@ static inline void dv_store_4 (void *ptr, bu32 val) dv_store_2 (ptr, val); } -/* Helpers for MMRs where all bits are W1C except for the specified - bits -- those ones are RO. */ +/* Helpers for MMRs where only the specified bits are W1C. The + rest are left unmodified. */ #define dv_w1c(ptr, val, bits) (*(ptr) &= ~((val) & (bits))) static inline void dv_w1c_2 (bu16 *ptr, bu16 val, bu16 bits) { diff --git a/sim/bfin/dv-bfin_cec.c b/sim/bfin/dv-bfin_cec.c index 85fe6fcd1a..0c6a8235a6 100644 --- a/sim/bfin/dv-bfin_cec.c +++ b/sim/bfin/dv-bfin_cec.c @@ -100,7 +100,7 @@ bfin_cec_io_write_buffer (struct hw *me, const void *source, /* Read-only register. */ break; case mmr_offset(ilat): - dv_w1c_4 (&cec->ilat, value, 0); + dv_w1c_4 (&cec->ilat, value, 0xffee); break; case mmr_offset(iprio): cec->iprio = (value & IVG_UNMASKABLE_B); diff --git a/sim/bfin/dv-bfin_emac.c b/sim/bfin/dv-bfin_emac.c index a64198d45b..af14103ea4 100644 --- a/sim/bfin/dv-bfin_emac.c +++ b/sim/bfin/dv-bfin_emac.c @@ -224,7 +224,7 @@ bfin_emac_io_write_buffer (struct hw *me, const void *source, dv_w1c_4_partial (valuep, value, 0xf20); break; case mmr_offset(systat): - dv_w1c_4 (valuep, value, 0x1e); + dv_w1c_4 (valuep, value, 0xe1); break; case mmr_offset(staadd): *valuep = value | STABUSY; @@ -242,7 +242,7 @@ bfin_emac_io_write_buffer (struct hw *me, const void *source, case mmr_offset(tx_stky): case mmr_offset(mmc_rirqs): case mmr_offset(mmc_tirqs): - dv_w1c_4 (valuep, value, 0); + dv_w1c_4 (valuep, value, -1); break; case mmr_offset(mmc_ctl): /* Writing to bit 0 clears all counters. */ diff --git a/sim/bfin/dv-bfin_eppi.c b/sim/bfin/dv-bfin_eppi.c index df76f97d15..c151f3cfc1 100644 --- a/sim/bfin/dv-bfin_eppi.c +++ b/sim/bfin/dv-bfin_eppi.c @@ -106,7 +106,7 @@ bfin_eppi_io_write_buffer (struct hw *me, const void *source, { case mmr_offset(status): dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); - dv_w1c_2 (value16p, value, 0); + dv_w1c_2 (value16p, value, 0x1ff); break; case mmr_offset(hcount): case mmr_offset(hdelay): diff --git a/sim/bfin/dv-bfin_gpio.c b/sim/bfin/dv-bfin_gpio.c index c4a7481f6a..50baf03e71 100644 --- a/sim/bfin/dv-bfin_gpio.c +++ b/sim/bfin/dv-bfin_gpio.c @@ -92,7 +92,7 @@ bfin_gpio_io_write_buffer (struct hw *me, const void *source, int space, case mmr_offset(clear): case mmr_offset(maska_clear): case mmr_offset(maskb_clear): - dv_w1c_2 (valuep, value, 0); + dv_w1c_2 (valuep, value, -1); break; case mmr_offset(set): case mmr_offset(maska_set): diff --git a/sim/bfin/dv-bfin_jtag.c b/sim/bfin/dv-bfin_jtag.c index b4b4824385..e2d105d991 100644 --- a/sim/bfin/dv-bfin_jtag.c +++ b/sim/bfin/dv-bfin_jtag.c @@ -63,7 +63,7 @@ bfin_jtag_io_write_buffer (struct hw *me, const void *source, int space, switch (mmr_off) { case mmr_offset(dbgstat): - dv_w1c_4 (valuep, value, ~0xc); + dv_w1c_4 (valuep, value, 0xc); break; case mmr_offset(dspid): /* Discard writes to these. */ diff --git a/sim/bfin/dv-bfin_nfc.c b/sim/bfin/dv-bfin_nfc.c index 84246c85be..2bd8b9e764 100644 --- a/sim/bfin/dv-bfin_nfc.c +++ b/sim/bfin/dv-bfin_nfc.c @@ -108,7 +108,7 @@ bfin_nfc_io_write_buffer (struct hw *me, const void *source, int space, *valuep = value; break; case mmr_offset(irqstat): - dv_w1c_2 (valuep, value, 0); + dv_w1c_2 (valuep, value, -1); break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, true); diff --git a/sim/bfin/dv-bfin_otp.c b/sim/bfin/dv-bfin_otp.c index 34bfb8d6e5..5b15eeb118 100644 --- a/sim/bfin/dv-bfin_otp.c +++ b/sim/bfin/dv-bfin_otp.c @@ -149,7 +149,7 @@ bfin_otp_io_write_buffer (struct hw *me, const void *source, int space, case mmr_offset(status): dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); /* XXX: All bits seem to be W1C. */ - dv_w1c_2 (value16p, value, 0); + dv_w1c_2 (value16p, value, -1); break; case mmr_offset(timing): case mmr_offset(data0): diff --git a/sim/bfin/dv-bfin_ppi.c b/sim/bfin/dv-bfin_ppi.c index e7b404bcd4..e2f829246c 100644 --- a/sim/bfin/dv-bfin_ppi.c +++ b/sim/bfin/dv-bfin_ppi.c @@ -105,7 +105,7 @@ bfin_ppi_io_write_buffer (struct hw *me, const void *source, int space, *valuep = value; break; case mmr_offset(status): - dv_w1c_2 (valuep, value, (1 << 10)); + dv_w1c_2 (valuep, value, ~(1 << 10)); break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, true); diff --git a/sim/bfin/dv-bfin_rtc.c b/sim/bfin/dv-bfin_rtc.c index 870d6b1095..1b201484a7 100644 --- a/sim/bfin/dv-bfin_rtc.c +++ b/sim/bfin/dv-bfin_rtc.c @@ -80,7 +80,7 @@ bfin_rtc_io_write_buffer (struct hw *me, const void *source, /* XXX: Ignore these since we are wired to host. */ break; case mmr_offset(istat): - dv_w1c_2 (value16p, value, 1 << 14); + dv_w1c_2 (value16p, value, ~(1 << 14)); break; case mmr_offset(alarm): break; diff --git a/sim/bfin/dv-bfin_spi.c b/sim/bfin/dv-bfin_spi.c index f3e5cf62e5..63204ecd18 100644 --- a/sim/bfin/dv-bfin_spi.c +++ b/sim/bfin/dv-bfin_spi.c @@ -88,7 +88,7 @@ bfin_spi_io_write_buffer (struct hw *me, const void *source, int space, switch (mmr_off) { case mmr_offset(stat): - dv_w1c_2 (valuep, value, SPIF | TXS | RXS); + dv_w1c_2 (valuep, value, ~(SPIF | TXS | RXS)); break; case mmr_offset(tdbr): *valuep = value; diff --git a/sim/bfin/dv-bfin_twi.c b/sim/bfin/dv-bfin_twi.c index 8c775e6509..5d04f23368 100644 --- a/sim/bfin/dv-bfin_twi.c +++ b/sim/bfin/dv-bfin_twi.c @@ -102,10 +102,10 @@ bfin_twi_io_write_buffer (struct hw *me, const void *source, int space, *valuep = value; break; case mmr_offset(int_stat): - dv_w1c_2 (valuep, value, 0); + dv_w1c_2 (valuep, value, -1); break; case mmr_offset(master_stat): - dv_w1c_2 (valuep, value, MPROG | SDASEN | SCLSEN | BUSBUSY); + dv_w1c_2 (valuep, value, BUFWRERR | BUFRDERR | DNAK | ANAK | LOSTARB); break; case mmr_offset(slave_stat): case mmr_offset(fifo_stat): diff --git a/sim/bfin/dv-bfin_uart2.c b/sim/bfin/dv-bfin_uart2.c index 5b379bb3e5..facde1c6cd 100644 --- a/sim/bfin/dv-bfin_uart2.c +++ b/sim/bfin/dv-bfin_uart2.c @@ -97,10 +97,10 @@ bfin_uart_io_write_buffer (struct hw *me, const void *source, uart->ier |= value; break; case mmr_offset(ier_clear): - dv_w1c_2 (&uart->ier, value, 0); + dv_w1c_2 (&uart->ier, value, -1); break; case mmr_offset(lsr): - dv_w1c_2 (valuep, value, TEMT | THRE | DR); + dv_w1c_2 (valuep, value, TFI | BI | FE | PE | OE); break; case mmr_offset(rbr): /* XXX: Writes are ignored ? */