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* mn10300-opc.c (mn10300_operands): Add "REGS" for a register 

list.
        (mn10300_opcodes): Use REGS for register list in "movm" instructions.
This commit is contained in:
Jeff Law 1996-11-19 20:32:31 +00:00
parent bd63ee34aa
commit 99246e03f9
2 changed files with 11 additions and 2 deletions
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6
opcodes/ChangeLog
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@ -1,3 +1,9 @@
Tue Nov 19 13:33:01 1996 Jeffrey A Law (law@cygnus.com)
* mn10300-opc.c (mn10300_operands): Add "REGS" for a register
list.
(mn10300_opcodes): Use REGS for register list in "movm" instructions.
start-sanitize-d10v
Mon Nov 18 15:20:35 1996 Michael Meissner <meissner@tiktok.cygnus.com>

7
opcodes/mn10300-opc.c
View File

@ -150,6 +150,9 @@ const struct mn10300_operand mn10300_operands[] = {
#define IMM8_SHIFT8 (IMM8E_SHIFT8 + 1)
{8, 8, 0},
#define REGS (IMM8_SHIFT8+1)
{8, 0, MN10300_OPERAND_REG_LIST},
} ;
#define MEM(ADDR) PAREN, ADDR, PAREN
@ -280,8 +283,8 @@ const struct mn10300_opcode mn10300_opcodes[] = {
{ "exth", 0x18, 0xfc, FMT_S0, {DN0}},
{ "exthu", 0x1c, 0xfc, FMT_S0, {DN0}},
{ "movm", 0xce00, 0xff00, FMT_S1, {MEM(SP), IMM8}},
{ "movm", 0xcf00, 0xff00, FMT_S1, {IMM8, MEM(SP)}},
{ "movm", 0xce00, 0xff00, FMT_S1, {MEM(SP), REGS}},
{ "movm", 0xcf00, 0xff00, FMT_S1, {REGS, MEM(SP)}},
{ "clr", 0x00, 0xf3, FMT_S0, {DN1}},