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gdb/riscv: Update test to handle targets without an fpu 

The FPU is optional on RISC-V.  The gdb.base/float.exp test currently
assumes that an fpu is always available on RISC-V.  Update the test so
that this is not the case.

gdb/testsuite/ChangeLog:

	* gdb.base/float.exp: Handle RISC-V targets without an FPU.
This commit is contained in:
Andrew Burgess 2018-12-04 11:48:42 +00:00
parent 8970c0224e
commit 99e1a184a7
2 changed files with 13 additions and 1 deletions
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4
gdb/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2018-12-11 Andrew Burgess <andrew.burgess@embecosm.com>
* gdb.base/float.exp: Handle RISC-V targets without an FPU.
2018-12-09 Philippe Waroquiers <philippe.waroquiers@skynet.be>
* gdb.threads/tid-reuse.c (REUSE_TIME_CAP): Declare as 60.

10
gdb/testsuite/gdb.base/float.exp
View File

@ -111,7 +111,15 @@ if { [is_aarch64_target] } then {
} elseif [istarget "sparc*-*-*"] then {
gdb_test "info float" "f0.*f1.*f31.*d0.*d30.*" "info float"
} elseif [istarget "riscv*-*-*"] then {
gdb_test "info float" "ft0.*ft1.*ft11.*fflags.*frm.*fcsr.*" "info float"
# RISC-V may or may not have an FPU
gdb_test_multiple "info float" "info float" {
-re "ft0.*ft1.*ft11.*fflags.*frm.*fcsr.*$gdb_prompt $" {
pass "info float (with FPU)"
}
-re "No floating.point info available for this processor.*$gdb_prompt $" {
pass "info float (without FPU)"
}
}
} else {
gdb_test "info float" "No floating.point info available for this processor." "info float (unknown target)"
}