2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (build_modrm_byte): Also check for RegEip
	when considering IP-relative addressing.

gas/testsuite/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/reloc64.s: Adjust for %eip-relative addressing no
	longer generating errors.
	* gas/i386/reloc64.d, gas/i386/reloc64.l: Update.
	* gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix
	for %eip-realtive addressing case.

opcodes/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegEip): Define.
	(RegEiz): Adjust.
	* i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
	* i386-tbl.h: Re-generate.
This commit is contained in:
Jan Beulich 2007-09-26 13:40:59 +00:00
parent 8977835cde
commit 9a04903eea
11 changed files with 41 additions and 13 deletions

View File

@ -1,3 +1,8 @@
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (build_modrm_byte): Also check for RegEip
when considering IP-relative addressing.
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (md_register_arithmetic): Define.

View File

@ -4547,7 +4547,8 @@ build_modrm_byte (void)
}
}
/* RIP addressing for 64bit mode. */
else if (i.base_reg->reg_num == RegRip)
else if (i.base_reg->reg_num == RegRip ||
i.base_reg->reg_num == RegEip)
{
i.rm.regmem = NO_BASE_REGISTER;
i.types[op].bitfield.disp8 = 0;
@ -5982,7 +5983,8 @@ i386_index_check (const char *operand_string)
|| (i.prefix[ADDR_PREFIX]
&& !i.base_reg->reg_type.bitfield.reg32))
&& (i.index_reg
|| i.base_reg->reg_num != RegRip))
|| i.base_reg->reg_num !=
(i.prefix[ADDR_PREFIX] == 0 ? RegRip : RegEip)))
|| (i.index_reg
&& (!i.index_reg->reg_type.bitfield.baseindex
|| (i.prefix[ADDR_PREFIX] == 0

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@ -1,3 +1,11 @@
2007-09-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Adjust for %eip-relative addressing no
longer generating errors.
* gas/i386/reloc64.d, gas/i386/reloc64.l: Update.
* gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix
for %eip-realtive addressing case.
2007-09-25 Nathan Sidwell <nathan@codesourcery.com>
* gas/m68k/br-isaa.d: Dump relocs too.

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@ -18,6 +18,7 @@ Disassembly of section \.text:
.*[ ]+R_X86_64_PC8[ ]+xtrn\+0x0*1
.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
.*[ ]+R_X86_64_PC8[ ]+xtrn\+0xf+f
.*[ ]+R_X86_64_GOT64[ ]+xtrn
.*[ ]+R_X86_64_GOT32[ ]+xtrn
@ -28,6 +29,7 @@ Disassembly of section \.text:
.*[ ]+R_X86_64_GOTPCREL[ ]+xtrn\+0xf+c
.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0x0*2
.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0xf+c
.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0xf+c
.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0x0*2
.*[ ]+R_X86_64_PLT32[ ]+xtrn
.*[ ]+R_X86_64_PLT32[ ]+xtrn

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@ -1,5 +1,4 @@
.*: Assembler messages:
.*:29: Error: .*
.*:35: Error: .*
.*:36: Error: .*
.*:37: Error: .*
@ -17,7 +16,6 @@
.*:54: Error: .*
.*:55: Error: .*
.*:57: Error: .*
.*:66: Error: .*
.*:73: Error: .*
.*:75: Error: .*
.*:76: Error: .*

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@ -26,7 +26,7 @@ ill mov $(xtrn - .), %eax
mov $(xtrn - .), %ax
mov $(xtrn - .), %al
mov xtrn(%rip), %eax
bad mov xtrn(%eip), %eax
mov xtrn(%eip), %eax
call xtrn
jrcxz xtrn
@ -62,8 +62,8 @@ ill movabs $_GLOBAL_OFFSET_TABLE_, %rax
ill add $_GLOBAL_OFFSET_TABLE_, %eax
ill add $_GLOBAL_OFFSET_TABLE_, %ax
ill add $_GLOBAL_OFFSET_TABLE_, %al
lea _GLOBAL_OFFSET_TABLE_(%rip), %rax #???
bad lea _GLOBAL_OFFSET_TABLE_(%eip), %rax
lea _GLOBAL_OFFSET_TABLE_(%rip), %rax
lea _GLOBAL_OFFSET_TABLE_(%eip), %rax
ill movabs $(_GLOBAL_OFFSET_TABLE_ - .), %rax
add $(_GLOBAL_OFFSET_TABLE_ - .), %rax
ill add $(_GLOBAL_OFFSET_TABLE_ - .), %eax

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@ -1,7 +1,7 @@
.text
lea symbol(%eax), %rax
lea symbol(%r8d), %rax
addr32 lea symbol(%rip), %rax
lea symbol(%eip), %rax
addr32 lea symbol, %rax
addr32 mov 0x600898,%al
addr32 mov 0x600898,%ax

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@ -1,3 +1,10 @@
2007-09-26 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegEip): Define.
(RegEiz): Adjust.
* i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
* i386-tbl.h: Re-generate.
2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_i386_opcodes): Process opcode_length.

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@ -447,8 +447,9 @@ typedef struct
#define RegRex64 0x2 /* Extended 8 bit register. */
unsigned int reg_num;
#define RegRip ((unsigned int ) ~0)
#define RegEip (RegRip - 1)
/* EIZ and RIZ are fake index registers. */
#define RegEiz (RegRip - 1)
#define RegEiz (RegEip - 1)
#define RegRiz (RegEiz - 1)
}
reg_entry;

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@ -187,9 +187,10 @@ xmm12, RegXMM, RegRex, 4
xmm13, RegXMM, RegRex, 5
xmm14, RegXMM, RegRex, 6
xmm15, RegXMM, RegRex, 7
// No type will make this register rejected for all purposes except
// for addressing. This saves creating one extra type for RIP.
rip, BaseIndex, 0, RegRip
// No type will make these registers rejected for all purposes except
// for addressing. This saves creating one extra type for RIP/EIP.
rip, BaseIndex, RegRex64, RegRip
eip, BaseIndex, RegRex64, RegEip
// No type will make these registers rejected for all purposes except
// for addressing.
eiz, BaseIndex, 0, RegEiz

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@ -13278,7 +13278,11 @@ const reg_entry i386_regtab[] =
{ "rip",
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
0, RegRip },
RegRex64, RegRip },
{ "eip",
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
RegRex64, RegEip },
{ "eiz",
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },