sim: bfin: handle V overflows in dsp mult insns
The current dsp mult handler does not take care of overflows and updating the V ASTAT bit. So implement it. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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@ -1,3 +1,9 @@
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2011-03-15 Robin Getz <robin.getz@analog.com>
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* bfin-sim.c (decode_dsp32mult_0): Declare v_i0 and v_i1. Pass to
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the extract_mult functions. Include these when updating the V, VS,
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and V_COPY bits.
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2011-03-15 Robin Getz <robin.getz@analog.com>
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* bfin-sim.c (astat_names): New global bit array.
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@ -3851,7 +3851,7 @@ decode_dsp32mult_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
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int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask);
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bu32 res = DREG (dst);
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bu32 sat0 = 0, sat1 = 0;
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bu32 sat0 = 0, sat1 = 0, v_i0 = 0, v_i1 = 0;
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char _buf[128], *buf = _buf;
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int _MM = MM;
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@ -3874,7 +3874,7 @@ decode_dsp32mult_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
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if (w1)
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{
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bu64 r = decode_multfunc (cpu, h01, h11, src0, src1, mmod, MM, &sat1);
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bu32 res1 = extract_mult (cpu, r, mmod, MM, P, NULL);
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bu32 res1 = extract_mult (cpu, r, mmod, MM, P, &v_i1);
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buf += sprintf (buf, P ? "R%i" : "R%i.H", dst + P);
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buf += sprintf (buf, " = R%i.%c * R%i.%c",
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@ -3902,7 +3902,7 @@ decode_dsp32mult_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
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if (w0)
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{
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bu64 r = decode_multfunc (cpu, h00, h10, src0, src1, mmod, 0, &sat0);
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bu32 res0 = extract_mult (cpu, r, mmod, 0, P, NULL);
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bu32 res0 = extract_mult (cpu, r, mmod, 0, P, &v_i0);
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buf += sprintf (buf, P ? "R%i" : "R%i.L", dst);
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buf += sprintf (buf, " = R%i.%c * R%i.%c",
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@ -3926,10 +3926,12 @@ decode_dsp32mult_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
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if (w0 || w1)
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{
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STORE (ASTATREG (v), sat0 | sat1);
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STORE (ASTATREG (v_copy), sat0 | sat1);
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if (sat0 | sat1)
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STORE (ASTATREG (vs), 1);
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bu32 v = sat0 | sat1 | v_i0 | v_i1;
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STORE (ASTATREG (v), v);
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STORE (ASTATREG (v_copy), v);
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if (v)
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STORE (ASTATREG (vs), v);
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}
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}
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