x86: drop redundant VSIB handling code
The vecsib && !base_reg case is already being handled (in a more correct manner) by earlier code.
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@ -1,3 +1,8 @@
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2017-11-23 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (build_modrm_byte): Drop VSIB handling from
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code also setting fake_zero_displacement.
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2017-11-23 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/arch-4.s: Correct ud1 and ud2b. Add ud0.
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@ -6591,13 +6591,7 @@ build_modrm_byte (void)
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{
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i.rm.mode = 0;
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if (!i.disp_operands)
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{
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fake_zero_displacement = 1;
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/* Instructions with VSIB byte need 32bit displacement
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if there is no base register. */
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if (i.tm.opcode_modifier.vecsib)
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i.types[op].bitfield.disp32 = 1;
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}
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fake_zero_displacement = 1;
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if (i.index_reg == 0)
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{
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gas_assert (!i.tm.opcode_modifier.vecsib);
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