* arm-tdep.c (arm_print_float_info): Use register value from FRAME
instead of calling read_register. * avr-tdep.c (avr_push_dummy_call): Write to REGCACHE instead of calling write_register. * hppa-tdep.c (hppa32_push_dummy_call): Write to REGCACHE instead of calling write_register. * ia64-tdep.c (find_func_descr): Add REGCACHE parameter. Use it instead of calling read_register. (ia64_push_dummy_call): Update call to find_func_descr. Use REGCACHE instead of calling read_register and write_register. * m32r-tdep.c (m32r_linux_supply_gregset): Use REGCACHE parameter instead of current_regcache. * mn10300-tdep.c (mn10300_push_dummy_call): Write to REGCACHE instead of calling write_register. * mn10300-linux-tdep.c (am33_supply_fpregset_method): Use REGCACHE parameter instead of current_regcache. * mips-tdep.c (mips2_fp_compat): Add FRAME parameter. Use it instead of calling read_register. (mips_read_fp_register_double, mips_print_fp_register): Update calls. (mips_eabi_push_dummy_call): Use REGCACHE instead of write_register. (mips_n32n64_push_dummy_call): Likewise. (mips_o32_push_dummy_call): Likewise. (mips_o64_push_dummy_call): Likewise. * ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Use REGCACHE parameter instead of current_regcache. * xtensa-tdep.c (xtensa_register_write_masked): Add REGCACHE parameter. Use it instead of read_register and write_register. (xtensa_register_read_masked): Likewise. (xtensa_pseudo_register_read): Update call. (xtensa_pseudo_register_write): Likewise. (xtensa_frame_cache): Use register values unwound from NEXT_FRAME instead of calling read_register. (xtensa_push_dummy_call): Update comment.
This commit is contained in:
Ulrich Weigand
parent
d2ca4222d5
commit
9c9acae0c2
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@ -1,3 +1,47 @@
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2007-06-15 Ulrich Weigand <uweigand@de.ibm.com>
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* arm-tdep.c (arm_print_float_info): Use register value from FRAME
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instead of calling read_register.
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* avr-tdep.c (avr_push_dummy_call): Write to REGCACHE instead of
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calling write_register.
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* hppa-tdep.c (hppa32_push_dummy_call): Write to REGCACHE instead of
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calling write_register.
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* ia64-tdep.c (find_func_descr): Add REGCACHE parameter. Use it
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instead of calling read_register.
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(ia64_push_dummy_call): Update call to find_func_descr. Use REGCACHE
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instead of calling read_register and write_register.
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* m32r-tdep.c (m32r_linux_supply_gregset): Use REGCACHE parameter
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instead of current_regcache.
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* mn10300-tdep.c (mn10300_push_dummy_call): Write to REGCACHE instead
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of calling write_register.
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* mn10300-linux-tdep.c (am33_supply_fpregset_method): Use REGCACHE
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parameter instead of current_regcache.
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* mips-tdep.c (mips2_fp_compat): Add FRAME parameter. Use it
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instead of calling read_register.
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(mips_read_fp_register_double, mips_print_fp_register): Update calls.
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(mips_eabi_push_dummy_call): Use REGCACHE instead of write_register.
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(mips_n32n64_push_dummy_call): Likewise.
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(mips_o32_push_dummy_call): Likewise.
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(mips_o64_push_dummy_call): Likewise.
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* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Use REGCACHE
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parameter instead of current_regcache.
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* xtensa-tdep.c (xtensa_register_write_masked): Add REGCACHE parameter.
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Use it instead of read_register and write_register.
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(xtensa_register_read_masked): Likewise.
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(xtensa_pseudo_register_read): Update call.
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(xtensa_pseudo_register_write): Likewise.
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(xtensa_frame_cache): Use register values unwound from NEXT_FRAME
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instead of calling read_register.
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(xtensa_push_dummy_call): Update comment.
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2007-06-15 Ulrich Weigand <uweigand@de.ibm.com>
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* mips-tdep.c (mips16_scan_prologue): Replace read_next_frame_reg
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@ -1363,7 +1363,7 @@ static void
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arm_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
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struct frame_info *frame, const char *args)
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{
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unsigned long status = read_register (ARM_FPS_REGNUM);
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unsigned long status = get_frame_register_unsigned (frame, ARM_FPS_REGNUM);
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int type;
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type = (status >> 24) & 127;
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@ -1163,8 +1163,8 @@ avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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if (struct_return)
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{
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fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr);
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write_register (argreg--, struct_addr & 0xff);
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write_register (argreg--, (struct_addr >>8) & 0xff);
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regcache_cooked_write_unsigned (regcache, argreg--, struct_addr & 0xff);
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regcache_cooked_write_unsigned (regcache, argreg--, (struct_addr >>8) & 0xff);
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}
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#endif
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@ -832,12 +832,12 @@ hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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/* If a structure has to be returned, set up register 28 to hold its
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address */
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if (struct_return)
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write_register (28, struct_addr);
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regcache_cooked_write_unsigned (regcache, 28, struct_addr);
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gp = tdep->find_global_pointer (function);
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if (gp != 0)
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write_register (19, gp);
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regcache_cooked_write_unsigned (regcache, 19, gp);
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/* Set the return address. */
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if (!gdbarch_push_dummy_code_p (gdbarch))
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@ -3198,7 +3198,7 @@ find_extant_func_descr (CORE_ADDR faddr)
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stack using the address at fdaptr. */
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static CORE_ADDR
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find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
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find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr)
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{
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CORE_ADDR fdesc;
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@ -3206,7 +3206,7 @@ find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
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if (fdesc == 0)
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{
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CORE_ADDR global_pointer;
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ULONGEST global_pointer;
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char buf[16];
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fdesc = *fdaptr;
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@ -3215,7 +3215,8 @@ find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
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global_pointer = ia64_find_global_pointer (faddr);
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if (global_pointer == 0)
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global_pointer = read_register (IA64_GR1_REGNUM);
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regcache_cooked_read_unsigned (regcache,
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IA64_GR1_REGNUM, &global_pointer);
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store_unsigned_integer (buf, 8, faddr);
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store_unsigned_integer (buf + 8, 8, global_pointer);
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@ -3273,7 +3274,8 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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int len, argoffset;
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int nslots, rseslots, memslots, slotnum, nfuncargs;
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int floatreg;
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CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr, pc, global_pointer;
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ULONGEST bsp, cfm, pfs, new_bsp;
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CORE_ADDR funcdescaddr, pc, global_pointer;
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CORE_ADDR func_addr = find_function_addr (function, NULL);
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nslots = 0;
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@ -3299,20 +3301,20 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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memslots = nslots - rseslots;
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/* Allocate a new RSE frame. */
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cfm = read_register (IA64_CFM_REGNUM);
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regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
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bsp = read_register (IA64_BSP_REGNUM);
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regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
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new_bsp = rse_address_add (bsp, rseslots);
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write_register (IA64_BSP_REGNUM, new_bsp);
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regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp);
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pfs = read_register (IA64_PFS_REGNUM);
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regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs);
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pfs &= 0xc000000000000000LL;
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pfs |= (cfm & 0xffffffffffffLL);
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write_register (IA64_PFS_REGNUM, pfs);
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regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs);
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cfm &= 0xc000000000000000LL;
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cfm |= rseslots;
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write_register (IA64_CFM_REGNUM, cfm);
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regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm);
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/* We will attempt to find function descriptors in the .opd segment,
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but if we can't we'll construct them ourselves. That being the
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&& TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
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{
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char val_buf[8];
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ULONGEST faddr = extract_unsigned_integer (value_contents (arg), 8);
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store_unsigned_integer (val_buf, 8,
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find_func_descr (extract_unsigned_integer (value_contents (arg), 8),
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find_func_descr (regcache, faddr,
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&funcdescaddr));
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if (slotnum < rseslots)
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write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
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@ -3410,11 +3412,11 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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global_pointer = ia64_find_global_pointer (func_addr);
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if (global_pointer != 0)
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write_register (IA64_GR1_REGNUM, global_pointer);
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regcache_cooked_write_unsigned (regcache, IA64_GR1_REGNUM, global_pointer);
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write_register (IA64_BR0_REGNUM, bp_addr);
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regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr);
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write_register (sp_regnum, sp);
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regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
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return sp;
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}
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@ -383,7 +383,7 @@ m32r_linux_supply_gregset (const struct regset *regset,
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break;
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}
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regcache_raw_supply (current_regcache, i,
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regcache_raw_supply (regcache, i,
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regs + m32r_pt_regs_offset[i]);
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}
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}
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@ -427,7 +427,7 @@ mips_xfer_register (struct regcache *regcache, int reg_num, int length,
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physical 64-bit registers, but should treat them as 32-bit registers. */
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static int
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mips2_fp_compat (void)
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mips2_fp_compat (struct frame_info *frame)
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{
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/* MIPS1 and MIPS2 have only 32 bit FPRs, and the FR bit is not
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meaningful. */
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@ -441,7 +441,7 @@ mips2_fp_compat (void)
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/* Otherwise check the FR bit in the status register - it controls
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the FP compatiblity mode. If it is clear we are in compatibility
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mode. */
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if ((read_register (MIPS_PS_REGNUM) & ST0_FR) == 0)
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if ((get_frame_register_unsigned (frame, MIPS_PS_REGNUM) & ST0_FR) == 0)
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return 1;
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#endif
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@ -2565,7 +2565,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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fprintf_unfiltered (gdb_stdlog,
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"mips_eabi_push_dummy_call: struct_return reg=%d 0x%s\n",
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argreg, paddr_nz (struct_addr));
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write_register (argreg++, struct_addr);
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regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
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}
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/* Now load as many as possible of the first arguments into
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@ -2642,14 +2642,14 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, 4));
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write_register (float_argreg++, regval);
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regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
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/* Write the high word of the double to the odd register(s). */
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regval = extract_unsigned_integer (val + 4 - low_offset, 4);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, 4));
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write_register (float_argreg++, regval);
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regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
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}
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else
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{
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@ -2661,7 +2661,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, len));
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write_register (float_argreg++, regval);
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regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
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}
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}
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else
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@ -2750,7 +2750,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
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argreg,
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phex (regval, regsize));
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write_register (argreg, regval);
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regcache_cooked_write_unsigned (regcache, argreg, regval);
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argreg++;
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}
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@ -2846,7 +2846,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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fprintf_unfiltered (gdb_stdlog,
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"mips_n32n64_push_dummy_call: struct_return reg=%d 0x%s\n",
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argreg, paddr_nz (struct_addr));
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write_register (argreg++, struct_addr);
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regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
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}
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/* Now load as many as possible of the first arguments into
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@ -2878,12 +2878,12 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, len));
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write_register (float_argreg++, regval);
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regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, len));
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write_register (argreg, regval);
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regcache_cooked_write_unsigned (regcache, argreg, regval);
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argreg += 1;
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}
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else
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@ -2983,7 +2983,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
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argreg,
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phex (regval, MIPS64_REGSIZE));
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write_register (argreg, regval);
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regcache_cooked_write_unsigned (regcache, argreg, regval);
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argreg++;
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}
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@ -3204,7 +3204,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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fprintf_unfiltered (gdb_stdlog,
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"mips_o32_push_dummy_call: struct_return reg=%d 0x%s\n",
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argreg, paddr_nz (struct_addr));
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write_register (argreg++, struct_addr);
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regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
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stack_offset += MIPS32_REGSIZE;
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}
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@ -3261,23 +3261,23 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, 4));
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write_register (float_argreg++, regval);
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regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, 4));
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write_register (argreg++, regval);
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regcache_cooked_write_unsigned (regcache, argreg++, regval);
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/* Write the high word of the double to the odd register(s). */
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regval = extract_unsigned_integer (val + 4 - low_offset, 4);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, 4));
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write_register (float_argreg++, regval);
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regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, 4));
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write_register (argreg++, regval);
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regcache_cooked_write_unsigned (regcache, argreg++, regval);
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}
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else
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{
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@ -3289,7 +3289,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, len));
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write_register (float_argreg++, regval);
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regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
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/* CAGNEY: 32 bit MIPS ABI's always reserve two FP
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registers for each argument. The below is (my
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guess) to ensure that the corresponding integer
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@ -3297,7 +3297,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, len));
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write_register (argreg, regval);
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regcache_cooked_write_unsigned (regcache, argreg, regval);
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argreg += 2;
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}
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/* Reserve space for the FP register. */
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|
|
@ -3415,7 +3415,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
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argreg,
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phex (regval, MIPS32_REGSIZE));
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write_register (argreg, regval);
|
||||
regcache_cooked_write_unsigned (regcache, argreg, regval);
|
||||
argreg++;
|
||||
|
||||
/* Prevent subsequent floating point arguments from
|
||||
|
|
@ -3663,7 +3663,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
fprintf_unfiltered (gdb_stdlog,
|
||||
"mips_o64_push_dummy_call: struct_return reg=%d 0x%s\n",
|
||||
argreg, paddr_nz (struct_addr));
|
||||
write_register (argreg++, struct_addr);
|
||||
regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
|
||||
stack_offset += MIPS64_REGSIZE;
|
||||
}
|
||||
|
||||
|
|
@ -3702,11 +3702,11 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
if (mips_debug)
|
||||
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
|
||||
float_argreg, phex (regval, len));
|
||||
write_register (float_argreg++, regval);
|
||||
regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
|
||||
if (mips_debug)
|
||||
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
|
||||
argreg, phex (regval, len));
|
||||
write_register (argreg, regval);
|
||||
regcache_cooked_write_unsigned (regcache, argreg, regval);
|
||||
argreg++;
|
||||
/* Reserve space for the FP register. */
|
||||
stack_offset += align_up (len, MIPS64_REGSIZE);
|
||||
|
|
@ -3804,7 +3804,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
|
||||
argreg,
|
||||
phex (regval, MIPS64_REGSIZE));
|
||||
write_register (argreg, regval);
|
||||
regcache_cooked_write_unsigned (regcache, argreg, regval);
|
||||
argreg++;
|
||||
|
||||
/* Prevent subsequent floating point arguments from
|
||||
|
|
@ -3970,7 +3970,7 @@ mips_read_fp_register_double (struct frame_info *frame, int regno,
|
|||
{
|
||||
int raw_size = register_size (current_gdbarch, regno);
|
||||
|
||||
if (raw_size == 8 && !mips2_fp_compat ())
|
||||
if (raw_size == 8 && !mips2_fp_compat (frame))
|
||||
{
|
||||
/* We have a 64-bit value for this register, and we should use
|
||||
all 64 bits. */
|
||||
|
|
@ -4018,7 +4018,7 @@ mips_print_fp_register (struct ui_file *file, struct frame_info *frame,
|
|||
(current_gdbarch, regnum)),
|
||||
"");
|
||||
|
||||
if (register_size (current_gdbarch, regnum) == 4 || mips2_fp_compat ())
|
||||
if (register_size (current_gdbarch, regnum) == 4 || mips2_fp_compat (frame))
|
||||
{
|
||||
/* 4-byte registers: Print hex and floating. Also print even
|
||||
numbered registers as doubles. */
|
||||
|
|
|
|||
|
|
@ -263,10 +263,10 @@ am33_supply_fpregset_method (const struct regset *regset,
|
|||
E_FPCR_REGNUM, fpregs, len);
|
||||
}
|
||||
else if (regnum == E_FPCR_REGNUM)
|
||||
regcache_raw_supply (current_regcache, E_FPCR_REGNUM,
|
||||
regcache_raw_supply (regcache, E_FPCR_REGNUM,
|
||||
&fpregset->fpcr);
|
||||
else if (E_FS0_REGNUM <= regnum && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
|
||||
regcache_raw_supply (current_regcache, regnum,
|
||||
regcache_raw_supply (regcache, regnum,
|
||||
&fpregset->fpregs[regnum - E_FS0_REGNUM]);
|
||||
|
||||
return;
|
||||
|
|
@ -441,11 +441,11 @@ am33_collect_fpregset_method (const struct regset *regset,
|
|||
E_FPCR_REGNUM, fpregs, len);
|
||||
}
|
||||
else if (regnum == E_FPCR_REGNUM)
|
||||
regcache_raw_collect (current_regcache, E_FPCR_REGNUM,
|
||||
regcache_raw_collect (regcache, E_FPCR_REGNUM,
|
||||
&fpregset->fpcr);
|
||||
else if (E_FS0_REGNUM <= regnum
|
||||
&& regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
|
||||
regcache_raw_collect (current_regcache, regnum,
|
||||
regcache_raw_collect (regcache, regnum,
|
||||
&fpregset->fpregs[regnum - E_FS0_REGNUM]);
|
||||
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -1008,7 +1008,7 @@ mn10300_push_dummy_call (struct gdbarch *gdbarch,
|
|||
if (struct_return)
|
||||
{
|
||||
regs_used = 1;
|
||||
write_register (E_D0_REGNUM, struct_addr);
|
||||
regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
|
||||
}
|
||||
else
|
||||
regs_used = 0;
|
||||
|
|
@ -1034,8 +1034,8 @@ mn10300_push_dummy_call (struct gdbarch *gdbarch,
|
|||
|
||||
while (regs_used < 2 && arg_len > 0)
|
||||
{
|
||||
write_register (regs_used,
|
||||
extract_unsigned_integer (val, push_size));
|
||||
regcache_cooked_write_unsigned (regcache, regs_used,
|
||||
extract_unsigned_integer (val, push_size));
|
||||
val += push_size;
|
||||
arg_len -= push_size;
|
||||
regs_used++;
|
||||
|
|
|
|||
|
|
@ -191,7 +191,7 @@ ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
if (vreg <= 13)
|
||||
{
|
||||
if (write_pass)
|
||||
regcache_cooked_write (current_regcache,
|
||||
regcache_cooked_write (regcache,
|
||||
tdep->ppc_vr0_regnum + vreg, val);
|
||||
vreg++;
|
||||
}
|
||||
|
|
@ -217,7 +217,7 @@ ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
if (greg <= 10)
|
||||
{
|
||||
if (write_pass)
|
||||
regcache_cooked_write (current_regcache,
|
||||
regcache_cooked_write (regcache,
|
||||
tdep->ppc_ev0_regnum + greg, val);
|
||||
greg++;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -314,7 +314,8 @@ xtensa_reg_to_regnum (int regnum)
|
|||
(Note: The size of masked registers is always less or equal 32 bits.) */
|
||||
|
||||
static void
|
||||
xtensa_register_write_masked (xtensa_register_t *reg, unsigned char *buffer)
|
||||
xtensa_register_write_masked (struct regcache *regcache,
|
||||
xtensa_register_t *reg, const gdb_byte *buffer)
|
||||
{
|
||||
unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
|
||||
|
||||
|
|
@ -383,10 +384,12 @@ xtensa_register_write_masked (xtensa_register_t *reg, unsigned char *buffer)
|
|||
if (r >= 0 && size > 0)
|
||||
{
|
||||
/* Don't overwrite the unmasked areas. */
|
||||
ULONGEST old_val;
|
||||
regcache_cooked_read_unsigned (regcache, r, &old_val);
|
||||
m = 0xffffffff >> (32 - size) << start;
|
||||
regval <<= start;
|
||||
regval = (regval & m) | (read_register (r) & ~m);
|
||||
write_register (r, regval);
|
||||
regval = (regval & m) | (old_val & ~m);
|
||||
regcache_cooked_write_unsigned (regcache, r, regval);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -396,7 +399,8 @@ xtensa_register_write_masked (xtensa_register_t *reg, unsigned char *buffer)
|
|||
register. */
|
||||
|
||||
static void
|
||||
xtensa_register_read_masked (xtensa_register_t *reg, unsigned char *buffer)
|
||||
xtensa_register_read_masked (struct regcache *regcache,
|
||||
xtensa_register_t *reg, gdb_byte *buffer)
|
||||
{
|
||||
unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
|
||||
|
||||
|
|
@ -419,7 +423,15 @@ xtensa_register_read_masked (xtensa_register_t *reg, unsigned char *buffer)
|
|||
for (i = 0; i < mask->count; i++)
|
||||
{
|
||||
int r = mask->mask[i].reg_num;
|
||||
regval = (r >= 0) ? read_register (r) : 0;
|
||||
if (r >= 0)
|
||||
{
|
||||
ULONGEST val;
|
||||
regcache_cooked_read_unsigned (regcache, r, &val);
|
||||
regval = (unsigned int) val;
|
||||
}
|
||||
else
|
||||
regval = 0;
|
||||
|
||||
start = mask->mask[i].bit_start;
|
||||
size = mask->mask[i].bit_size;
|
||||
|
||||
|
|
@ -541,7 +553,7 @@ xtensa_pseudo_register_read (struct gdbarch *gdbarch,
|
|||
/* We can always read mapped registers. */
|
||||
else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState)
|
||||
{
|
||||
xtensa_register_read_masked (reg, (unsigned char *) buffer);
|
||||
xtensa_register_read_masked (regcache, reg, buffer);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -629,7 +641,7 @@ xtensa_pseudo_register_write (struct gdbarch *gdbarch,
|
|||
/* We can always write mapped registers. */
|
||||
else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState)
|
||||
{
|
||||
xtensa_register_write_masked (reg, (unsigned char *) buffer);
|
||||
xtensa_register_write_masked (regcache, reg, buffer);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -910,10 +922,9 @@ xtensa_frame_cache (struct frame_info *next_frame, void **this_cache)
|
|||
pc = frame_unwind_register_unsigned (next_frame, PC_REGNUM);
|
||||
|
||||
op1 = read_memory_integer (pc, 1);
|
||||
if (XTENSA_IS_ENTRY (op1) || !windowing_enabled (read_register (PS_REGNUM)))
|
||||
if (XTENSA_IS_ENTRY (op1) || !windowing_enabled (ps))
|
||||
{
|
||||
int callinc = CALLINC (frame_unwind_register_unsigned (next_frame,
|
||||
PS_REGNUM));
|
||||
int callinc = CALLINC (ps);
|
||||
ra = frame_unwind_register_unsigned (next_frame,
|
||||
A0_REGNUM + callinc * 4);
|
||||
|
||||
|
|
@ -924,7 +935,7 @@ xtensa_frame_cache (struct frame_info *next_frame, void **this_cache)
|
|||
cache->callsize = 0;
|
||||
cache->wb = wb;
|
||||
cache->ws = ws;
|
||||
cache->prev_sp = read_register (A1_REGNUM);
|
||||
cache->prev_sp = frame_unwind_register_unsigned (next_frame, A1_REGNUM);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -987,7 +998,7 @@ xtensa_frame_cache (struct frame_info *next_frame, void **this_cache)
|
|||
|
||||
int regnum = AREG_NUMBER (A1_REGNUM, cache->wb);
|
||||
|
||||
cache->prev_sp = read_register (regnum);
|
||||
cache->prev_sp = frame_unwind_register_unsigned (next_frame, regnum);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1467,7 +1478,7 @@ xtensa_push_dummy_call (struct gdbarch *gdbarch,
|
|||
/* ULONGEST v = extract_unsigned_integer (cp, REGISTER_SIZE);*/
|
||||
regcache_cooked_write (regcache, r, cp);
|
||||
|
||||
/* write_register (r, v); */
|
||||
/* regcache_cooked_write_unsigned (regcache, r, v); */
|
||||
cp += REGISTER_SIZE;
|
||||
n -= REGISTER_SIZE;
|
||||
r++;
|
||||
|
|
|
|||
Loading…
Reference in New Issue