* as.c (perform_an_assembly_pass): If using cgen, call gas_cgen_begin.
* cgen.c (gas_cgen_begin): New function. If flag_signed_overflow_ok is set call cgen_set_signed_overflow_ok otherwise call cgen_clear_signed_overflow_ok. * cgen.h: Prototype gas_cgen_begin. * testsuite/gas/m32r/m32r.exp: Run signed-relocs test. * testsuite/gas/m32r/signed-relocs.s: New file: Test signed relocs. * testsuite/gas/m32r/signed-relocs.d: New file: Expected results
This commit is contained in:
Nick Clifton
parent
983aea3412
commit
9cc92a36ed
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@ -1,3 +1,12 @@
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2003-04-08 Nick Clifton <nickc@redhat.com>
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* as.c (perform_an_assembly_pass): If using cgen, call
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gas_cgen_begin.
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* cgen.c (gas_cgen_begin): New function. If
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flag_signed_overflow_ok is set call cgen_set_signed_overflow_ok
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otherwise call cgen_clear_signed_overflow_ok.
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* cgen.h: Prototype gas_cgen_begin.
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2003-04-07 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
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* write.c (write_relocs): Remove unused variable.
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7
gas/as.c
7
gas/as.c
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@ -65,6 +65,10 @@ static void parse_args PARAMS ((int *, char ***));
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static void dump_statistics PARAMS ((void));
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static void perform_an_assembly_pass PARAMS ((int argc, char **argv));
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static int macro_expr PARAMS ((const char *, int, sb *, int *));
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#ifdef USING_CGEN
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/* Perform any cgen specific initialisation for gas. */
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extern void gas_cgen_begin PARAMS ((void));
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#endif
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/* True if a listing is wanted. */
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int listing;
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@ -1064,6 +1068,9 @@ perform_an_assembly_pass (argc, argv)
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and sections already created, in BFD_ASSEMBLER mode. */
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md_begin ();
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#ifdef USING_CGEN
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gas_cgen_begin ();
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#endif
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#ifdef obj_begin
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obj_begin ();
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#endif
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12
gas/cgen.c
12
gas/cgen.c
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@ -716,3 +716,15 @@ gas_cgen_tc_gen_reloc (section, fixP)
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reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
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return reloc;
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}
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/* Perform any cgen specific initialisation.
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Called after gas_cgen_cpu_desc has been created. */
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void
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gas_cgen_begin ()
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{
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if (flag_signed_overflow_ok)
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cgen_set_signed_overflow_ok (gas_cgen_cpu_desc);
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else
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cgen_clear_signed_overflow_ok (gas_cgen_cpu_desc);
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}
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@ -98,4 +98,7 @@ md_cgen_record_fixup_exp PARAMS ((fragS *, int, const CGEN_INSN *, int,
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extern void gas_cgen_md_operand PARAMS ((expressionS *));
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/* Perform any cgen specific initialisation for gas. */
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extern void gas_cgen_begin PARAMS ((void));
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#endif /* GAS_CGEN_H */
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@ -1,5 +1,9 @@
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2003-04-08 Nick Clifton <nickc@redhat.com>
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* gas/m32r/m32r.exp: Run signed-relocs test.
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* gas/m32r/signed-relocs.s: New file: Test signed relocs.
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* gas/m32r/signed-relocs.d: New file: Expected results
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* gas/ia64/dependency-1.s: New file: Test read before write dependency.
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* gas/ia64/dependency-1.d: New file: Expected assembly results.
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* gas/ia64/ia64.exp: Run the new test.
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@ -5,4 +5,5 @@ if [istarget m32r*-*-*] {
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run_dump_test "relax-1"
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run_dump_test "uppercase"
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run_dump_test "fslot"
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run_dump_test "signed-relocs"
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}
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@ -0,0 +1,77 @@
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#as: -J
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#objdump: -dr
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#name: Signed relocs
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.*: +file format .*
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Disassembly of section .text:
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0+0000 <relocs>:
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0: d0 c0 87 65 seth r0,#0x8765
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4: 80 a0 43 21 add3 r0,r0,#17185
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8: d0 c0 87 65 seth r0,#0x8765
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c: 80 a0 43 21 add3 r0,r0,#17185
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10: d0 c0 12 35 seth r0,#0x1235
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14: 80 a0 ff ff add3 r0,r0,#-1
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18: d0 c0 12 35 seth r0,#0x1235
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1c: 80 a0 ff ff add3 r0,r0,#-1
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20: d0 c0 87 65 seth r0,#0x8765
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24: 80 e0 43 21 or3 r0,r0,#0x4321
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28: d0 c0 87 65 seth r0,#0x8765
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2c: 80 e0 43 21 or3 r0,r0,#0x4321
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30: d0 c0 12 34 seth r0,#0x1234
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34: 80 e0 ff ff or3 r0,r0,#0xffff
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38: d0 c0 12 34 seth r0,#0x1234
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3c: 80 e0 ff ff or3 r0,r0,#0xffff
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40: d0 c0 87 65 seth r0,#0x8765
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44: a0 c0 43 20 ld r0,@\(17184,r0\)
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48: d0 c0 87 65 seth r0,#0x8765
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4c: a0 a0 43 20 ldh r0,@\(17184,r0\)
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50: d0 c0 87 65 seth r0,#0x8765
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54: a0 b0 43 20 lduh r0,@\(17184,r0\)
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58: d0 c0 87 65 seth r0,#0x8765
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5c: a0 80 43 20 ldb r0,@\(17184,r0\)
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60: d0 c0 87 65 seth r0,#0x8765
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64: a0 90 43 20 ldub r0,@\(17184,r0\)
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68: d0 c0 12 35 seth r0,#0x1235
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6c: a0 c0 ff f0 ld r0,@\(-16,r0\)
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70: d0 c0 12 35 seth r0,#0x1235
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74: a0 a0 ff f0 ldh r0,@\(-16,r0\)
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78: d0 c0 12 35 seth r0,#0x1235
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7c: a0 b0 ff f0 lduh r0,@\(-16,r0\)
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80: d0 c0 12 35 seth r0,#0x1235
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84: a0 80 ff f0 ldb r0,@\(-16,r0\)
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88: d0 c0 12 35 seth r0,#0x1235
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8c: a0 90 ff f0 ldub r0,@\(-16,r0\)
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90: d0 c0 87 65 seth r0,#0x8765
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94: a0 c0 43 20 ld r0,@\(17184,r0\)
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98: d0 c0 87 65 seth r0,#0x8765
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9c: a0 a0 43 20 ldh r0,@\(17184,r0\)
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a0: d0 c0 87 65 seth r0,#0x8765
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a4: a0 b0 43 20 lduh r0,@\(17184,r0\)
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a8: d0 c0 87 65 seth r0,#0x8765
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ac: a0 80 43 20 ldb r0,@\(17184,r0\)
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b0: d0 c0 87 65 seth r0,#0x8765
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b4: a0 90 43 20 ldub r0,@\(17184,r0\)
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b8: d0 c0 12 35 seth r0,#0x1235
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bc: a0 c0 ff f0 ld r0,@\(-16,r0\)
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c0: d0 c0 87 65 seth r0,#0x8765
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c4: a0 40 43 20 st r0,@\(17184,r0\)
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c8: d0 c0 87 65 seth r0,#0x8765
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cc: a0 20 43 20 sth r0,@\(17184,r0\)
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d0: d0 c0 87 65 seth r0,#0x8765
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d4: a0 00 43 20 stb r0,@\(17184,r0\)
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d8: d0 c0 12 35 seth r0,#0x1235
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dc: a0 40 ff f0 st r0,@\(-16,r0\)
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e0: d0 c0 12 35 seth r0,#0x1235
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e4: a0 20 ff f0 sth r0,@\(-16,r0\)
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e8: d0 c0 12 35 seth r0,#0x1235
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ec: a0 00 ff f0 stb r0,@\(-16,r0\)
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f0: d0 c0 87 65 seth r0,#0x8765
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f4: a0 40 43 20 st r0,@\(17184,r0\)
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f8: d0 c0 87 65 seth r0,#0x8765
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fc: a0 20 43 20 sth r0,@\(17184,r0\)
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100: d0 c0 87 65 seth r0,#0x8765
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104: a0 00 43 20 stb r0,@\(17184,r0\)
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108: d0 c0 12 35 seth r0,#0x1235
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10c: a0 40 ff f0 st r0,@\(-16,r0\)
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@ -0,0 +1,80 @@
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; check: not case sensitive for special operand modifier
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; check: shigh, high, low
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.text
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relocs:
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seth r0, #shigh(0x87654321)
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add3 r0, r0, #low(0x87654321)
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seth r0, #SHIGH(0x87654321)
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add3 r0, r0, #LOW(0x87654321)
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seth r0, #shigh(0x1234ffff)
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add3 r0, r0, #low(0x1234ffff)
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seth r0, #SHIGH(0x1234ffff)
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add3 r0, r0, #LOW(0x1234ffff)
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seth r0, #high(0x87654321)
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or3 r0, r0, #low(0x87654321)
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seth r0, #HIGH(0x87654321)
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or3 r0, r0, #LOW(0x87654321)
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seth r0, #high(0x1234ffff)
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or3 r0, r0, #low(0x1234ffff)
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seth r0, #HIGH(0x1234ffff)
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or3 r0, r0, #LOW(0x1234ffff)
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seth r0, #shigh(0x87654320)
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ld r0, @(#low(0x87654320),r0)
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seth r0, #shigh(0x87654320)
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ldh r0, @(#low(0x87654320),r0)
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seth r0, #shigh(0x87654320)
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lduh r0, @(#low(0x87654320),r0)
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seth r0, #shigh(0x87654320)
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ldb r0, @(#low(0x87654320),r0)
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seth r0, #shigh(0x87654320)
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ldub r0, @(#low(0x87654320),r0)
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seth r0, #shigh(0x1234fff0)
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ld r0, @(#low(0x1234fff0),r0)
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seth r0, #shigh(0x1234fff0)
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ldh r0, @(#low(0x1234fff0),r0)
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seth r0, #shigh(0x1234fff0)
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lduh r0, @(#low(0x1234fff0),r0)
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seth r0, #shigh(0x1234fff0)
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ldb r0, @(#low(0x1234fff0),r0)
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seth r0, #shigh(0x1234fff0)
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ldub r0, @(#low(0x1234fff0),r0)
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seth r0, #SHIGH(0x87654320)
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ld r0, @(#LOW(0x87654320),r0)
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seth r0, #SHIGH(0x87654320)
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ldh r0, @(#LOW(0x87654320),r0)
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seth r0, #SHIGH(0x87654320)
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lduh r0, @(#LOW(0x87654320),r0)
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seth r0, #SHIGH(0x87654320)
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ldb r0, @(#LOW(0x87654320),r0)
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seth r0, #SHIGH(0x87654320)
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ldub r0, @(#LOW(0x87654320),r0)
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seth r0, #SHIGH(0x1234fff0)
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ld r0, @(#LOW(0x1234fff0),r0)
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seth r0, #shigh(0x87654320)
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st r0, @(#low(0x87654320),r0)
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seth r0, #shigh(0x87654320)
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sth r0, @(#low(0x87654320),r0)
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seth r0, #shigh(0x87654320)
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stb r0, @(#low(0x87654320),r0)
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seth r0, #shigh(0x1234fff0)
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st r0, @(#low(0x1234fff0),r0)
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seth r0, #shigh(0x1234fff0)
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sth r0, @(#low(0x1234fff0),r0)
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seth r0, #shigh(0x1234fff0)
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stb r0, @(#low(0x1234fff0),r0)
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seth r0, #SHIGH(0x87654320)
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st r0, @(#LOW(0x87654320),r0)
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seth r0, #SHIGH(0x87654320)
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sth r0, @(#LOW(0x87654320),r0)
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seth r0, #SHIGH(0x87654320)
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stb r0, @(#LOW(0x87654320),r0)
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seth r0, #SHIGH(0x1234fff0)
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st r0, @(#LOW(0x1234fff0),r0)
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