diff --git a/binutils/ChangeLog b/binutils/ChangeLog index 530d802c7c..a85ee11a7d 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,8 @@ +2007-12-22 H.J. Lu + + * doc/binutils.texi: Document the new intel-mnemonic and + intel-mnemonic options for i386 disassembler. + 2007-12-07 Bob Wilson * readelf.c (is_32bit_pcrel_reloc): Add Xtensa. diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi index 22e2e25a4c..76d55c321e 100644 --- a/binutils/doc/binutils.texi +++ b/binutils/doc/binutils.texi @@ -1801,7 +1801,11 @@ switch, but allow finer grained control. Multiple selections from the following may be specified as a comma separated string. @option{x86-64}, @option{i386} and @option{i8086} select disassembly for the given architecture. @option{intel} and @option{att} select between -intel syntax mode and AT&T syntax mode. @option{addr64}, @option{addr32}, +intel syntax mode and AT&T syntax mode. +@option{intel-mnemonic} and @option{att-mnemonic} select between +intel mnemonic mode and AT&T mnemonic mode. @option{intel-mnemonic} +implies @option{intel} and @option{att-mnemonic} implies @option{att}. +@option{addr64}, @option{addr32}, @option{addr16}, @option{data32} and @option{data16} specify the default address size and operand size. These four options will be overridden if @option{x86-64}, @option{i386} or @option{i8086} appear later in the diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index c95d172634..d85a112766 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2007-12-22 H.J. Lu + + * gas/i386/compat-intel.d: New file. + * gas/i386/compat.d: Likewise. + * gas/i386/compat.s: Likewise. + + * gas/i386/i386.exp: Run compat. + 2007-12-13 Bob Wilson * gas/xtensa/all.exp: Run new weak-call test. @@ -6,9 +14,9 @@ 2007-12-11 Catherine Moore - gas/elf/symtab.s: New test. - gas/elf/symtab.d: New expected output. - gas/elf/elf.exp: Run the new symbtab test. + * gas/elf/symtab.s: New test. + * gas/elf/symtab.d: New expected output. + * gas/elf/elf.exp: Run the new symbtab test. 2007-12-10 Richard Sandiford diff --git a/gas/testsuite/gas/i386/compat-intel.d b/gas/testsuite/gas/i386/compat-intel.d new file mode 100644 index 0000000000..f252a9b802 --- /dev/null +++ b/gas/testsuite/gas/i386/compat-intel.d @@ -0,0 +1,26 @@ +#objdump: -d -Mintel-mnemonic +#name: i386 float Intel mnemonic +#source: compat.s + +.*: +file format .* + +Disassembly of section .text: + +0+ <.text>: +[ ]*[a-f0-9]+: dc e3 fsubr st\(3\),st +[ ]*[a-f0-9]+: de e1 fsubrp st\(1\),st +[ ]*[a-f0-9]+: de e3 fsubrp st\(3\),st +[ ]*[a-f0-9]+: de e3 fsubrp st\(3\),st +[ ]*[a-f0-9]+: dc eb fsub st\(3\),st +[ ]*[a-f0-9]+: de e9 fsubp st\(1\),st +[ ]*[a-f0-9]+: de eb fsubp st\(3\),st +[ ]*[a-f0-9]+: de eb fsubp st\(3\),st +[ ]*[a-f0-9]+: dc f3 fdivr st\(3\),st +[ ]*[a-f0-9]+: de f1 fdivrp st\(1\),st +[ ]*[a-f0-9]+: de f3 fdivrp st\(3\),st +[ ]*[a-f0-9]+: de f3 fdivrp st\(3\),st +[ ]*[a-f0-9]+: dc fb fdiv st\(3\),st +[ ]*[a-f0-9]+: de f9 fdivp st\(1\),st +[ ]*[a-f0-9]+: de fb fdivp st\(3\),st +[ ]*[a-f0-9]+: de fb fdivp st\(3\),st +#pass diff --git a/gas/testsuite/gas/i386/compat.d b/gas/testsuite/gas/i386/compat.d new file mode 100644 index 0000000000..9629971298 --- /dev/null +++ b/gas/testsuite/gas/i386/compat.d @@ -0,0 +1,25 @@ +#objdump: -d -Matt-mnemonic +#name: i386 float AT&T mnemonic + +.*: +file format .* + +Disassembly of section .text: + +0+ <.text>: +[ ]*[a-f0-9]+: dc e3 fsub %st,%st\(3\) +[ ]*[a-f0-9]+: de e1 fsubp %st,%st\(1\) +[ ]*[a-f0-9]+: de e3 fsubp %st,%st\(3\) +[ ]*[a-f0-9]+: de e3 fsubp %st,%st\(3\) +[ ]*[a-f0-9]+: dc eb fsubr %st,%st\(3\) +[ ]*[a-f0-9]+: de e9 fsubrp %st,%st\(1\) +[ ]*[a-f0-9]+: de eb fsubrp %st,%st\(3\) +[ ]*[a-f0-9]+: de eb fsubrp %st,%st\(3\) +[ ]*[a-f0-9]+: dc f3 fdiv %st,%st\(3\) +[ ]*[a-f0-9]+: de f1 fdivp %st,%st\(1\) +[ ]*[a-f0-9]+: de f3 fdivp %st,%st\(3\) +[ ]*[a-f0-9]+: de f3 fdivp %st,%st\(3\) +[ ]*[a-f0-9]+: dc fb fdivr %st,%st\(3\) +[ ]*[a-f0-9]+: de f9 fdivrp %st,%st\(1\) +[ ]*[a-f0-9]+: de fb fdivrp %st,%st\(3\) +[ ]*[a-f0-9]+: de fb fdivrp %st,%st\(3\) +#pass diff --git a/gas/testsuite/gas/i386/compat.s b/gas/testsuite/gas/i386/compat.s new file mode 100644 index 0000000000..17163115ed --- /dev/null +++ b/gas/testsuite/gas/i386/compat.s @@ -0,0 +1,18 @@ +# Check SYSV mnemonic instructions. + .text + fsub %st,%st(3) + fsubp + fsubp %st(3) + fsubp %st,%st(3) + fsubr %st,%st(3) + fsubrp + fsubrp %st(3) + fsubrp %st,%st(3) + fdiv %st,%st(3) + fdivp + fdivp %st(3) + fdivp %st,%st(3) + fdivr %st,%st(3) + fdivrp + fdivrp %st(3) + fdivrp %st,%st(3) diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index bdb68cef3b..70e80bf1f4 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -96,6 +96,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "reg" run_dump_test "reg-intel" run_dump_test "i386" + run_dump_test "compat" + run_dump_test "compat-intel" # These tests require support for 8 and 16 bit relocs, # so we only run them for ELF and COFF targets. diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 128d29edb2..b423b31f76 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,12 @@ +2007-12-22 H.J. Lu + + * i386-dis.c (intel_mnemonic): New. + (print_i386_disassembler_options): Display att-mnemonic and + intel-mnemonic options. + (print_insn): Handle att-mnemonic and intel-mnemonic. + (float_reg): Replace SYSV386_COMPAT with "!M" and "M". + (putop): Handle "!M" and "M". + 2007-12-21 H.J. Lu * Makefile.am (i386-gen.o): Also depend on diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index c169343c4a..3fc7058e90 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -730,6 +730,7 @@ struct dis386 { 'J' => print 'l' 'K' => print 'd' or 'q' if rex prefix is present. 'L' => print 'l' if suffix_always is true + 'M' => print 'r' if intel_mnemonic is false. 'N' => print 'n' if instruction has no wait "prefix" 'O' => print 'd' or 'o' (or 'q' in Intel mode) 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix, @@ -746,6 +747,7 @@ struct dis386 { 'Y' => 'q' if instruction has an REX 64bit overwrite prefix and suffix_always is true. 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise + '!' => change condition from true to false or from false to true. Many of the above letters print nothing in Intel mode. See "putop" for the details. @@ -5058,6 +5060,7 @@ static bfd_vma start_pc; */ static char intel_syntax; +static char intel_mnemonic = !SYSV386_COMPAT; static char open_char; static char close_char; static char separator_char; @@ -5102,6 +5105,10 @@ with the -M switch (multiple options should be separated by commas):\n")); fprintf (stream, _(" i8086 Disassemble in 16bit mode\n")); fprintf (stream, _(" att Display instruction in AT&T syntax\n")); fprintf (stream, _(" intel Display instruction in Intel syntax\n")); + fprintf (stream, _(" att-mnemonic\n" + " Display instruction in AT&T mnemonic\n")); + fprintf (stream, _(" intel-mnemonic\n" + " Display instruction in Intel mnemonic\n")); fprintf (stream, _(" addr64 Assume 64bit address size\n")); fprintf (stream, _(" addr32 Assume 32bit address size\n")); fprintf (stream, _(" addr16 Assume 16bit address size\n")); @@ -5245,10 +5252,14 @@ print_insn (bfd_vma pc, disassemble_info *info) else if (CONST_STRNEQ (p, "intel")) { intel_syntax = 1; + if (CONST_STRNEQ (p + 5, "-mnemonic")) + intel_mnemonic = 1; } else if (CONST_STRNEQ (p, "att")) { intel_syntax = 0; + if (CONST_STRNEQ (p + 3, "-mnemonic")) + intel_mnemonic = 0; } else if (CONST_STRNEQ (p, "addr")) { @@ -5790,17 +5801,10 @@ static const struct dis386 float_reg[][8] = { { "fmul", { STi, ST } }, { "(bad)", { XX } }, { "(bad)", { XX } }, -#if SYSV386_COMPAT - { "fsub", { STi, ST } }, - { "fsubr", { STi, ST } }, - { "fdiv", { STi, ST } }, - { "fdivr", { STi, ST } }, -#else - { "fsubr", { STi, ST } }, - { "fsub", { STi, ST } }, - { "fdivr", { STi, ST } }, - { "fdiv", { STi, ST } }, -#endif + { "fsub!M", { STi, ST } }, + { "fsubM", { STi, ST } }, + { "fdiv!M", { STi, ST } }, + { "fdivM", { STi, ST } }, }, /* dd */ { @@ -5819,17 +5823,10 @@ static const struct dis386 float_reg[][8] = { { "fmulp", { STi, ST } }, { "(bad)", { XX } }, { FGRPde_3 }, -#if SYSV386_COMPAT - { "fsubp", { STi, ST } }, - { "fsubrp", { STi, ST } }, - { "fdivp", { STi, ST } }, - { "fdivrp", { STi, ST } }, -#else - { "fsubrp", { STi, ST } }, - { "fsubp", { STi, ST } }, - { "fdivrp", { STi, ST } }, - { "fdivp", { STi, ST } }, -#endif + { "fsub!Mp", { STi, ST } }, + { "fsubMp", { STi, ST } }, + { "fdiv!Mp", { STi, ST } }, + { "fdivMp", { STi, ST } }, }, /* df */ { @@ -5967,6 +5964,7 @@ putop (const char *template, int sizeflag) { const char *p; int alt = 0; + int cond = 1; for (p = template; *p; p++) { @@ -5975,6 +5973,9 @@ putop (const char *template, int sizeflag) default: *obufp++ = *p; break; + case '!': + cond = 0; + break; case '{': alt = 0; if (intel_syntax) @@ -6114,6 +6115,10 @@ putop (const char *template, int sizeflag) if (sizeflag & SUFFIX_ALWAYS) *obufp++ = 'l'; break; + case 'M': + if (intel_mnemonic != cond) + *obufp++ = 'r'; + break; case 'N': if ((prefixes & PREFIX_FWAIT) == 0) *obufp++ = 'n';