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Add LDM and STM instructions which are unpredictable because of their use of 

the writeback bit.
This commit is contained in:
Nick Clifton 2002-09-23 16:46:33 +00:00
parent e2f6d27741
commit 9d7f57761d
3 changed files with 14 additions and 0 deletions
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5
gas/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2002-09-23 Nick Clifton <nickc@redhat.com>
* gas/arm/armv1-bad.s: Add LDM and STM instructions which are
unpredictable because of their use of the writeback bit.
2002-09-21 Nick Clifton <nickc@redhat.com>
* gas/arm/inst.s: Fix UNPREDICATABLE use of writeback in LDM/STM

4
gas/testsuite/gas/arm/armv1-bad.l
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@ -6,3 +6,7 @@
[^:]*:8: Error: invalid constant -- `mov r0,#0x1ff'
[^:]*:9: Error: bad instruction `cmpl r0,r0'
[^:]*:10: Error: selected processor does not support `strh r0,\[r1\]'
[^:]*:11: Warning: writeback of base register is UNPREDICTABLE
[^:]*:12: Warning: writeback of base register when in register list is UNPREDICTABLE
[^:]*:13: Warning: writeback of base register is UNPREDICTABLE
[^:]*:15: Warning: if writeback register is in list, it must be the lowest reg in the list

5
gas/testsuite/gas/arm/armv1-bad.s
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@ -8,3 +8,8 @@ entry:
mov r0, #0x1ff
cmpl r0, r0
strh r0, [r1]
ldmfa r4!, {r8, r9}^
ldmfa r4!, {r4, r8, r9}
stmfa r4!, {r8, r9}^
stmdb r4!, {r4, r8, r9} @ This is OK.
stmdb r8!, {r4, r8, r9}