From 9d9972a38a4d3aa62f14559fbd5c90c2456d8a53 Mon Sep 17 00:00:00 2001 From: Andrew Cagney Date: Tue, 2 Dec 1997 07:59:52 +0000 Subject: [PATCH] For "sub", compute carry by comparing inputs. Test. --- sim/testsuite/d10v-elf/.Sanitize | 1 + sim/testsuite/d10v-elf/t-sub.s | 42 ++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) create mode 100644 sim/testsuite/d10v-elf/t-sub.s diff --git a/sim/testsuite/d10v-elf/.Sanitize b/sim/testsuite/d10v-elf/.Sanitize index 5ca3dd479a..2f3a8d8d16 100644 --- a/sim/testsuite/d10v-elf/.Sanitize +++ b/sim/testsuite/d10v-elf/.Sanitize @@ -15,6 +15,7 @@ t-msbu.s t-rachi.s t-rep.s t-mulxu.s +t-sub.s t-subi.s t-sub2w.s t-mvtac.s diff --git a/sim/testsuite/d10v-elf/t-sub.s b/sim/testsuite/d10v-elf/t-sub.s new file mode 100644 index 0000000000..26d0a3a1c9 --- /dev/null +++ b/sim/testsuite/d10v-elf/t-sub.s @@ -0,0 +1,42 @@ +.include "t-macros.i" + + start + +;; The d10v implements negated addition for subtraction + + .macro check_sub s x y r c + ;; clear carry + ldi r6,#0x8004 + mvtc r6,cr0 + ;; subtract + ldi r10,#\x + ldi r11,#\y + sub r10, r11 + ;; verify result + ldi r12, #\r + cmpeq r10, r12 + brf0t 1f + ldi r6, 1 + ldi r2, #\s + trap 15 +1: + ;; verify carry + mvfc r6, cr0 + and3 r6, r6, #1 + cmpeqi r6, #\c + brf0t 1f + ldi r6, 1 + ldi r2, #\s + trap 15 +1: + .endm + +check_sub 1 0x0000 0x0000 0x0000 1 +check_sub 2 0x0000 0x0001 0xffff 0 +check_sub 3 0x0001 0x0000 0x0001 1 +check_sub 4 0x0001 0x0001 0x0000 1 +check_sub 5 0x0000 0x8000 0x8000 0 +check_sub 6 0x8000 0x0001 0x7fff 1 +check_sub 7 0x7fff 0x7fff 0x0000 1 + + exit0