* mips-tdep.c (mips32_next_pc): Handle JALX.
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@ -1,3 +1,7 @@
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2011-04-10 Maciej W. Rozycki <macro@codesourcery.com>
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* mips-tdep.c (mips32_next_pc): Handle JALX.
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2012-04-10 Yao Qi <yao@codesourcery.com>
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2012-04-10 Yao Qi <yao@codesourcery.com>
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* Makefile.in (gnulib/Makefile): Remove duplicated dependency.
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* Makefile.in (gnulib/Makefile): Remove duplicated dependency.
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@ -1203,6 +1203,16 @@ mips32_next_pc (struct frame_info *frame, CORE_ADDR pc)
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&& (itype_rt (inst) & 2) == 0)
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&& (itype_rt (inst) & 2) == 0)
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/* BC1ANY4F, BC1ANY4T: 010001 01010 xxx0x */
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/* BC1ANY4F, BC1ANY4T: 010001 01010 xxx0x */
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pc = mips32_bc1_pc (gdbarch, frame, inst, pc + 4, 4);
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pc = mips32_bc1_pc (gdbarch, frame, inst, pc + 4, 4);
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else if (itype_op (inst) == 29)
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/* JALX: 011101 */
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/* The new PC will be alternate mode. */
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{
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unsigned long reg;
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reg = jtype_target (inst) << 2;
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/* Add 1 to indicate 16-bit mode -- invert ISA mode. */
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pc = ((pc + 4) & ~(CORE_ADDR) 0x0fffffff) + reg + 1;
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}
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else
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else
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pc += 4; /* Not a branch, next instruction is easy. */
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pc += 4; /* Not a branch, next instruction is easy. */
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}
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}
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@ -1295,14 +1305,6 @@ mips32_next_pc (struct frame_info *frame, CORE_ADDR pc)
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pc = reg + ((pc + 4) & ~(CORE_ADDR) 0x0fffffff);
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pc = reg + ((pc + 4) & ~(CORE_ADDR) 0x0fffffff);
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}
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}
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break;
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break;
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/* FIXME case JALX : */
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{
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unsigned long reg;
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reg = jtype_target (inst) << 2;
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pc = reg + ((pc + 4) & ~(CORE_ADDR) 0x0fffffff) + 1; /* yes, +1 */
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/* Add 1 to indicate 16 bit mode - Invert ISA mode */
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}
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break; /* The new PC will be alternate mode */
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case 4: /* BEQ, BEQL */
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case 4: /* BEQ, BEQL */
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equal_branch:
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equal_branch:
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if (get_frame_register_signed (frame, itype_rs (inst)) ==
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if (get_frame_register_signed (frame, itype_rs (inst)) ==
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