* config/tc-ppc.c (md_apply_fix): On COFF targets, always reread
	"value" from fx_offset.  Manually resubtract md_pcrel_from_section
	where necessary.

gas/testsuite/
	* gas/ppc/xcoff-branch-1.s, gas/ppc/xcoff-branch-1-32.d,
	gas/ppc/xcoff-branch-1-64.d: New tests.
	* gas/ppc/aix.exp: Run them.
This commit is contained in:
Richard Sandiford 2009-03-14 09:16:31 +00:00
parent 12b2cce914
commit 9f0eb2327b
7 changed files with 185 additions and 8 deletions

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@ -1,3 +1,9 @@
2009-03-14 Richard Sandiford <r.sandiford@uk.ibm.com>
* config/tc-ppc.c (md_apply_fix): On COFF targets, always reread
"value" from fx_offset. Manually resubtract md_pcrel_from_section
where necessary.
2009-03-14 Richard Sandiford <r.sandiford@uk.ibm.com>
* configure.tgt: Extend AIX 5 behavior to AIX 6 and above.

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@ -5741,18 +5741,19 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
going to use the symbol value. That means that if the reloc is
fully resolved we want to use *valP since bfd_install_relocation is
not being used.
However, if the reloc is not fully resolved we do not want to use
*valP, and must use fx_offset instead. However, if the reloc
is PC relative, we do want to use *valP since it includes the
result of md_pcrel_from. This is confusing. */
However, if the reloc is not fully resolved we do not want to
use *valP, and must use fx_offset instead. If the relocation
is PC-relative, we then need to re-apply md_pcrel_from_section
to this new relocation value. */
if (fixP->fx_addsy == (symbolS *) NULL)
fixP->fx_done = 1;
else if (fixP->fx_pcrel)
;
else
value = fixP->fx_offset;
{
value = fixP->fx_offset;
if (fixP->fx_pcrel)
value -= md_pcrel_from_section (fixP, seg);
}
#endif
if (fixP->fx_subsy != (symbolS *) NULL)

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@ -1,3 +1,9 @@
2009-03-14 Richard Sandiford <r.sandiford@uk.ibm.com>
* gas/ppc/xcoff-branch-1.s, gas/ppc/xcoff-branch-1-32.d,
gas/ppc/xcoff-branch-1-64.d: New tests.
* gas/ppc/aix.exp: Run them.
2009-03-11 Hans-Peter Nilsson <hp@axis.com>
* gas/cris/rd-bkw5.d, gas/cris/rd-bkw5.s, gas/cris/rd-bkw5b.d,

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@ -63,4 +63,6 @@ if [istarget powerpc-ibm-aix*] then {
run_dump_test "textalign-xcoff-001"
run_dump_test "textalign-xcoff-002"
run_dump_test "xcoff-branch-1-32"
run_dump_test "xcoff-branch-1-64"
}

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@ -0,0 +1,61 @@
#as: -a32
#source: xcoff-branch-1.s
#objdump: -dr
#name: XCOFF branch test 1 (32-bit)
.*
Disassembly of section \.text:
0+00 <\.foo>:
0: 48 00 00 29 bl 28 <foo2\+0x4>
4: 48 00 00 1d bl 20 <foo1\+0xc>
8: 48 00 00 0d bl 14 <foo1>
c: 48 00 00 19 bl 24 <foo2>
10: 48 00 00 1d bl 2c <\.bar>
10: R_(RBR_26|BR) .*
0+14 <foo1>:
14: 4b ff ff ed bl 0 <\.foo>
18: 48 00 00 3d bl 54 <\.frob>
18: R_(RBR_26|BR) .*
1c: 4b ff ff f5 bl 10 <\.foo\+0x10>
20: 48 00 00 15 bl 34 <\.bar\+0x8>
20: R_(RBR_26|BR) .*
0+24 <foo2>:
24: 48 00 00 41 bl 64 <\.frob\+0x10>
24: R_(RBR_26|BR) .*
28: 4e 80 00 20 br
0+2c <\.bar>:
2c: 4b ff ff e9 bl 14 <foo1>
2c: R_(RBR_26|BR) .*
30: 4b ff ff f5 bl 24 <foo2>
30: R_(RBR_26|BR) .*
34: 4b ff ff e9 bl 1c <foo1\+0x8>
34: R_(RBR_26|BR) .*
38: 4b ff ff f1 bl 28 <foo2\+0x4>
38: R_(RBR_26|BR) .*
3c: 4b ff ff c5 bl 0 <\.foo>
3c: R_(RBR_26|BR) .*
40: 4b ff ff ed bl 2c <\.bar>
44: 48 00 00 11 bl 54 <\.frob>
44: R_(RBR_26|BR) .*
48: 4b ff ff d5 bl 1c <foo1\+0x8>
48: R_(RBR_26|BR) .*
4c: 4b ff ff ed bl 38 <\.bar\+0xc>
50: 48 00 00 09 bl 58 <\.frob\+0x4>
50: R_(RBR_26|BR) .*
0+54 <\.frob>:
54: 4b ff ff ad bl 0 <\.foo>
54: R_(RBR_26|BR) .*
58: 4b ff ff d5 bl 2c <\.bar>
58: R_(RBR_26|BR) .*
5c: 4b ff ff f9 bl 54 <\.frob>
60: 4b ff ff b5 bl 14 <foo1>
60: R_(RBR_26|BR) .*
64: 4b ff ff c1 bl 24 <foo2>
64: R_(RBR_26|BR) .*

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@ -0,0 +1,61 @@
#as: -a64
#source: xcoff-branch-1.s
#objdump: -dr
#name: XCOFF branch test 1 (64-bit)
.*
Disassembly of section \.text:
0+00 <\.foo>:
0: 48 00 00 29 bl 28 <foo2\+0x4>
4: 48 00 00 1d bl 20 <foo1\+0xc>
8: 48 00 00 0d bl 14 <foo1>
c: 48 00 00 19 bl 24 <foo2>
10: 48 00 00 1d bl 2c <\.bar>
10: R_(RBR_26|BR) .*
0+14 <foo1>:
14: 4b ff ff ed bl 0 <\.foo>
18: 48 00 00 3d bl 54 <\.frob>
18: R_(RBR_26|BR) .*
1c: 4b ff ff f5 bl 10 <\.foo\+0x10>
20: 48 00 00 15 bl 34 <\.bar\+0x8>
20: R_(RBR_26|BR) .*
0+24 <foo2>:
24: 48 00 00 41 bl 64 <\.frob\+0x10>
24: R_(RBR_26|BR) .*
28: 4e 80 00 20 blr
0+2c <\.bar>:
2c: 4b ff ff e9 bl 14 <foo1>
2c: R_(RBR_26|BR) .*
30: 4b ff ff f5 bl 24 <foo2>
30: R_(RBR_26|BR) .*
34: 4b ff ff e9 bl 1c <foo1\+0x8>
34: R_(RBR_26|BR) .*
38: 4b ff ff f1 bl 28 <foo2\+0x4>
38: R_(RBR_26|BR) .*
3c: 4b ff ff c5 bl 0 <\.foo>
3c: R_(RBR_26|BR) .*
40: 4b ff ff ed bl 2c <\.bar>
44: 48 00 00 11 bl 54 <\.frob>
44: R_(RBR_26|BR) .*
48: 4b ff ff d5 bl 1c <foo1\+0x8>
48: R_(RBR_26|BR) .*
4c: 4b ff ff ed bl 38 <\.bar\+0xc>
50: 48 00 00 09 bl 58 <\.frob\+0x4>
50: R_(RBR_26|BR) .*
0+54 <\.frob>:
54: 4b ff ff ad bl 0 <\.foo>
54: R_(RBR_26|BR) .*
58: 4b ff ff d5 bl 2c <\.bar>
58: R_(RBR_26|BR) .*
5c: 4b ff ff f9 bl 54 <\.frob>
60: 4b ff ff b5 bl 14 <foo1>
60: R_(RBR_26|BR) .*
64: 4b ff ff c1 bl 24 <foo2>
64: R_(RBR_26|BR) .*

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@ -0,0 +1,40 @@
.globl .foo
.globl foo1
.globl foo2
.globl .bar
.globl .frob
.csect .foo[PR]
.foo:
bl foo2 + 0x4
bl foo1 + 0xc
bl foo1
bl foo2
bl .bar
foo1:
bl .foo
bl .frob
bl .foo + 0x10
bl .bar + 0x8
foo2:
bl .frob + 0x10
blr
.csect .bar[PR]
.bar: bl foo1
bl foo2
bl foo1 + 0x8
bl foo2 + 0x4
bl .foo
bl .bar
bl .frob
bl .foo + 0x1c
bl .bar + 0xc
bl .frob + 0x4
.csect .frob[PR]
.frob: bl .foo
bl .bar
bl .frob
bl foo1
bl foo2