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Format #instructions with commas

This commit is contained in:
Michael Meissner 1995-10-13 01:10:06 +00:00
parent 148070cca4
commit 9f5912cb98
3 changed files with 51 additions and 11 deletions
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7
sim/ppc/ChangeLog
View File

@ -1,5 +1,12 @@
Thu Oct 12 11:35:53 1995 Michael Meissner <meissner@tiktok.cygnus.com> Thu Oct 12 11:35:53 1995 Michael Meissner <meissner@tiktok.cygnus.com>
* Makefile.in (psim.o): Now that inlines are turned on, make
psim.o depend on all sources.
* cpu.c (cpu_add_commas): New function to format a long with
commas.
(cpu_print_info): Use it to print number_of_insns.
* ppc-endian.c (SWAP_n): New macros to speed up byte swapping for * ppc-endian.c (SWAP_n): New macros to speed up byte swapping for
2, 4, and 8 bytes. 2, 4, and 8 bytes.
(ENDIAN_N): If both target and host byte orders are known, don't (ENDIAN_N): If both target and host byte orders are known, don't

4
sim/ppc/Makefile.in
View File

@ -197,7 +197,9 @@ $(TARGETLIB): tmp-gencode $(LIB_OBJ) $(GDB_OBJ)
$(AR) $(AR_FLAGS) $(TARGETLIB) $(LIB_OBJ) $(GDB_OBJ) $(AR) $(AR_FLAGS) $(TARGETLIB) $(LIB_OBJ) $(GDB_OBJ)
$(RANLIB) $(TARGETLIB) $(RANLIB) $(TARGETLIB)
psim.o: psim.c psim.h $(CPU_H) $(IDECODE_H) $(INLINE) # Given that inlines are turned on now, rebuild psim whenever
# anything changes.
psim.o: psim.c psim.h $(CPU_H) $(IDECODE_H) $(INLINE) $(LIB_SRC)
bits.o: bits.c bits.h bits.o: bits.c bits.h

51
sim/ppc/cpu.c
View File

@ -206,8 +206,16 @@ cpu_halt(cpu *processor,
stop_reason reason, stop_reason reason,
int signal) int signal)
{ {
processor->program_counter = cia; if (processor == NULL) {
psim_halt(processor->system, processor->cpu_nr, cia, reason, signal); error("cpu_halt() processor=NULL, cia=0x%x, reason=%d, signal=%d\n",
cia,
reason,
signal);
}
else {
processor->program_counter = cia;
psim_halt(processor->system, processor->cpu_nr, cia, reason, signal);
}
} }
@ -235,12 +243,6 @@ cpu_data_map(cpu *processor)
return processor->data_map; return processor->data_map;
} }
INLINE_CPU core *
cpu_core(cpu *processor)
{
return processor->physical;
}
/* reservation access */ /* reservation access */
@ -268,6 +270,14 @@ cpu_synchronize_context(cpu *processor)
for (i = 0; i < IDECODE_CACHE_SIZE; i++) for (i = 0; i < IDECODE_CACHE_SIZE; i++)
processor->icache[i].address = MASK(0,63); processor->icache[i].address = MASK(0,63);
#endif #endif
/* don't allow the processor to change endian modes */
if ((cpu_registers(processor)->msr & msr_little_endian_mode)
&& CURRENT_TARGET_BYTE_ORDER != LITTLE_ENDIAN) {
error("vm_synchronize_context() - unsuported change of byte order\n");
}
/* update virtual memory */
vm_synchronize_context(processor->virtual, vm_synchronize_context(processor->virtual,
processor->regs.spr, processor->regs.spr,
processor->regs.sr, processor->regs.sr,
@ -289,12 +299,33 @@ cpu_get_number_of_insns(cpu *processor)
return processor->number_of_insns; return processor->number_of_insns;
} }
static INLINE_CPU char *
cpu_add_commas(char *endbuf, long value)
{
int comma = 3;
*--endbuf = '\0';
do {
if (comma-- == 0)
{
*--endbuf = ',';
comma = 2;
}
*--endbuf = (value % 10) + '0';
} while ((value /= 10) != 0);
return endbuf;
}
INLINE_CPU void INLINE_CPU void
cpu_print_info(cpu *processor, int verbose) cpu_print_info(cpu *processor, int verbose)
{ {
printf_filtered("CPU #%d executed %ld instructions.\n", char buffer[20];
printf_filtered("CPU #%d executed %s instructions.\n",
processor->cpu_nr+1, processor->cpu_nr+1,
processor->number_of_insns); cpu_add_commas(buffer + sizeof(buffer), processor->number_of_insns));
} }
#endif /* _CPU_C_ */ #endif /* _CPU_C_ */