gas/testsuite/

* gas/i386/rep-suffix.s: Add 'rep nop' case.
	* gas/i386/x86-64-rep-suffix.s: Likewise.
	* gas/i386/rep-suffix.d: Updated.
	* gas/i386/x86-64-rep-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.

opcodes/
	* i386-opc.tbl: Add RepPrefixOk to nop.
	* i386-tbl.h: Regenerate.
This commit is contained in:
Roland McGrath 2012-07-02 18:12:28 +00:00
parent ff4a45007a
commit 9fa0f14a97
9 changed files with 25 additions and 5 deletions

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@ -1,3 +1,11 @@
2012-07-02 Roland McGrath <mcgrathr@google.com>
* gas/i386/rep-suffix.s: Add 'rep nop' case.
* gas/i386/x86-64-rep-suffix.s: Likewise.
* gas/i386/rep-suffix.d: Updated.
* gas/i386/x86-64-rep-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
2012-07-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Don't run rep-bsf nor rep-ret.

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@ -17,5 +17,6 @@ Disassembly of section .text:
11: f3 48 ab[ ]+rep stosq %rax,%es:\(%rdi\)
14: f3 0f bc c1[ ]+tzcntl %ecx,%eax
18: f3 0f bd c1[ ]+lzcntl %ecx,%eax
1c: f3 c3[ ]+repz retq
1c: f3 c3[ ]+repz retq\s*
1e: f3 90[ ]+pause\s*
#pass

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@ -14,5 +14,6 @@ Disassembly of section .text:
c: f3 ab[ ]+rep stosl %eax,%es:\(%edi\)
e: f3 0f bc c1[ ]+tzcntl %ecx,%eax
12: f3 0f bd c1[ ]+lzcntl %ecx,%eax
16: f3 c3[ ]+repz retl
16: f3 c3[ ]+repz retl\s*
18: f3 90[ ]+pause\s*
#pass

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@ -12,3 +12,5 @@ _start:
rep bsr %ecx, %eax
rep ret
rep nop

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@ -16,5 +16,6 @@ Disassembly of section .text:
11: f3 48 ab[ ]+rep stosq %rax,%es:\(%rdi\)
14: f3 0f bc c1[ ]+tzcntl %ecx,%eax
18: f3 0f bd c1[ ]+lzcntl %ecx,%eax
1c: f3 c3[ ]+repz retq
1c: f3 c3[ ]+repz retq\s*
1e: f3 90[ ]+pause\s*
#pass

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@ -14,3 +14,5 @@ _start:
rep bsr %ecx, %eax
rep ret
rep nop

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@ -1,3 +1,8 @@
2012-07-02 Roland McGrath <mcgrathr@google.com>
* i386-opc.tbl: Add RepPrefixOk to nop.
* i386-tbl.h: Regenerate.
2012-06-28 Nick Clifton <nickc@redhat.com>
* po/vi.po: Updated Vietnamese translation.

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@ -504,7 +504,7 @@ nop, 1, 0xf1f, 0x0, 2, CpuNop, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg
// nop is actually "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
// 32bit mode and "xchg %rax,%rax" in 64bit mode.
nop, 0, 0x90, None, 1, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
nop, 0, 0x90, None, 1, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|RepPrefixOk, { 0 }
// Protection control.
arpl, 2, 0x63, None, 1, Cpu286|CpuNo64, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16, Reg16|Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32 }

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@ -4142,7 +4142,7 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1,
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,