2000-08-11 Andreas Schwab <schwab@suse.de>
* doc/c-i860.texi (Opcodes for i860): Remove braces from @item argument.
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2000-08-11 Andreas Schwab <schwab@suse.de>
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* doc/c-i860.texi (Opcodes for i860): Remove braces from @item
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argument.
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2000-08-11 Kazu Hirata <kazu@hxi.com>
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2000-08-11 Kazu Hirata <kazu@hxi.com>
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* expr.c: Fix formatting.
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* expr.c: Fix formatting.
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@ -107,7 +107,7 @@ a very undesirable feature that should be avoided -- in particular, when
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they result in an expansion to multiple actual i860 instructions. Below
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they result in an expansion to multiple actual i860 instructions. Below
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are the pseudo-instructions that result in expansions.
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are the pseudo-instructions that result in expansions.
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@itemize @bullet
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@itemize @bullet
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@item {Load large immediate into general register:}
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@item Load large immediate into general register:
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The pseudo-instruction @code{mov imm,%rn} (where the immediate does
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The pseudo-instruction @code{mov imm,%rn} (where the immediate does
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not fit within a signed 16-bit field) will be expanded into:
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not fit within a signed 16-bit field) will be expanded into:
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@ -115,7 +115,7 @@ not fit within a signed 16-bit field) will be expanded into:
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orh large_imm@@h,%r0,%rn
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orh large_imm@@h,%r0,%rn
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or large_imm@@l,%rn,%rn
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or large_imm@@l,%rn,%rn
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@end smallexample
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@end smallexample
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@item {Load/store with relocatable address expression:}
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@item Load/store with relocatable address expression:
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For example, the pseudo-instruction @code{ld.b addr,%rn}
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For example, the pseudo-instruction @code{ld.b addr,%rn}
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will be expanded into:
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will be expanded into:
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@ -125,7 +125,8 @@ ld.l addr_exp@@l(%r31),%rn
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@end smallexample
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@end smallexample
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The analogous expansions apply to @code{ld.x, st.x, fld.x, pfld.x, fst.x}, and @code{pst.x} as well.
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The analogous expansions apply to @code{ld.x, st.x, fld.x, pfld.x, fst.x}, and @code{pst.x} as well.
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@item {Signed large immediate with add/subtract:}
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@item Signed large immediate with add/subtract:
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If any of the arithmetic operations @code{adds, addu, subs, subu} are used
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If any of the arithmetic operations @code{adds, addu, subs, subu} are used
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with an immediate larger than 16-bits (signed), then they will be expanded.
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with an immediate larger than 16-bits (signed), then they will be expanded.
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For instance, the pseudo-instruction @code{adds large_imm,%rx,%rn} expands to:
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For instance, the pseudo-instruction @code{adds large_imm,%rx,%rn} expands to:
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@ -134,7 +135,8 @@ orh large_imm@@h,%r0,%r31
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or large_imm@@l,%r31,%r31
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or large_imm@@l,%r31,%r31
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adds %r31,%rx,%rn
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adds %r31,%rx,%rn
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@end smallexample
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@end smallexample
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@item {Unsigned large immediate with logical operations:}
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@item Unsigned large immediate with logical operations:
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Logical operations (@code{or, andnot, or, xor}) also result in expansions.
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Logical operations (@code{or, andnot, or, xor}) also result in expansions.
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The pseudo-instruction @code{or large_imm,%rx,%rn} results in:
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The pseudo-instruction @code{or large_imm,%rx,%rn} results in:
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@smallexample
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@smallexample
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