* config/m68k-parse.y: New file: bison grammar for m68k operands,

including support for Motorola syntax.
	* config/m68k-parse.h: New file; definitions shared between
	m68k-parse.y and tc-m68k.c.
	* config/tc-m68k.c: Include m68k-parse.h.
	(enum operand_type): Move to m68k-parse.h, where it is named
	m68k_operand_type.  Rename all uses.  Rearrange somewhat.  Add
	FPREG.  Rename AOFF to DISP.  Rename AINDX to BASE.  Rename APODX
	to POST.  Rename APRDX to PRE.  Remove AMIND.  Rename MSCR to
	CONTROL.  Remove DINDR.
	(struct m68k_exp): Move to m68k-parse.h.  Remove e_beg, e_end and
	e_seg fields.  Rename e_exp to exp.  Rename e_siz to size, and
	change type to enum m68k_size.  Change all uses.
	(enum _register): Move to m68k-parse.h, where it is named
	m68k_register.  Rename all uses.  Add ZDATA0-7 and ZADDR0-7.
	(struct m68k_op): Move to m68k-parse.h.  Change all fields.
	(seg): Don't define.
	(add_exp): Remove.
	(FAIL, OK): Remove.
	(m68k_reg_parse): Move to m68k-parse.y, and rewrite.
	(SKIP_WHITE, SKIP_W): Remove.
	(try_moto_index, try_index): Remove.
	(m68k_ip_op): Move to m68k-parse.y, and rewrite to use grammar.
	(main): Remove obsolete test function.
	(m68k_ip): Extensive changes to use new grammar.
	(get_regs): Remove.
	(crack_operand): m68k_ip_op now returns 0 on success.
	(init_table): Add ssp, zd0-7 and za0-7.
	(md_assemble): Make er const.  Correct loop over operands when
	looking for error message.
	(md_begin): Set alt_notend_table for '(' and '@'.
	(get_num): Expression is already parsed.  Don't set seg.
	* configure.in: If cpu_type is m68k, put m68k-parse.o in
	extra-objects.
	* configure: Rebuild.
	* Makefile.in (DISTSTUFF): Add m68k-parse.c.
	(BISON): Use ../bison/bison if it exists.
	(BISONFLAGS): Define as empty.
	(TARG_CPU_DEP_m68k): Depend upon $(srcdir)/config/m68k-parse.h.
	(m68k-parse.c, m68k-parse.o): New targets.
This commit is contained in:
Ian Lance Taylor 1995-08-08 02:36:10 +00:00
parent 764efb58e9
commit a1c7c0f3ac
8 changed files with 1954 additions and 1733 deletions

View File

@ -1,3 +1,46 @@
Mon Aug 7 17:18:10 1995 Ian Lance Taylor <ian@cygnus.com>
* config/m68k-parse.y: New file: bison grammar for m68k operands,
including support for Motorola syntax.
* config/m68k-parse.h: New file; definitions shared between
m68k-parse.y and tc-m68k.c.
* config/tc-m68k.c: Include m68k-parse.h.
(enum operand_type): Move to m68k-parse.h, where it is named
m68k_operand_type. Rename all uses. Rearrange somewhat. Add
FPREG. Rename AOFF to DISP. Rename AINDX to BASE. Rename APODX
to POST. Rename APRDX to PRE. Remove AMIND. Rename MSCR to
CONTROL. Remove DINDR.
(struct m68k_exp): Move to m68k-parse.h. Remove e_beg, e_end and
e_seg fields. Rename e_exp to exp. Rename e_siz to size, and
change type to enum m68k_size. Change all uses.
(enum _register): Move to m68k-parse.h, where it is named
m68k_register. Rename all uses. Add ZDATA0-7 and ZADDR0-7.
(struct m68k_op): Move to m68k-parse.h. Change all fields.
(seg): Don't define.
(add_exp): Remove.
(FAIL, OK): Remove.
(m68k_reg_parse): Move to m68k-parse.y, and rewrite.
(SKIP_WHITE, SKIP_W): Remove.
(try_moto_index, try_index): Remove.
(m68k_ip_op): Move to m68k-parse.y, and rewrite to use grammar.
(main): Remove obsolete test function.
(m68k_ip): Extensive changes to use new grammar.
(get_regs): Remove.
(crack_operand): m68k_ip_op now returns 0 on success.
(init_table): Add ssp, zd0-7 and za0-7.
(md_assemble): Make er const. Correct loop over operands when
looking for error message.
(md_begin): Set alt_notend_table for '(' and '@'.
(get_num): Expression is already parsed. Don't set seg.
* configure.in: If cpu_type is m68k, put m68k-parse.o in
extra-objects.
* configure: Rebuild.
* Makefile.in (DISTSTUFF): Add m68k-parse.c.
(BISON): Use ../bison/bison if it exists.
(BISONFLAGS): Define as empty.
(TARG_CPU_DEP_m68k): Depend upon $(srcdir)/config/m68k-parse.h.
(m68k-parse.c, m68k-parse.o): New targets.
start-sanitize-sh3e
Mon Aug 7 02:54:20 1995 Jeff Law (law@snake.cs.utah.edu)

View File

@ -62,11 +62,12 @@ INSTALL_DATA = $(INSTALL)
INSTALL_XFORM = $(INSTALL) -t='-e $(program_transform_name)'
INSTALL_XFORM1= $(INSTALL_XFORM) -b=.1
DISTSTUFF= make-gas.com
DISTSTUFF= make-gas.com m68k-parse.c
AR = ar
AR_FLAGS = qv
BISON = bison -y
BISON = `if [ -f ../bison/bison ] ; then echo ../bison/bison -y -L../bison/bison ; else echo bison -y ; fi`
BISONFLAGS =
MAKEINFO = makeinfo
TEXI2DVI = texi2dvi
RANLIB = ranlib
@ -289,7 +290,8 @@ TARG_CPU_DEP_hppa =
TARG_CPU_DEP_i386 = $(srcdir)/../include/opcode/i386.h
TARG_CPU_DEP_i860 =
TARG_CPU_DEP_i960 =
TARG_CPU_DEP_m68k = $(srcdir)/../include/opcode/m68k.h
TARG_CPU_DEP_m68k = $(srcdir)/../include/opcode/m68k.h \
$(srcdir)/config/m68k-parse.h
TARG_CPU_DEP_m88k = $(srcdir)/config/m88k-opcode.h
TARG_CPU_DEP_mips = $(srcdir)/../include/opcode/mips.h
TARG_CPU_DEP_ns32k =
@ -347,6 +349,13 @@ e-mipself.o : $(srcdir)/config/e-mipself.c
e-mipsecoff.o : $(srcdir)/config/e-mipsecoff.c
$(CC) -c $(ALL_CFLAGS) $(CPPFLAGS) $(INCLUDES) $(srcdir)/config/e-mipsecoff.c
# The m68k operand parser.
m68k-parse.c: $(srcdir)/config/m68k-parse.y
$(BISON) $(BISONFLAGS) $(srcdir)/config/m68k-parse.y
mv -f y.tab.c m68k-parse.c
m68k-parse.o: m68k-parse.c $(srcdir)/config/m68k-parse.y
# Remake the info files.
doc: $(srcdir)/as.info
@ -492,7 +501,7 @@ de-stage3: force
force:
Makefile: $(srcdir)/Makefile.in $(host_makefile_frag) $(target_makefile_frag) \
$(srcdir)/configure.in config.status
$(srcdir)/configure.in config.status conf.in
$(SHELL) ./config.status
.gdbinit: $(srcdir)/gdbinit.in config.status
$(SHELL) ./config.status

View File

@ -50,6 +50,8 @@ go32.cfg
e-mipsecoff.c
e-mipself.c
i386coff.mt
m68k-parse.h
m68k-parse.y
m68kcoff.mt
m88k-opcode.h
m88kcoff.mt

279
gas/config/m68k-parse.h Normal file
View File

@ -0,0 +1,279 @@
/* m68k-parse.h -- header file for m68k assembler
Copyright (C) 1987, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
#ifndef M68K_PARSE_H
#define M68K_PARSE_H
/* This header file defines things which are shared between the
operand parser in m68k.y and the m68k assembler proper in
tc-m68k.c. */
/* The various m68k registers. */
/* DATA and ADDR have to be contiguous, so that reg-DATA gives
0-7==data reg, 8-15==addr reg for operands that take both types.
We don't use forms like "ADDR0 = ADDR" here because this file is
likely to be used on an Apollo, and the broken Apollo compiler
gives an `undefined variable' error if we do that, according to
troy@cbme.unsw.edu.au. */
#define DATA DATA0
#define ADDR ADDR0
#define SP ADDR7
#define COPNUM COP0
#define BAD BAD0
#define BAC BAC0
enum m68k_register
{
DATA0 = 1, /* 1- 8 == data registers 0-7 */
DATA1,
DATA2,
DATA3,
DATA4,
DATA5,
DATA6,
DATA7,
ADDR0,
ADDR1,
ADDR2,
ADDR3,
ADDR4,
ADDR5,
ADDR6,
ADDR7,
FP0, /* Eight FP registers */
FP1,
FP2,
FP3,
FP4,
FP5,
FP6,
FP7,
/* Note that COP0==processor #1 -- COP0+7==#8, which stores as 000 */
/* I think. . . */
COP0, /* Co-processor #1-#8 */
COP1,
COP2,
COP3,
COP4,
COP5,
COP6,
COP7,
PC, /* Program counter */
ZPC, /* Hack for Program space, but 0 addressing */
SR, /* Status Reg */
CCR, /* Condition code Reg */
/* These have to be grouped together for the movec instruction to work. */
USP, /* User Stack Pointer */
ISP, /* Interrupt stack pointer */
SFC,
DFC,
CACR,
VBR,
CAAR,
MSP,
ITT0,
ITT1,
DTT0,
DTT1,
MMUSR,
TC,
SRP,
URP,
BUSCR, /* 68060 added these */
PCR,
#define last_movec_reg PCR
/* end of movec ordering constraints */
FPI,
FPS,
FPC,
DRP, /* 68851 or 68030 MMU regs */
CRP,
CAL,
VAL,
SCC,
AC,
BAD0,
BAD1,
BAD2,
BAD3,
BAD4,
BAD5,
BAD6,
BAD7,
BAC0,
BAC1,
BAC2,
BAC3,
BAC4,
BAC5,
BAC6,
BAC7,
PSR, /* aka MMUSR on 68030 (but not MMUSR on 68040)
and ACUSR on 68ec030 */
PCSR,
IC, /* instruction cache token */
DC, /* data cache token */
NC, /* no cache token */
BC, /* both caches token */
TT0, /* 68030 access control unit regs */
TT1,
ZDATA0, /* suppressed data registers. */
ZDATA1,
ZDATA2,
ZDATA3,
ZDATA4,
ZDATA5,
ZDATA6,
ZDATA7,
ZADDR0, /* suppressed address registers. */
ZADDR1,
ZADDR2,
ZADDR3,
ZADDR4,
ZADDR5,
ZADDR6,
ZADDR7,
};
/* Size information. */
enum m68k_size
{
/* Unspecified. */
SIZE_UNSPEC,
/* Byte. */
SIZE_BYTE,
/* Word (2 bytes). */
SIZE_WORD,
/* Longword (4 bytes). */
SIZE_LONG
};
/* The structure used to hold information about an index register. */
struct m68k_indexreg
{
/* The index register itself. */
enum m68k_register reg;
/* The size to use. */
enum m68k_size size;
/* The value to scale by. */
int scale;
};
/* The structure used to hold information about an expression. */
struct m68k_exp
{
/* The size to use. */
enum m68k_size size;
/* The expression itself. */
expressionS exp;
};
/* See whether an expression is a signed eight bit value. */
#define expr8(ex) \
((ex)->exp.X_op == O_constant \
&& (ex)->exp.X_add_number >= -0x80 \
&& (ex)->exp.X_add_number < 0x80)
/* See whether an expression is a signed sixteen bit value. */
#define expr16(ex) \
((ex)->exp.X_op == O_constant \
&& (ex)->exp.X_add_number >= -0x8000 \
&& (ex)->exp.X_add_number < 0x8000)
/* The operand modes. */
enum m68k_operand_type
{
IMMED = 1,
ABSL,
DREG,
AREG,
FPREG,
CONTROL,
AINDR,
AINC,
ADEC,
DISP,
BASE,
POST,
PRE,
REGLST
};
/* The structure used to hold a parsed operand. */
struct m68k_op
{
/* The type of operand. */
enum m68k_operand_type mode;
/* The main register. */
enum m68k_register reg;
/* The register mask for mode REGLST. */
unsigned long mask;
/* An error message. */
const char *error;
/* The index register. */
struct m68k_indexreg index;
/* The displacement. */
struct m68k_exp disp;
/* The outer displacement. */
struct m68k_exp odisp;
};
#endif /* ! defined (M68K_PARSE_H) */
/* The parsing function. */
extern int m68k_ip_op PARAMS ((char *, struct m68k_op *));
/* Whether register prefixes are optional. */
extern int flag_reg_prefix_optional;

959
gas/config/m68k-parse.y Normal file
View File

@ -0,0 +1,959 @@
/* m68k.y -- bison grammar for m68k operand parsing
Copyright (C) 1995 Free Software Foundation, Inc.
Written by Ken Raeburn and Ian Lance Taylor, Cygnus Support
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
/* This file holds a bison grammar to parse m68k operands. The m68k
has a complicated operand syntax, and gas supports two main
variations of it. Using a grammar is probably overkill, but at
least it makes clear exactly what we do support. */
%{
#include "as.h"
#include "tc-m68k.h"
#include "m68k-parse.h"
/* Remap normal yacc parser interface names (yyparse, yylex, yyerror,
etc), as well as gratuitiously global symbol names If other parser
generators (bison, byacc, etc) produce additional global names that
conflict at link time, then those parser generators need to be
fixed instead of adding those names to this list. */
#define yymaxdepth m68k_maxdepth
#define yyparse m68k_parse
#define yylex m68k_lex
#define yyerror m68k_error
#define yylval m68k_lval
#define yychar m68k_char
#define yydebug m68k_debug
#define yypact m68k_pact
#define yyr1 m68k_r1
#define yyr2 m68k_r2
#define yydef m68k_def
#define yychk m68k_chk
#define yypgo m68k_pgo
#define yyact m68k_act
#define yyexca m68k_exca
#define yyerrflag m68k_errflag
#define yynerrs m68k_nerrs
#define yyps m68k_ps
#define yypv m68k_pv
#define yys m68k_s
#define yy_yys m68k_yys
#define yystate m68k_state
#define yytmp m68k_tmp
#define yyv m68k_v
#define yy_yyv m68k_yyv
#define yyval m68k_val
#define yylloc m68k_lloc
#define yyreds m68k_reds /* With YYDEBUG defined */
#define yytoks m68k_toks /* With YYDEBUG defined */
#define yylhs m68k_yylhs
#define yylen m68k_yylen
#define yydefred m68k_yydefred
#define yydgoto m68k_yydgoto
#define yysindex m68k_yysindex
#define yyrindex m68k_yyrindex
#define yygindex m68k_yygindex
#define yytable m68k_yytable
#define yycheck m68k_yycheck
#ifndef YYDEBUG
#define YYDEBUG 1
#endif
/* Internal functions. */
static enum m68k_register m68k_reg_parse PARAMS ((char **));
static int yylex PARAMS (());
static void yyerror PARAMS ((const char *));
/* The parser sets fields pointed to by this global variable. */
static struct m68k_op *op;
%}
%union
{
struct m68k_indexreg indexreg;
enum m68k_register reg;
struct m68k_exp exp;
unsigned long mask;
int onereg;
}
%token <reg> DR AR FPR FPCR LPC ZAR ZDR LZPC CREG
%token <indexreg> INDEXREG
%token <exp> EXPR
%type <indexreg> zireg zdireg
%type <reg> zadr zdr apc zapc zpc optzapc optczapc
%type <exp> optcexpr optexprc
%type <mask> reglist ireglist reglistpair
%type <onereg> reglistreg
%%
/* An operand. */
operand:
generic_operand
| motorola_operand
| mit_operand
;
/* A generic operand. */
generic_operand:
DR
{
op->mode = DREG;
op->reg = $1;
}
| AR
{
op->mode = AREG;
op->reg = $1;
}
| FPR
{
op->mode = FPREG;
op->reg = $1;
}
| FPCR
{
op->mode = CONTROL;
op->reg = $1;
}
| CREG
{
op->mode = CONTROL;
op->reg = $1;
}
| EXPR
{
op->mode = ABSL;
op->disp = $1;
}
| '#' EXPR
{
op->mode = IMMED;
op->disp = $2;
}
| '&' EXPR
{
op->mode = IMMED;
op->disp = $2;
}
| reglist
{
op->mode = REGLST;
op->mask = $1;
}
;
/* An operand in Motorola syntax. This includes MRI syntax as well,
which may or may not be different in that it permits commutativity
of index and base registers, and permits an offset expression to
appear inside or outside of the parentheses. */
motorola_operand:
'(' AR ')'
{
op->mode = AINDR;
op->reg = $2;
}
| '(' AR ')' '+'
{
op->mode = AINC;
op->reg = $2;
}
| '-' '(' AR ')'
{
op->mode = ADEC;
op->reg = $3;
}
| '(' EXPR ',' zapc ')'
{
op->reg = $4;
op->disp = $2;
if (($4 >= ZADDR0 && $4 <= ZADDR7)
|| $4 == ZPC)
op->mode = BASE;
else
op->mode = DISP;
}
| EXPR '(' zapc ')'
{
op->reg = $3;
op->disp = $1;
if (($3 >= ZADDR0 && $3 <= ZADDR7)
|| $3 == ZPC)
op->mode = BASE;
else
op->mode = DISP;
}
| '(' ZAR ')'
{
op->mode = BASE;
op->reg = $2;
}
| '(' zpc ')'
{
op->mode = BASE;
op->reg = $2;
}
| '(' EXPR ',' zapc ',' zireg ')'
{
op->mode = BASE;
op->reg = $4;
op->disp = $2;
op->index = $6;
}
| '(' EXPR ',' zapc ',' zpc ')'
{
if ($4 == PC || $4 == ZPC)
yyerror ("syntax error");
op->mode = BASE;
op->reg = $6;
op->disp = $2;
op->index.reg = $4;
op->index.size = SIZE_UNSPEC;
op->index.scale = 1;
}
| '(' EXPR ',' zdireg optczapc ')'
{
op->mode = BASE;
op->reg = $5;
op->disp = $2;
op->index = $4;
}
| EXPR '(' zapc ',' zireg ')'
{
op->mode = BASE;
op->reg = $3;
op->disp = $1;
op->index = $5;
}
| '(' zapc ',' zireg ')'
{
op->mode = BASE;
op->reg = $2;
op->index = $4;
}
| EXPR '(' zapc ',' zpc ')'
{
if ($3 == PC || $3 == ZPC)
yyerror ("syntax error");
op->mode = BASE;
op->reg = $5;
op->disp = $1;
op->index.reg = $3;
op->index.size = SIZE_UNSPEC;
op->index.scale = 1;
}
| '(' zapc ',' zpc ')'
{
if ($2 == PC || $2 == ZPC)
yyerror ("syntax error");
op->mode = BASE;
op->reg = $4;
op->index.reg = $2;
op->index.size = SIZE_UNSPEC;
op->index.scale = 1;
}
| EXPR '(' zdireg optczapc ')'
{
op->mode = BASE;
op->reg = $4;
op->disp = $1;
op->index = $3;
}
| '(' zdireg optczapc ')'
{
op->mode = BASE;
op->reg = $3;
op->index = $2;
}
| '(' '[' EXPR optczapc ']' ',' zireg optcexpr ')'
{
op->mode = POST;
op->reg = $4;
op->disp = $3;
op->index = $7;
op->odisp = $8;
}
| '(' '[' EXPR optczapc ']' optcexpr ')'
{
op->mode = POST;
op->reg = $4;
op->disp = $3;
op->odisp = $6;
}
| '(' '[' zapc ']' ',' zireg optcexpr ')'
{
op->mode = POST;
op->reg = $3;
op->index = $6;
op->odisp = $7;
}
| '(' '[' zapc ']' optcexpr ')'
{
op->mode = POST;
op->reg = $3;
op->odisp = $5;
}
| '(' '[' EXPR ',' zapc ',' zireg ']' optcexpr ')'
{
op->mode = PRE;
op->reg = $5;
op->disp = $3;
op->index = $7;
op->odisp = $9;
}
| '(' '[' zapc ',' zireg ']' optcexpr ')'
{
op->mode = PRE;
op->reg = $3;
op->index = $5;
op->odisp = $7;
}
| '(' '[' EXPR ',' zapc ',' zpc ']' optcexpr ')'
{
if ($5 == PC || $5 == ZPC)
yyerror ("syntax error");
op->mode = PRE;
op->reg = $7;
op->disp = $3;
op->index.reg = $5;
op->index.size = SIZE_UNSPEC;
op->index.scale = 1;
op->odisp = $9;
}
| '(' '[' zapc ',' zpc ']' optcexpr ')'
{
if ($3 == PC || $3 == ZPC)
yyerror ("syntax error");
op->mode = PRE;
op->reg = $5;
op->index.reg = $3;
op->index.size = SIZE_UNSPEC;
op->index.scale = 1;
op->odisp = $7;
}
| '(' '[' optexprc zdireg optczapc ']' optcexpr ')'
{
op->mode = PRE;
op->reg = $5;
op->disp = $3;
op->index = $4;
op->odisp = $7;
}
;
/* An operand in MIT syntax. */
mit_operand:
optzapc '@'
{
/* We use optzapc to avoid a shift/reduce conflict. */
if ($1 < ADDR0 || $1 > ADDR7)
yyerror ("syntax error");
op->mode = AINDR;
op->reg = $1;
}
| optzapc '@' '+'
{
/* We use optzapc to avoid a shift/reduce conflict. */
if ($1 < ADDR0 || $1 > ADDR7)
yyerror ("syntax error");
op->mode = AINC;
op->reg = $1;
}
| optzapc '@' '-'
{
/* We use optzapc to avoid a shift/reduce conflict. */
if ($1 < ADDR0 || $1 > ADDR7)
yyerror ("syntax error");
op->mode = ADEC;
op->reg = $1;
}
| optzapc '@' '(' EXPR ')'
{
op->reg = $1;
op->disp = $4;
if (($1 >= ZADDR0 && $1 <= ZADDR7)
|| $1 == ZPC)
op->mode = BASE;
else
op->mode = DISP;
}
| optzapc '@' '(' optexprc zireg ')'
{
op->mode = BASE;
op->reg = $1;
op->disp = $4;
op->index = $5;
}
| optzapc '@' '(' EXPR ')' '@' '(' optexprc zireg ')'
{
op->mode = POST;
op->reg = $1;
op->disp = $4;
op->index = $9;
op->odisp = $8;
}
| optzapc '@' '(' EXPR ')' '@' '(' EXPR ')'
{
op->mode = POST;
op->reg = $1;
op->disp = $4;
op->odisp = $8;
}
| optzapc '@' '(' optexprc zireg ')' '@' '(' EXPR ')'
{
op->mode = PRE;
op->reg = $1;
op->disp = $4;
op->index = $5;
op->odisp = $9;
}
;
/* An index register, possibly suppressed, which need not have a size
or scale. */
zireg:
INDEXREG
| zadr
{
$$.reg = $1;
$$.size = SIZE_UNSPEC;
$$.scale = 1;
}
;
/* A register which may be an index register, but which may not be an
address register. This nonterminal is used to avoid ambiguity when
trying to parse something like (0,d5,a6) as compared to (0,a6,d5). */
zdireg:
INDEXREG
| zdr
{
$$.reg = $1;
$$.size = SIZE_UNSPEC;
$$.scale = 1;
}
;
/* An address or data register, or a suppressed address or data
register. */
zadr:
zdr
| AR
| ZAR
;
/* A data register which may be suppressed. */
zdr:
DR
| ZDR
;
/* Either an address register or the PC. */
apc:
AR
| LPC
;
/* Either an address register, or the PC, or a suppressed address
register, or a suppressed PC. */
zapc:
apc
| LZPC
| ZAR
;
/* An optional zapc. */
optzapc:
/* empty */
{
$$ = ZADDR0;
}
| zapc
;
/* The PC, optionally suppressed. */
zpc:
LPC
| LZPC
;
/* ',' zapc when it may be omitted. */
optczapc:
/* empty */
{
$$ = ZADDR0;
}
| ',' zapc
{
$$ = $2;
}
;
/* ',' EXPR when it may be omitted. */
optcexpr:
/* empty */
{
$$.exp.X_op = O_absent;
$$.size = SIZE_UNSPEC;
}
| ',' EXPR
{
$$ = $2;
}
;
/* EXPR ',' when it may be omitted. */
optexprc:
/* empty */
{
$$.exp.X_op = O_absent;
$$.size = SIZE_UNSPEC;
}
| EXPR ','
{
$$ = $1;
}
;
/* A register list for the movem instruction. */
reglist:
reglistpair
| reglistpair '/' ireglist
{
$$ = $1 | $3;
}
| reglistreg '/' ireglist
{
$$ = (1 << $1) | $3;
}
;
/* We use ireglist when we know we are looking at a reglist, and we
can safely reduce a simple register to reglistreg. If we permitted
reglist to reduce to reglistreg, it would be ambiguous whether a
plain register were a DREG/AREG/FPREG or a REGLST. */
ireglist:
reglistreg
{
$$ = 1 << $1;
}
| reglistpair
| reglistpair '/' ireglist
{
$$ = $1 | $3;
}
| reglistreg '/' ireglist
{
$$ = (1 << $1) | $3;
}
;
reglistpair:
reglistreg '-' reglistreg
{
$$ = (1 << ($3 + 1)) - 1 - ((1 << $1) - 1);
}
;
reglistreg:
DR
{
$$ = $1 - DATA0;
}
| AR
{
$$ = $1 - ADDR0 + 8;
}
| FPR
{
$$ = $1 - FP0 + 16;
}
| FPCR
{
if ($1 == FPI)
$$ = 24;
else if ($1 == FPS)
$$ = 25;
else
$$ = 26;
}
;
%%
/* The string to parse is stored here, and modified by yylex. */
static char *str;
/* The original string pointer. */
static char *strorig;
/* If *CCP could be a register, return the register number and advance
*CCP. Otherwise don't change *CCP, and return 0. */
static enum m68k_register
m68k_reg_parse (ccp)
register char **ccp;
{
char *start = *ccp;
char c;
char *p;
symbolS *symbolp;
if (flag_reg_prefix_optional)
{
if (*start == REGISTER_PREFIX)
start++;
p = start;
}
else
{
if (*start != REGISTER_PREFIX)
return 0;
p = start + 1;
}
if (! is_name_beginner (*p))
return 0;
p++;
while (is_part_of_name (*p) && *p != '.' && *p != ':' && *p != '*')
p++;
c = *p;
*p = 0;
symbolp = symbol_find (start);
*p = c;
if (symbolp != NULL && S_GET_SEGMENT (symbolp) == reg_section)
{
*ccp = p;
return S_GET_VALUE (symbolp);
}
return 0;
}
/* The lexer. */
static int
yylex ()
{
enum m68k_register reg;
char *s;
int parens;
int c = 0;
char *hold;
if (*str == ' ')
++str;
if (*str == '\0')
return 0;
/* Various special characters are just returned directly. */
switch (*str)
{
case '#':
case '&':
case ',':
case ')':
case '/':
case '@':
case '[':
case ']':
return *str++;
case '+':
/* It so happens that a '+' can only appear at the end of an
operand. If it appears anywhere else, it must be a unary
plus on an expression. */
if (str[1] == '\0')
return *str++;
break;
case '-':
/* A '-' can only appear in -(ar), rn-rn, or ar@-. If it
appears anywhere else, it must be a unary minus on an
expression. */
if (str[1] == '\0')
return *str++;
s = str + 1;
if (*s == '(')
++s;
if (m68k_reg_parse (&s) != 0)
return *str++;
break;
case '(':
/* A '(' can only appear in `(reg)', `(expr,...', `([', `@(', or
`)('. If it appears anywhere else, it must be starting an
expression. */
if (str[1] == '['
|| (str > strorig
&& (str[-1] == '@'
|| str[-1] == ')')))
return *str++;
s = str + 1;
if (m68k_reg_parse (&s) != 0)
return *str++;
/* Check for the case of '(expr,...' by scanning ahead. If we
find a comma outside of balanced parentheses, we return '('.
If we find an unbalanced right parenthesis, then presumably
the '(' really starts an expression. */
parens = 0;
for (s = str + 1; *s != '\0'; s++)
{
if (*s == '(')
++parens;
else if (*s == ')')
{
if (parens == 0)
break;
--parens;
}
else if (*s == ',' && parens == 0)
{
/* A comma can not normally appear in an expression, so
this is a case of '(expr,...'. */
return *str++;
}
}
}
/* See if it's a register. */
reg = m68k_reg_parse (&str);
if (reg != 0)
{
int ret;
yylval.reg = reg;
if (reg >= DATA0 && reg <= DATA7)
ret = DR;
else if (reg >= ADDR0 && reg <= ADDR7)
ret = AR;
else if (reg >= FP0 && reg <= FP7)
return FPR;
else if (reg == FPI
|| reg == FPS
|| reg == FPC)
return FPCR;
else if (reg == PC)
return LPC;
else if (reg >= ZDATA0 && reg <= ZDATA7)
ret = ZDR;
else if (reg >= ZADDR0 && reg <= ZADDR7)
ret = ZAR;
else if (reg == ZPC)
return LZPC;
else
return CREG;
/* If we get here, we have a data or address register. We
must check for a size or scale; if we find one, we must
return INDEXREG. */
s = str;
if (*s != '.' && *s != ':' && *s != '*')
return ret;
yylval.indexreg.reg = reg;
if (*s != '.' && *s != ':')
yylval.indexreg.size = SIZE_UNSPEC;
else
{
++s;
switch (*s)
{
case 'w':
case 'W':
yylval.indexreg.size = SIZE_WORD;
++s;
break;
case 'l':
case 'L':
yylval.indexreg.size = SIZE_LONG;
++s;
break;
default:
yyerror ("illegal size specification");
yylval.indexreg.size = SIZE_UNSPEC;
break;
}
}
if (*s != '*' && *s != ':')
yylval.indexreg.scale = 1;
else
{
++s;
switch (*s)
{
case '1':
case '2':
case '4':
case '8':
yylval.indexreg.scale = *s - '0';
++s;
break;
default:
yyerror ("illegal scale specification");
yylval.indexreg.scale = 1;
break;
}
}
str = s;
return INDEXREG;
}
/* It must be an expression. Before we call expression, we need to
look ahead to see if there is a size specification. We must do
that first, because otherwise foo.l will be treated as the symbol
foo.l, rather than as the symbol foo with a long size
specification. The grammar requires that all expressions end at
the end of the operand, or with ',', '(', ']', ')'. */
parens = 0;
for (s = str; *s != '\0'; s++)
{
if (*s == '(')
{
if (parens == 0
&& s > str
&& (s[-1] == ')' || isalnum ((unsigned char) s[-1])))
break;
++parens;
}
else if (*s == ')')
{
if (parens == 0)
break;
--parens;
}
else if (parens == 0
&& (*s == ',' || *s == ']'))
break;
}
yylval.exp.size = SIZE_UNSPEC;
if (s <= str + 2
|| (s[-2] != '.' && s[-2] != ':'))
s = NULL;
else
{
switch (s[-1])
{
case 's':
case 'S':
case 'b':
case 'B':
yylval.exp.size = SIZE_BYTE;
break;
case 'w':
case 'W':
yylval.exp.size = SIZE_WORD;
break;
case 'l':
case 'L':
yylval.exp.size = SIZE_LONG;
break;
default:
s = NULL;
break;
}
if (yylval.exp.size != SIZE_UNSPEC)
{
c = s[-2];
s[-2] = '\0';
}
}
hold = input_line_pointer;
input_line_pointer = str;
expression (&yylval.exp.exp);
str = input_line_pointer;
input_line_pointer = hold;
if (s != NULL)
{
s[-2] = c;
str = s;
}
return EXPR;
}
/* Parse an m68k operand. This is the only function which is called
from outside this file. */
int
m68k_ip_op (s, oparg)
char *s;
struct m68k_op *oparg;
{
memset (oparg, 0, sizeof *oparg);
oparg->error = NULL;
oparg->index.reg = ZDATA0;
oparg->index.scale = 1;
oparg->disp.exp.X_op = O_absent;
oparg->odisp.exp.X_op = O_absent;
str = strorig = s;
op = oparg;
return yyparse ();
}
/* The error handler. */
static void
yyerror (s)
const char *s;
{
op->error = s;
}

File diff suppressed because it is too large Load Diff

45
gas/configure vendored
View File

@ -555,7 +555,7 @@ te_file=generic
# check for architecture variants
case ${target_cpu} in
armeb) cpu_type=arm endian=big ;;
arm*) cpu_tpye=arm endian=little ;;
arm*) cpu_type=arm endian=little ;;
hppa*) cpu_type=hppa ;;
i[45]86) cpu_type=i386 ;;
m680[012346]0) cpu_type=m68k ;;
@ -636,7 +636,7 @@ for this_target in $target $canon_targets ; do
rs6000*) cpu_type=ppc ;;
sparc64) cpu_type=sparc obj_format=elf want_sparcv9=true ;;
sparclite*) cpu_type=sparc ;;
*) cpu_type=${target_cpu} ;;
*) cpu_type=${cpu} ;;
esac
if test ${this_target} = $target ; then
@ -664,8 +664,7 @@ for this_target in $target $canon_targets ; do
arc-*-elf*) fmt=elf bfd_gas=yes ;;
# end-sanitize-arc
arm-*-riscix*) fmt=aout targ=arm-lit
emulation=riscix ;;
arm-*-riscix*) fmt=aout targ=arm-lit ;;
arm-*-aout) fmt=aout
case "$endian" in
big) targ=arm-big ;;
@ -689,7 +688,7 @@ for this_target in $target $canon_targets ; do
i386-*-bsd*) fmt=aout em=386bsd ;;
i386-*-netbsd0.8) fmt=aout em=386bsd ;;
i386-*-netbsd*) fmt=aout em=nbsd bfd_gas=yes;;
i386-*-linux*aout*) fmt=aout em=linux ;;
i386-*-linux*aout* | i386-*-linuxoldld) fmt=aout em=linux ;;
i386-*-linux*coff*) fmt=coff em=linux
targ=i386coff ;;
i386-*-linux*) fmt=elf em=linux ;;
@ -828,6 +827,10 @@ for this_target in $target $canon_targets ; do
*) ;;
esac
case ${cpu_type} in
m68k) extra_objects="$extra_objects m68k-parse.o" ;;
esac
# See if we really can support this configuration with the emulation code.
if test $this_target = $target ; then
@ -1227,7 +1230,7 @@ else
# On the NeXT, cc -E runs the code through the compiler's parser,
# not just through cpp.
cat > conftest.$ac_ext <<EOF
#line 1231 "configure"
#line 1230 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
@ -1241,7 +1244,7 @@ else
rm -rf conftest*
CPP="${CC-cc} -E -traditional-cpp"
cat > conftest.$ac_ext <<EOF
#line 1245 "configure"
#line 1244 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
@ -1274,7 +1277,7 @@ if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1278 "configure"
#line 1277 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
@ -1326,7 +1329,7 @@ else
ac_cv_c_cross=yes
else
cat > conftest.$ac_ext <<EOF
#line 1330 "configure"
#line 1329 "configure"
#include "confdefs.h"
main(){return(0);}
EOF
@ -1349,7 +1352,7 @@ if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1353 "configure"
#line 1352 "configure"
#include "confdefs.h"
#include <alloca.h>
int main() { return 0; }
@ -1380,7 +1383,7 @@ if eval "test \"`echo '$''{'ac_cv_func_alloca'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1384 "configure"
#line 1383 "configure"
#include "confdefs.h"
#ifdef __GNUC__
@ -1438,7 +1441,7 @@ if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1442 "configure"
#line 1441 "configure"
#include "confdefs.h"
#if defined(CRAY) && ! defined(CRAY2)
webecray
@ -1466,7 +1469,7 @@ if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1470 "configure"
#line 1469 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -1520,7 +1523,7 @@ else
ac_cv_c_stack_direction=0
else
cat > conftest.$ac_ext <<EOF
#line 1524 "configure"
#line 1523 "configure"
#include "confdefs.h"
find_stack_direction ()
{
@ -1562,7 +1565,7 @@ else
ac_cv_c_inline=no
for ac_kw in inline __inline__ __inline; do
cat > conftest.$ac_ext <<EOF
#line 1566 "configure"
#line 1565 "configure"
#include "confdefs.h"
int main() { return 0; }
@ -1601,7 +1604,7 @@ if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1605 "configure"
#line 1604 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -1654,7 +1657,7 @@ if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1658 "configure"
#line 1657 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -1707,7 +1710,7 @@ if eval "test \"`echo '$''{'gas_cv_assert_ok'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1711 "configure"
#line 1710 "configure"
#include "confdefs.h"
#include <assert.h>
#include <stdio.h>
@ -1764,7 +1767,7 @@ if eval "test \"`echo '$''{'gas_cv_decl_needed_malloc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1768 "configure"
#line 1767 "configure"
#include "confdefs.h"
$gas_test_headers
int main() { return 0; }
@ -1800,7 +1803,7 @@ if eval "test \"`echo '$''{'gas_cv_decl_needed_free'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1804 "configure"
#line 1803 "configure"
#include "confdefs.h"
$gas_test_headers
int main() { return 0; }
@ -1839,7 +1842,7 @@ if eval "test \"`echo '$''{'gas_cv_decl_needed_errno'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 1843 "configure"
#line 1842 "configure"
#include "confdefs.h"
#ifdef HAVE_ERRNO_H

View File

@ -39,7 +39,7 @@ te_file=generic
# check for architecture variants
case ${target_cpu} in
armeb) cpu_type=arm endian=big ;;
arm*) cpu_tpye=arm endian=little ;;
arm*) cpu_type=arm endian=little ;;
hppa*) cpu_type=hppa ;;
changequote(,)dnl
i[45]86) cpu_type=i386 ;;
@ -109,7 +109,7 @@ changequote([,])dnl
rs6000*) cpu_type=ppc ;;
sparc64) cpu_type=sparc obj_format=elf want_sparcv9=true ;;
sparclite*) cpu_type=sparc ;;
*) cpu_type=${target_cpu} ;;
*) cpu_type=${cpu} ;;
esac
if test ${this_target} = $target ; then
@ -137,8 +137,7 @@ changequote([,])dnl
arc-*-elf*) fmt=elf bfd_gas=yes ;;
# end-sanitize-arc
arm-*-riscix*) fmt=aout targ=arm-lit
emulation=riscix ;;
arm-*-riscix*) fmt=aout targ=arm-lit ;;
arm-*-aout) fmt=aout
case "$endian" in
big) targ=arm-big ;;
@ -162,7 +161,7 @@ changequote([,])dnl
i386-*-bsd*) fmt=aout em=386bsd ;;
i386-*-netbsd0.8) fmt=aout em=386bsd ;;
i386-*-netbsd*) fmt=aout em=nbsd bfd_gas=yes;;
i386-*-linux*aout*) fmt=aout em=linux ;;
i386-*-linux*aout* | i386-*-linuxoldld) fmt=aout em=linux ;;
i386-*-linux*coff*) fmt=coff em=linux
targ=i386coff ;;
i386-*-linux*) fmt=elf em=linux ;;
@ -301,6 +300,10 @@ changequote([,])dnl
*) ;;
esac
case ${cpu_type} in
m68k) extra_objects="$extra_objects m68k-parse.o" ;;
esac
# See if we really can support this configuration with the emulation code.
if test $this_target = $target ; then