* write.c (write_contents): Include output file name and bfd error
value when reporting the inability to write to the output file. * config/tc-rx.c (rx_handle_align): Do not insert NOPs into align frag that has a non-zero fill value. * gas/all/align.d: Skip for the RX. * gas/elf/group1a.d: Likewise. * gas/elf/groupautoa.d: Likewise. * gas/elf/elf.exp: Do not run section5 test for the RX port. * gas/elf/section4.d: Likewise. * gas/elf/section7.d: Likewise. * gas/macros/semi.s: Fill with a non-zero pattern. * gas/macros/semi.d: Expect non-zero fill value. * gas/rx/bcnd.d: Update expected disassembly. * gas/rx/bra.d: Likewise. * gas/rx/macros.inc: Add reg1 macro. * gas/rx/max.sm: Use reg1 macro to avoid generating illegal NOP instruction. * gas/rx/mov.sm: Likewise. * gas/rx/max.d: Update expected disassembly. * gas/rx/mov.d: Likewise. * gas/rx/rx-asm-good.s: Use Renesas section names. * gas/rx/rx-asm-good.d: Update expected disassembly.
This commit is contained in:
parent
45a4356715
commit
a22429b98e
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@ -1,3 +1,10 @@
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||||||
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2011-01-31 Nick Clifton <nickc@redhat.com>
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* write.c (write_contents): Include output file name and bfd error
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value when reporting the inability to write to the output file.
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* config/tc-rx.c (rx_handle_align): Do not insert NOPs into align
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frag that has a non-zero fill value.
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2011-01-27 DJ Delorie <dj@redhat.com>
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2011-01-27 DJ Delorie <dj@redhat.com>
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* config/tc-rx.c (md_convert_frag): If we can't compute the target
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* config/tc-rx.c (md_convert_frag): If we can't compute the target
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@ -548,7 +548,7 @@ const pseudo_typeS md_pseudo_table[] =
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/* The manual documents ".stk" but the compiler emits ".stack". */
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/* The manual documents ".stk" but the compiler emits ".stack". */
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{ "stack", rx_nop, 0 },
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{ "stack", rx_nop, 0 },
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/* Theae are Renesas as100 assembler pseudo-ops that we do support. */
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/* These are Renesas as100 assembler pseudo-ops that we do support. */
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{ "addr", rx_cons, 3 },
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{ "addr", rx_cons, 3 },
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{ "align", s_align_bytes, 2 },
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{ "align", s_align_bytes, 2 },
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{ "byte", rx_cons, 1 },
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{ "byte", rx_cons, 1 },
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@ -1142,6 +1142,9 @@ static unsigned char *nops[] = { NULL, nop_1, nop_2, nop_3, nop_4, nop_5, nop_6,
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void
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void
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rx_handle_align (fragS * frag)
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rx_handle_align (fragS * frag)
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{
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{
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/* If handling an alignment frag, use an optimal NOP pattern.
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Only do this if a fill value has not already been provided.
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FIXME: This test fails if the provided fill value is zero. */
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if ((frag->fr_type == rs_align
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if ((frag->fr_type == rs_align
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|| frag->fr_type == rs_align_code)
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|| frag->fr_type == rs_align_code)
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&& subseg_text_p (now_seg))
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&& subseg_text_p (now_seg))
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@ -1151,6 +1154,8 @@ rx_handle_align (fragS * frag)
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- frag->fr_fix);
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- frag->fr_fix);
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unsigned char *base = (unsigned char *)frag->fr_literal + frag->fr_fix;
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unsigned char *base = (unsigned char *)frag->fr_literal + frag->fr_fix;
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if (* base == 0)
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{
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if (count > BIGGEST_NOP)
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if (count > BIGGEST_NOP)
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{
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{
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base[0] = 0x2e;
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base[0] = 0x2e;
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@ -1163,6 +1168,7 @@ rx_handle_align (fragS * frag)
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frag->fr_var = count;
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frag->fr_var = count;
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}
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}
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}
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}
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}
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if (linkrelax
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if (linkrelax
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&& (frag->fr_type == rs_align
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&& (frag->fr_type == rs_align
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@ -1,3 +1,24 @@
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2011-01-31 Nick Clifton <nickc@redhat.com>
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* gas/all/align.d: Skip for the RX.
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* gas/elf/group1a.d: Likewise.
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* gas/elf/groupautoa.d: Likewise.
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* gas/elf/elf.exp: Do not run section5 test for the RX port.
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* gas/elf/section4.d: Likewise.
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* gas/elf/section7.d: Likewise.
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* gas/macros/semi.s: Fill with a non-zero pattern.
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* gas/macros/semi.d: Expect non-zero fill value.
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* gas/rx/bcnd.d: Update expected disassembly.
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* gas/rx/bra.d: Likewise.
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* gas/rx/macros.inc: Add reg1 macro.
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* gas/rx/max.sm: Use reg1 macro to avoid generating illegal NOP
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instruction.
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* gas/rx/mov.sm: Likewise.
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* gas/rx/max.d: Update expected disassembly.
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* gas/rx/mov.d: Likewise.
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* gas/rx/rx-asm-good.s: Use Renesas section names.
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* gas/rx/rx-asm-good.d: Update expected disassembly.
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2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/12409
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PR gas/12409
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@ -1,6 +1,8 @@
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#objdump: -s -j .text
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#objdump: -s -j .text
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#name: align
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#name: align
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#not-target: m32c-*
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# The RX port will always replace zeros in any aligned area with NOPs,
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# even if the user requested that they filled with zeros.
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#not-target: m32c-* rx-*
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# Test the alignment pseudo-op.
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# Test the alignment pseudo-op.
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@ -146,9 +146,11 @@ if { ([istarget "*-*-*elf*"]
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}
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}
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run_dump_test "section3"
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run_dump_test "section3"
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run_dump_test "section4"
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run_dump_test "section4"
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if {! [istarget "h8300-*-*"]} then {
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if {! [istarget "h8300-*-*"] && ! [istarget "rx-*-*"]} then {
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# The h8300 port issues a warning message for
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# The h8300 port issues a warning message for
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# new sections created without atrributes.
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# new sections created without atrributes.
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# The RX port does not complain about changing the attributes of the
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# .data and .bss sections since it does not use those names.
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run_elf_list_test "section5" "" "-al" "-SW" "| grep \" \\\\.test\\\[0-9\\\]\""
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run_elf_list_test "section5" "" "-al" "-SW" "| grep \" \\\\.test\\\[0-9\\\]\""
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}
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}
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run_dump_test "struct"
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run_dump_test "struct"
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@ -1,6 +1,8 @@
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#readelf: -SW
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#readelf: -SW
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#name: group section with multiple sections of same name
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#name: group section with multiple sections of same name
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#source: group1.s
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#source: group1.s
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# The RX port uses non-standard section names.
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#not-target: rx-*
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#...
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#...
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[ ]*\[.*\][ ]+\.group[ ]+GROUP.*
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[ ]*\[.*\][ ]+\.group[ ]+GROUP.*
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@ -1,6 +1,8 @@
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#readelf: -SW
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#readelf: -SW
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#name: automatic section group a
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#name: automatic section group a
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#source: groupauto.s
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#source: groupauto.s
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# The RX port uses non-standard section names.
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#not-target: rx-*
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#...
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#...
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[ ]*\[.*\][ ]+\.group[ ]+GROUP.*
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[ ]*\[.*\][ ]+\.group[ ]+GROUP.*
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@ -1,5 +1,7 @@
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#readelf: --sections
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#readelf: --sections
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#name: label arithmetic with multiple same-name sections
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#name: label arithmetic with multiple same-name sections
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# The RX port uses non-standard section names.
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#not-target: rx-*
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#...
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#...
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[ ]*\[.*\][ ]+\.group[ ]+GROUP.*
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[ ]*\[.*\][ ]+\.group[ ]+GROUP.*
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@ -1,5 +1,8 @@
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#objdump: -s
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#objdump: -s
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#name: elf section7
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#name: elf section7
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# .pushsection always creates the named section, but the
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# test harness translates ".text" into "P" for the RX...
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#not-target: rx-*
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.*: +file format .*
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.*: +file format .*
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@ -5,5 +5,5 @@
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.*: .*
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.*: .*
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Contents of section .text:
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Contents of section .text:
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0000 3b203b20 3a203a20 00000000 00000000 ; ; : : ........
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0000 3b203b20 3a203a20 11111111 11111111 ; ; : : ........
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0010 00000000 00000000 00000000 00000000 ................
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0010 11111111 11111111 11111111 11111111 ................
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@ -11,4 +11,4 @@
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colon
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colon
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.ascii ": "
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.ascii ": "
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.p2align 5,0
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.p2align 5,0x11
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@ -96,9 +96,9 @@ Disassembly of section \.text:
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82: R_RX_DIR16S_PCREL foo
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82: R_RX_DIR16S_PCREL foo
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84: 3a 00 80 beq\.w 0xffff8084
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84: 3a 00 80 beq\.w 0xffff8084
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87: 3a ff 7f beq\.w 0x8086
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87: 3a ff 7f beq\.w 0x8086
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8a: 3a fc 7f beq\.w 0x8086
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8a: 3a 00 00 beq\.w 0x8a
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8b: R_RX_DIR16S_PCREL foo
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8b: R_RX_DIR16S_PCREL foo
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8d: 3b 00 80 bne\.w 0xffff808d
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8d: 3b 00 80 bne\.w 0xffff808d
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90: 3b ff 7f bne\.w 0x808f
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90: 3b ff 7f bne\.w 0x808f
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93: 3b fc 7f bne\.w 0x808f
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93: 3b 00 00 bne\.w 0x93
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94: R_RX_DIR16S_PCREL foo
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94: R_RX_DIR16S_PCREL foo
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@ -24,7 +24,7 @@ Disassembly of section \.text:
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1b: R_RX_DIR24S_PCREL foo
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1b: R_RX_DIR24S_PCREL foo
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1e: 04 00 00 80 bra\.a 0xff80001e
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1e: 04 00 00 80 bra\.a 0xff80001e
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22: 04 ff ff 7f bra\.a 0x800021
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22: 04 ff ff 7f bra\.a 0x800021
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||||||
26: 04 fb ff 7f bra\.a 0x800021
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26: 04 00 00 00 bra\.a 0x26
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27: R_RX_DIR24S_PCREL foo
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27: R_RX_DIR24S_PCREL foo
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2a: 7f 40 bra\.l r0
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2a: 7f 40 bra\.l r0
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||||||
2c: 7f 4f bra\.l r15
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2c: 7f 4f bra\.l r15
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||||||
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@ -1,4 +1,5 @@
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macro reg {r0;r15}
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macro reg {r0;r15}
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macro reg1 {r1;r15}
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macro reg2 {r0;r14}
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macro reg2 {r0;r14}
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macro reg7 {r0;r7}
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macro reg7 {r0;r7}
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macro regPlo {r1;r7}
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macro regPlo {r1;r7}
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||||||
|
|
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@ -22,8 +22,8 @@ Disassembly of section \.text:
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||||||
45: fd 70 4f 00 00 00 80 max #0x80000000, r15
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45: fd 70 4f 00 00 00 80 max #0x80000000, r15
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4c: fd 70 40 ff ff ff 7f max #0x7fffffff, r0
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4c: fd 70 40 ff ff ff 7f max #0x7fffffff, r0
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||||||
53: fd 70 4f ff ff ff 7f max #0x7fffffff, r15
|
53: fd 70 4f ff ff ff 7f max #0x7fffffff, r15
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5a: fc 13 00 max r0, r0
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5a: fc 13 10 max r1, r0
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||||||
5d: fc 13 0f max r0, r15
|
5d: fc 13 1f max r1, r15
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||||||
60: fc 13 f0 max r15, r0
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60: fc 13 f0 max r15, r0
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||||||
63: fc 13 ff max r15, r15
|
63: fc 13 ff max r15, r15
|
||||||
66: fc 10 00 max \[r0\]\.ub, r0
|
66: fc 10 00 max \[r0\]\.ub, r0
|
||||||
|
|
|
@ -1,3 +1,3 @@
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max #{imm},{reg}
|
max #{imm},{reg}
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max {reg},{reg}
|
max {reg1},{reg}
|
||||||
max {memx},{reg}
|
max {memx},{reg}
|
||||||
|
|
|
@ -102,16 +102,16 @@ Disassembly of section \.text:
|
||||||
f6: fb f2 00 00 00 80 mov\.l #0x80000000, r15
|
f6: fb f2 00 00 00 80 mov\.l #0x80000000, r15
|
||||||
fc: fb 02 ff ff ff 7f mov\.l #0x7fffffff, r0
|
fc: fb 02 ff ff ff 7f mov\.l #0x7fffffff, r0
|
||||||
102: fb f2 ff ff ff 7f mov\.l #0x7fffffff, r15
|
102: fb f2 ff ff ff 7f mov\.l #0x7fffffff, r15
|
||||||
108: cf 00 mov\.b r0, r0
|
108: cf 10 mov\.b r1, r0
|
||||||
10a: cf 0f mov\.b r0, r15
|
10a: cf 1f mov\.b r1, r15
|
||||||
10c: cf f0 mov\.b r15, r0
|
10c: cf f0 mov\.b r15, r0
|
||||||
10e: cf ff mov\.b r15, r15
|
10e: cf ff mov\.b r15, r15
|
||||||
110: df 00 mov\.w r0, r0
|
110: df 10 mov\.w r1, r0
|
||||||
112: df 0f mov\.w r0, r15
|
112: df 1f mov\.w r1, r15
|
||||||
114: df f0 mov\.w r15, r0
|
114: df f0 mov\.w r15, r0
|
||||||
116: df ff mov\.w r15, r15
|
116: df ff mov\.w r15, r15
|
||||||
118: ef 00 mov\.l r0, r0
|
118: ef 10 mov\.l r1, r0
|
||||||
11a: ef 0f mov\.l r0, r15
|
11a: ef 1f mov\.l r1, r15
|
||||||
11c: ef f0 mov\.l r15, r0
|
11c: ef f0 mov\.l r15, r0
|
||||||
11e: ef ff mov\.l r15, r15
|
11e: ef ff mov\.l r15, r15
|
||||||
120: 3c 00 00 mov\.b #0, \[r0\]
|
120: 3c 00 00 mov\.b #0, \[r0\]
|
||||||
|
@ -258,36 +258,36 @@ Disassembly of section \.text:
|
||||||
375: fe 6f 0f mov\.l \[r15, r0\], r15
|
375: fe 6f 0f mov\.l \[r15, r0\], r15
|
||||||
378: fe 6f f0 mov\.l \[r15, r15\], r0
|
378: fe 6f f0 mov\.l \[r15, r15\], r0
|
||||||
37b: fe 6f ff mov\.l \[r15, r15\], r15
|
37b: fe 6f ff mov\.l \[r15, r15\], r15
|
||||||
37e: c3 00 mov\.b r0, \[r0\]
|
37e: c3 01 mov\.b r1, \[r0\]
|
||||||
380: c3 f0 mov\.b r0, \[r15\]
|
380: c3 f1 mov\.b r1, \[r15\]
|
||||||
382: c7 00 fc mov\.b r0, 252\[r0\]
|
382: c7 01 fc mov\.b r1, 252\[r0\]
|
||||||
385: c7 f0 fc mov\.b r0, 252\[r15\]
|
385: c7 f1 fc mov\.b r1, 252\[r15\]
|
||||||
388: cb 00 fc ff mov\.b r0, 65532\[r0\]
|
388: cb 01 fc ff mov\.b r1, 65532\[r0\]
|
||||||
38c: cb f0 fc ff mov\.b r0, 65532\[r15\]
|
38c: cb f1 fc ff mov\.b r1, 65532\[r15\]
|
||||||
390: c3 0f mov\.b r15, \[r0\]
|
390: c3 0f mov\.b r15, \[r0\]
|
||||||
392: c3 ff mov\.b r15, \[r15\]
|
392: c3 ff mov\.b r15, \[r15\]
|
||||||
394: c7 0f fc mov\.b r15, 252\[r0\]
|
394: c7 0f fc mov\.b r15, 252\[r0\]
|
||||||
397: c7 ff fc mov\.b r15, 252\[r15\]
|
397: c7 ff fc mov\.b r15, 252\[r15\]
|
||||||
39a: cb 0f fc ff mov\.b r15, 65532\[r0\]
|
39a: cb 0f fc ff mov\.b r15, 65532\[r0\]
|
||||||
39e: cb ff fc ff mov\.b r15, 65532\[r15\]
|
39e: cb ff fc ff mov\.b r15, 65532\[r15\]
|
||||||
3a2: d3 00 mov\.w r0, \[r0\]
|
3a2: d3 01 mov\.w r1, \[r0\]
|
||||||
3a4: d3 f0 mov\.w r0, \[r15\]
|
3a4: d3 f1 mov\.w r1, \[r15\]
|
||||||
3a6: d7 00 7e mov\.w r0, 252\[r0\]
|
3a6: d7 01 7e mov\.w r1, 252\[r0\]
|
||||||
3a9: d7 f0 7e mov\.w r0, 252\[r15\]
|
3a9: d7 f1 7e mov\.w r1, 252\[r15\]
|
||||||
3ac: db 00 fe 7f mov\.w r0, 65532\[r0\]
|
3ac: db 01 fe 7f mov\.w r1, 65532\[r0\]
|
||||||
3b0: db f0 fe 7f mov\.w r0, 65532\[r15\]
|
3b0: db f1 fe 7f mov\.w r1, 65532\[r15\]
|
||||||
3b4: d3 0f mov\.w r15, \[r0\]
|
3b4: d3 0f mov\.w r15, \[r0\]
|
||||||
3b6: d3 ff mov\.w r15, \[r15\]
|
3b6: d3 ff mov\.w r15, \[r15\]
|
||||||
3b8: d7 0f 7e mov\.w r15, 252\[r0\]
|
3b8: d7 0f 7e mov\.w r15, 252\[r0\]
|
||||||
3bb: d7 ff 7e mov\.w r15, 252\[r15\]
|
3bb: d7 ff 7e mov\.w r15, 252\[r15\]
|
||||||
3be: db 0f fe 7f mov\.w r15, 65532\[r0\]
|
3be: db 0f fe 7f mov\.w r15, 65532\[r0\]
|
||||||
3c2: db ff fe 7f mov\.w r15, 65532\[r15\]
|
3c2: db ff fe 7f mov\.w r15, 65532\[r15\]
|
||||||
3c6: e3 00 mov\.l r0, \[r0\]
|
3c6: e3 01 mov\.l r1, \[r0\]
|
||||||
3c8: e3 f0 mov\.l r0, \[r15\]
|
3c8: e3 f1 mov\.l r1, \[r15\]
|
||||||
3ca: e7 00 3f mov\.l r0, 252\[r0\]
|
3ca: e7 01 3f mov\.l r1, 252\[r0\]
|
||||||
3cd: e7 f0 3f mov\.l r0, 252\[r15\]
|
3cd: e7 f1 3f mov\.l r1, 252\[r15\]
|
||||||
3d0: eb 00 ff 3f mov\.l r0, 65532\[r0\]
|
3d0: eb 01 ff 3f mov\.l r1, 65532\[r0\]
|
||||||
3d4: eb f0 ff 3f mov\.l r0, 65532\[r15\]
|
3d4: eb f1 ff 3f mov\.l r1, 65532\[r15\]
|
||||||
3d8: e3 0f mov\.l r15, \[r0\]
|
3d8: e3 0f mov\.l r15, \[r0\]
|
||||||
3da: e3 ff mov\.l r15, \[r15\]
|
3da: e3 ff mov\.l r15, \[r15\]
|
||||||
3dc: e7 0f 3f mov\.l r15, 252\[r0\]
|
3dc: e7 0f 3f mov\.l r15, 252\[r0\]
|
||||||
|
|
|
@ -6,7 +6,7 @@
|
||||||
|
|
||||||
mov.L #{uimm8},{reg}
|
mov.L #{uimm8},{reg}
|
||||||
mov.L #{imm},{reg}
|
mov.L #{imm},{reg}
|
||||||
mov{bwl} {reg},{reg}
|
mov{bwl} {reg1},{reg}
|
||||||
|
|
||||||
mov.B #{uimm8},{mem}
|
mov.B #{uimm8},{mem}
|
||||||
mov.W #{simm8},{mem}
|
mov.W #{simm8},{mem}
|
||||||
|
@ -16,7 +16,7 @@
|
||||||
mov{bwl} {mem},{reg}
|
mov{bwl} {mem},{reg}
|
||||||
mov{bwl} [{reg},{reg}],{reg}
|
mov{bwl} [{reg},{reg}],{reg}
|
||||||
|
|
||||||
mov{bwl} {reg},{mem}
|
mov{bwl} {reg1},{mem}
|
||||||
mov{bwl} {reg},[{reg},{reg}]
|
mov{bwl} {reg},[{reg},{reg}]
|
||||||
|
|
||||||
mov{bwl} {mem},{mem}
|
mov{bwl} {mem},{mem}
|
||||||
|
|
|
@ -1,11 +1,10 @@
|
||||||
# name: Compatibility with Renesas's own assembler
|
# name: Compatibility with Renesas's own assembler
|
||||||
# objdump: -D --prefix-addresses --show-raw-insn
|
# objdump: -D --prefix-addresses --show-raw-insn
|
||||||
# section-subst: no
|
|
||||||
|
|
||||||
.*: +file format elf32-rx-.*
|
.*: +file format elf32-rx-.*
|
||||||
|
|
||||||
|
|
||||||
Disassembly of section .text:
|
Disassembly of section P:
|
||||||
.*
|
.*
|
||||||
.*
|
.*
|
||||||
0+0108 <mem\+0x8> 66 20[ ]+mov.l[ ]+#2, r0
|
0+0108 <mem\+0x8> 66 20[ ]+mov.l[ ]+#2, r0
|
||||||
|
@ -18,7 +17,7 @@ Disassembly of section .text:
|
||||||
0+011c <mem\+0x1c> ff 2e 00[ ]+add[ ]+r0, r0, r14
|
0+011c <mem\+0x1c> ff 2e 00[ ]+add[ ]+r0, r0, r14
|
||||||
.*
|
.*
|
||||||
|
|
||||||
Disassembly of section .data:
|
Disassembly of section D_1:
|
||||||
0+0000 <dmem> 01.*
|
0+0000 <dmem> 01.*
|
||||||
0+0001 <dmem\+0x1> 00.*
|
0+0001 <dmem\+0x1> 00.*
|
||||||
0+0002 <dmem\+0x2> 00.*
|
0+0002 <dmem\+0x2> 00.*
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
|
|
||||||
.INCLUDE ..FILE@.inc
|
.INCLUDE ..FILE@.inc
|
||||||
|
|
||||||
.SECTION .text,CODE,ALIGN
|
.SECTION P,CODE,ALIGN
|
||||||
|
|
||||||
.ORG 100H
|
.ORG 100H
|
||||||
|
|
||||||
|
@ -42,7 +42,7 @@ mem:
|
||||||
bra ?-
|
bra ?-
|
||||||
|
|
||||||
|
|
||||||
.SECTION .data,DATA
|
.SECTION D_1,DATA
|
||||||
.GLB dmem
|
.GLB dmem
|
||||||
dmem:
|
dmem:
|
||||||
size .EQU 2
|
size .EQU 2
|
||||||
|
|
|
@ -1565,7 +1565,9 @@ write_contents (bfd *abfd ATTRIBUTE_UNUSED,
|
||||||
(stdoutput, sec, buf, (file_ptr) offset,
|
(stdoutput, sec, buf, (file_ptr) offset,
|
||||||
(bfd_size_type) n_per_buf * fill_size);
|
(bfd_size_type) n_per_buf * fill_size);
|
||||||
if (!x)
|
if (!x)
|
||||||
as_fatal (_("cannot write to output file"));
|
as_fatal (_("cannot write to output file '%s': %s"),
|
||||||
|
stdoutput->filename,
|
||||||
|
bfd_errmsg (bfd_get_error ()));
|
||||||
offset += n_per_buf * fill_size;
|
offset += n_per_buf * fill_size;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue