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add support for Blackfin bf504/bf506

This commit is contained in:
Mike Frysinger 2010-03-10 13:03:29 +00:00
parent af6b7be16a
commit a23c851aa4
3 changed files with 15 additions and 0 deletions
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7
gas/ChangeLog
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@ -1,3 +1,10 @@
2010-03-10 Mike Frysinger <michael.frysinger@analog.com>
* doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
* config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
BFIN_CPU_BF506.
(bfin_cpus[]): Add 0.0 for bf504 and bf506.
2010-03-10 Jie Zhang <jie@codesourcery.com>
* doc/as.texinfo: Add Blackfin options.

6
gas/config/tc-bfin.c
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@ -151,6 +151,8 @@ const char FLT_CHARS[] = "fFdDxX";
typedef enum bfin_cpu_type
{
BFIN_CPU_UNKNOWN,
BFIN_CPU_BF504,
BFIN_CPU_BF506,
BFIN_CPU_BF512,
BFIN_CPU_BF514,
BFIN_CPU_BF516,
@ -200,6 +202,10 @@ struct bfin_cpu
struct bfin_cpu bfin_cpus[] =
{
{"bf504", BFIN_CPU_BF504, 0x0000, AC_05000074},
{"bf506", BFIN_CPU_BF506, 0x0000, AC_05000074},
{"bf512", BFIN_CPU_BF512, 0x0001, AC_05000074},
{"bf512", BFIN_CPU_BF512, 0x0000, AC_05000074},

2
gas/doc/c-bfin.texi
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@ -34,6 +34,8 @@ is not used in assembler. It's here such that GCC can easily pass down its
error message if an attempt is made to assemble an instruction which
will not execute on the target processor. The following processor names are
recognized:
@code{bf504},
@code{bf506},
@code{bf512},
@code{bf514},
@code{bf516},