aarch64: Fix CFA encoding of vector registers
* config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix register number for vector register types.
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@ -1,3 +1,8 @@
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2014-08-22 Richard Henderson <rth@redhat.com>
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* config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix
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register number for vector register types.
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2014-08-22 Maciej W. Rozycki <macro@codesourcery.com>
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* config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
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@ -5966,12 +5966,15 @@ tc_aarch64_regname_to_dw2regnum (char *regname)
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case REG_TYPE_SP_64:
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case REG_TYPE_R_32:
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case REG_TYPE_R_64:
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return reg->number;
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case REG_TYPE_FP_B:
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case REG_TYPE_FP_H:
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case REG_TYPE_FP_S:
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case REG_TYPE_FP_D:
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case REG_TYPE_FP_Q:
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return reg->number;
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return reg->number + 64;
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default:
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break;
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}
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