aarch64: Fix CFA encoding of vector registers

* config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix
	register number for vector register types.
This commit is contained in:
Richard Henderson 2014-08-22 14:41:43 -07:00
parent 4ee220358d
commit a2cac51cb0
2 changed files with 9 additions and 1 deletions

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@ -1,3 +1,8 @@
2014-08-22 Richard Henderson <rth@redhat.com>
* config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix
register number for vector register types.
2014-08-22 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE

View File

@ -5966,12 +5966,15 @@ tc_aarch64_regname_to_dw2regnum (char *regname)
case REG_TYPE_SP_64:
case REG_TYPE_R_32:
case REG_TYPE_R_64:
return reg->number;
case REG_TYPE_FP_B:
case REG_TYPE_FP_H:
case REG_TYPE_FP_S:
case REG_TYPE_FP_D:
case REG_TYPE_FP_Q:
return reg->number;
return reg->number + 64;
default:
break;
}