Fri Jul 26 11:43:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* tc-d10v.c: Added lots of error checking. Added hacks to support accumulator shifts.
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@ -55,7 +55,7 @@ static Fixups *fixups;
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/* local functions */
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static int reg_name_search PARAMS ((char *name));
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static int register_name PARAMS ((expressionS *expressionP));
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static int check_range PARAMS ((unsigned long num, int bits, int sign));
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static int check_range PARAMS ((unsigned long num, int bits, int flags));
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static int postfix PARAMS ((char *p));
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static bfd_reloc_code_real_type get_reloc PARAMS ((struct d10v_operand *op));
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static int get_operands PARAMS ((expressionS exp[]));
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@ -147,15 +147,25 @@ register_name (expressionP)
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static int
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check_range (num, bits, sign)
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check_range (num, bits, flags)
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unsigned long num;
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int bits;
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int sign;
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int flags;
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{
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long min, max;
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int retval=0;
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if (sign)
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if (flags & OPERAND_SHIFT)
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{
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/* all special shift operands are unsigned */
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/* and <= 16. We allow 0 for now. */
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if (num>16)
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return 1;
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else
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return 0;
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}
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if (flags & OPERAND_SIGNED)
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{
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max = (1 << (bits - 1)) - 1;
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min = - (1 << (bits - 1));
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@ -401,7 +411,7 @@ d10v_insert_operand (insn, op_type, value, left)
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bits = d10v_operands[op_type].bits;
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/* truncate to the proper number of bits */
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if (check_range (value, bits, d10v_operands[op_type].flags & OPERAND_SIGNED))
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if (check_range (value, bits, d10v_operands[op_type].flags))
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as_bad("operand out of range: %d",value);
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value &= 0x7FFFFFFF >> (31 - bits);
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@ -467,7 +477,7 @@ build_insn (opcode, opers, insn)
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}
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/* truncate to the proper number of bits */
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if ((opers[i].X_op == O_constant) && check_range (number, bits, flags & OPERAND_SIGNED))
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if ((opers[i].X_op == O_constant) && check_range (number, bits, flags))
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as_bad("operand out of range: %d",number);
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number &= 0x7FFFFFFF >> (31 - bits);
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insn = insn | (number << shift);
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@ -528,6 +538,9 @@ write_1_short (opcode, insn, fx)
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char *f = frag_more(4);
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int i;
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if (opcode->exec_type == PARONLY)
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as_fatal ("Instruction must be executed in parallel with another instruction.");
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/* the other container needs to be NOP */
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/* according to 4.3.1: for FM=00, sub-instructions performed only
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by IU cannot be encoded in L-container. */
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@ -572,6 +585,13 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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char *f;
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int i,j;
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if ( (exec_type != 1) && ((opcode1->exec_type == PARONLY)
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|| (opcode2->exec_type == PARONLY)))
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as_fatal("Instruction must be executed in parallel");
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if ( (opcode1->format & LONG_OPCODE) || (opcode2->format & LONG_OPCODE))
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as_fatal ("Long instructions may not be combined.");
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if(opcode1->exec_type == BRANCH_LINK)
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{
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/* subroutines must be called from 32-bit boundaries */
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@ -595,15 +615,37 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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}
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break;
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case 1: /* parallel */
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insn = FM00 | (insn1 << 15) | insn2;
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fx = fx->next;
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if (opcode1->exec_type == SEQ || opcode2->exec_type == SEQ)
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as_fatal ("One of these instructions may not be executed in parallel.");
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if (opcode1->unit == IU)
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{
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if (opcode2->unit == IU)
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as_fatal ("Two IU instructions may not be executed in parallel");
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as_warn ("Swapping instruction order");
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insn = FM00 | (insn2 << 15) | insn1;
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}
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else if (opcode2->unit == MU)
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{
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if (opcode1->unit == MU)
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as_fatal ("Two MU instructions may not be executed in parallel");
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as_warn ("Swapping instruction order");
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insn = FM00 | (insn2 << 15) | insn1;
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}
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else
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insn = FM00 | (insn1 << 15) | insn2;
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fx = fx->next;
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break;
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case 2: /* sequential */
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insn = FM01 | (insn1 << 15) | insn2;
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fx = fx->next;
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if (opcode1->unit == IU)
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as_fatal ("IU instruction may not be in the left container");
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insn = FM01 | (insn1 << 15) | insn2;
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fx = fx->next;
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break;
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case 3: /* reverse sequential */
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insn = FM10 | (insn1 << 15) | insn2;
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if (opcode2->unit == MU)
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as_fatal ("MU instruction may not be in the right container");
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insn = FM10 | (insn1 << 15) | insn2;
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break;
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default:
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as_fatal("unknown execution type passed to write_2_short()");
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@ -817,7 +859,7 @@ do_assemble (str, opcode)
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{
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int bits = d10v_operands[next_opcode->operands[opnum]].bits;
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int flags = d10v_operands[next_opcode->operands[opnum]].flags;
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if (!check_range (myops[opnum].X_add_number, bits, flags & OPERAND_SIGNED))
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if (!check_range (myops[opnum].X_add_number, bits, flags))
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{
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match = 1;
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break;
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@ -915,7 +957,6 @@ do_assemble (str, opcode)
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myops[i].X_add_symbol = symbol_find_or_make ((char *)myops[i].X_op_symbol);
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myops[i].X_add_number = 0;
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myops[i].X_op_symbol = NULL;
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/* FIXME create a fixup */
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}
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}
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}
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