arc/nps400: Add new instructions
Add some new control instructions to the opcodes library, and a new test for these new instructions to the assembler. The new instructions use an instruction flag longer than any seen before (on arc), and so the max flag length is extended to accommodate this. gas/ChangeLog: * config/tc-arc.h (MAX_FLAG_NAME_LENGTH): Increase to 7. * testsuite/gas/arc/nps400-2.d: New file. * testsuite/gas/arc/nps400-2.s: New file. opcodes/ChangeLog: * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions. * arc-opc.c (arc_flag_operands): Add new flags. (arc_flag_classes): Add new classes.
This commit is contained in:
Andrew Burgess
parent
1328504b28
commit
a42a4f8400
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@ -1,3 +1,9 @@
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2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
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* config/tc-arc.h (MAX_FLAG_NAME_LENGTH): Increase to 7.
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* testsuite/gas/arc/nps400-2.d: New file.
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* testsuite/gas/arc/nps400-2.s: New file.
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2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
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* config/tc-arc.c (struct arc_opcode_hash_entry_iterator): New
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@ -211,7 +211,7 @@ extern int tc_arc_regname_to_dw2regnum (char *regname);
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#define NOP_OPCODE_S 0x000078E0
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#define NOP_OPCODE_L 0x264A7000 /* mov 0,0. */
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#define MAX_FLAG_NAME_LENGTH 3
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#define MAX_FLAG_NAME_LENGTH 7
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struct arc_flags
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{
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@ -0,0 +1,18 @@
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#as: -mcpu=nps400
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#objdump: -dr
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.*: +file format .*arc.*
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Disassembly of section .text:
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[0-9a-f]+ <.*>:
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0: 3e6f 7004 schd\.rw
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4: 3e6f 7084 schd\.rd
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8: 3e6f 7044 schd\.wft
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c: 3e6f 7144 schd\.wft\.ie1
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10: 3e6f 7244 schd\.wft\.ie2
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14: 3e6f 7344 schd\.wft\.ie12
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18: 3e6f 703f sync\.rd
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1c: 3e6f 707f sync\.wr
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20: 3a6f 10bf hwschd\.off r10
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24: 3e6f 7503 hwschd\.restore 0,r20
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@ -0,0 +1,16 @@
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.text
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;; schd
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schd.rw
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schd.rd
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schd.wft
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schd.wft.ie1
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schd.wft.ie2
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schd.wft.ie12
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;; sync
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sync.rd
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sync.wr
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;; hwschd
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hwschd.off r10
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hwschd.restore 0, r20
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@ -1,3 +1,9 @@
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2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
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* arc-opc.c (arc_flag_operands): Add new flags.
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(arc_flag_classes): Add new classes.
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2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
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@ -123,3 +123,20 @@
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/* crc32<.r> 0,limm,u6 00111 110 01 110100 R 111 uuuuuu 111110 */
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{ "crc32", 0x3e74703e, 0xffff703f, ARC_OPCODE_NPS400, BITOP, NONE, { ZA, LIMM, UIMM6_20 }, { C_NPS_R }},
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/**** Pipeline Control Instructions ****/
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/* schd<.rw|.rd> */
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{ "schd", 0x3e6f7004, 0xffffff7f, ARC_OPCODE_NPS400, CONTROL, NONE, { 0 }, { C_NPS_SCHD_RW }},
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/* schd.wft.<.ie1|.ie2|.ie12> */
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{ "schd", 0x3e6f7044, 0xfffffcff, ARC_OPCODE_NPS400, CONTROL, NONE, { 0 }, { C_NPS_SCHD_TRIG, C_NPS_SCHD_IE }},
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/* sync<.rd|.wr> */
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{ "sync", 0x3e6f703f, 0xffffffbf, ARC_OPCODE_NPS400, CONTROL, NONE, { 0 }, { C_NPS_SYNC }},
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/* hwscd.off B */
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{ "hwschd", 0x386f00bf, 0xf8ff8fff, ARC_OPCODE_NPS400, CONTROL, NONE, { RB }, { C_NPS_HWS_OFF }},
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/* hwscd.restore 0,C */
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{ "hwschd", 0x3e6f7003, 0xfffff03f, ARC_OPCODE_NPS400, CONTROL, NONE, { ZA, RC }, { C_NPS_HWS_RESTORE }},
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@ -1003,6 +1003,37 @@ const struct arc_flag_operand arc_flag_operands[] =
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#define F_NPS_R (F_NPS_FLAG + 1)
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{ "r", 1, 1, 15, 1 },
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#define F_NPS_RW (F_NPS_R + 1)
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{ "rw", 0, 1, 7, 1 },
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#define F_NPS_RD (F_NPS_RW + 1)
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{ "rd", 1, 1, 7, 1 },
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#define F_NPS_WFT (F_NPS_RD + 1)
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{ "wft", 0, 0, 0, 1 },
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#define F_NPS_IE1 (F_NPS_WFT + 1)
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{ "ie1", 1, 2, 8, 1 },
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#define F_NPS_IE2 (F_NPS_IE1 + 1)
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{ "ie2", 2, 2, 8, 1 },
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#define F_NPS_IE12 (F_NPS_IE2 + 1)
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{ "ie12", 3, 2, 8, 1 },
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#define F_NPS_SYNC_RD (F_NPS_IE12 + 1)
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{ "rd", 0, 1, 6, 1 },
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#define F_NPS_SYNC_WR (F_NPS_SYNC_RD + 1)
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{ "wr", 1, 1, 6, 1 },
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#define F_NPS_HWS_OFF (F_NPS_SYNC_WR + 1)
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{ "off", 0, 0, 0, 1 },
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#define F_NPS_HWS_RESTORE (F_NPS_HWS_OFF + 1)
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{ "restore", 0, 0, 0, 1 },
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};
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const unsigned arc_num_flag_operands = ARRAY_SIZE (arc_flag_operands);
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@ -1084,6 +1115,25 @@ const struct arc_flag_class arc_flag_classes[] =
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#define C_NPS_R (C_NPS_F + 1)
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{ F_CLASS_OPTIONAL, { F_NPS_R, F_NULL}},
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#define C_NPS_SCHD_RW (C_NPS_R + 1)
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{ F_CLASS_REQUIRED, { F_NPS_RW, F_NPS_RD, F_NULL}},
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#define C_NPS_SCHD_TRIG (C_NPS_SCHD_RW + 1)
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{ F_CLASS_REQUIRED, { F_NPS_WFT, F_NULL}},
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#define C_NPS_SCHD_IE (C_NPS_SCHD_TRIG + 1)
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{ F_CLASS_OPTIONAL, { F_NPS_IE1, F_NPS_IE2, F_NPS_IE12, F_NULL}},
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#define C_NPS_SYNC (C_NPS_SCHD_IE + 1)
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{ F_CLASS_REQUIRED, { F_NPS_SYNC_RD, F_NPS_SYNC_WR, F_NULL}},
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#define C_NPS_HWS_OFF (C_NPS_SYNC + 1)
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{ F_CLASS_REQUIRED, { F_NPS_HWS_OFF, F_NULL}},
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#define C_NPS_HWS_RESTORE (C_NPS_HWS_OFF + 1)
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{ F_CLASS_REQUIRED, { F_NPS_HWS_RESTORE, F_NULL}},
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};
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/* The operands table.
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