Add .d8 suffix support to x86 assembler
gas/ 2012-01-20 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (_i386_insn): Replace disp32_encoding with disp_encoding. (md_assemble): Updated. (output_branch): Likewise. (parse_insn): Support .d8 suffix. (build_modrm_byte): Fake zero displacement for .d8 and .d32 suffixes. * doc/c-i386.texi: Document .d8 suffix. gas/testsuite/ 2012-01-20 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/disp32.s: Add tests for .d8 suffix. * gas/i386/x86-64-disp32.s: Likewise. * gas/i386/disp32.d: Updated. * gas/i386/x86-64-disp32.d: Likewise.
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@ -1,3 +1,15 @@
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2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (_i386_insn): Replace disp32_encoding with
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disp_encoding.
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(md_assemble): Updated.
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(output_branch): Likewise.
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(parse_insn): Support .d8 suffix.
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(build_modrm_byte): Fake zero displacement for .d8 and .d32
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suffixes.
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* doc/c-i386.texi: Document .d8 suffix.
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2012-01-17 Andrew Burgess <aburgess@broadcom.com>
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* write.c (fix_new_internal): Don't mark used parameter as unused.
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@ -280,8 +280,13 @@ struct _i386_insn
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/* Swap operand in encoding. */
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unsigned int swap_operand;
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/* Force 32bit displacement in encoding. */
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unsigned int disp32_encoding;
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/* Prefer 8bit or 32bit displacement in encoding. */
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enum
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{
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disp_encoding_default = 0,
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disp_encoding_8bit,
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disp_encoding_32bit
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} disp_encoding;
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/* Error message. */
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enum i386_error error;
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@ -3053,7 +3058,7 @@ md_assemble (char *line)
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/* Don't optimize displacement for movabs since it only takes 64bit
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displacement. */
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if (i.disp_operands
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&& !i.disp32_encoding
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&& i.disp_encoding != disp_encoding_32bit
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&& (flag_code != CODE_64BIT
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|| strcmp (mnemonic, "movabs") != 0))
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optimize_disp ();
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@ -3332,11 +3337,15 @@ parse_insn (char *line, char *mnemonic)
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encoding. */
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if (mnem_p - 2 == dot_p && dot_p[1] == 's')
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i.swap_operand = 1;
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else if (mnem_p - 3 == dot_p
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&& dot_p[1] == 'd'
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&& dot_p[2] == '8')
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i.disp_encoding = disp_encoding_8bit;
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else if (mnem_p - 4 == dot_p
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&& dot_p[1] == 'd'
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&& dot_p[2] == '3'
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&& dot_p[3] == '2')
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i.disp32_encoding = 1;
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i.disp_encoding = disp_encoding_32bit;
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else
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goto check_suffix;
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mnem_p = dot_p;
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@ -5698,7 +5707,19 @@ build_modrm_byte (void)
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|| i.reloc[op] == BFD_RELOC_X86_64_TLSDESC_CALL))
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i.rm.mode = 0;
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else
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i.rm.mode = mode_from_disp_size (i.types[op]);
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{
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if (!fake_zero_displacement
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&& !i.disp_operands
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&& i.disp_encoding)
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{
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fake_zero_displacement = 1;
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if (i.disp_encoding == disp_encoding_8bit)
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i.types[op].bitfield.disp8 = 1;
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else
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i.types[op].bitfield.disp32 = 1;
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}
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i.rm.mode = mode_from_disp_size (i.types[op]);
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}
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}
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if (fake_zero_displacement)
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@ -5900,7 +5921,7 @@ output_branch (void)
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offsetT off;
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code16 = flag_code == CODE_16BIT ? CODE16 : 0;
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size = i.disp32_encoding ? BIG : SMALL;
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size = i.disp_encoding == disp_encoding_32bit ? BIG : SMALL;
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prefix = 0;
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if (i.prefix[DATA_PREFIX] != 0)
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@ -440,8 +440,8 @@ quadruple word).
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Different encoding options can be specified via optional mnemonic
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suffix. @samp{.s} suffix swaps 2 register operands in encoding when
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moving from one register to another. @samp{.d32} suffix forces 32bit
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displacement in encoding.
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moving from one register to another. @samp{.d8} or @samp{.d32} suffix
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prefers 8bit or 32bit displacement in encoding.
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@cindex conversion instructions, i386
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@cindex i386 conversion instructions
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@ -1,3 +1,11 @@
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2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/disp32.s: Add tests for .d8 suffix.
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* gas/i386/x86-64-disp32.s: Likewise.
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* gas/i386/disp32.d: Updated.
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* gas/i386/x86-64-disp32.d: Likewise.
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2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
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* gas/m68k/pmove.s, gas/m68k/pmove.d: New test.
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@ -7,13 +7,24 @@
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Disassembly of section .text:
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0+ <.*>:
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0+ <foo-0x26>:
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[ ]*[a-f0-9]+: 8b 18 mov \(%eax\),%ebx
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[ ]*[a-f0-9]+: 8b 58 03 mov 0x3\(%eax\),%ebx
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[ ]*[a-f0-9]+: 8b 58 00 mov 0x0\(%eax\),%ebx
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[ ]*[a-f0-9]+: 8b 58 03 mov 0x3\(%eax\),%ebx
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[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%eax\),%ebx
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[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%eax\),%ebx
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[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%eax\),%ebx
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[ ]*[a-f0-9]+: eb 05 jmp 10 <foo>
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 10 <foo>
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[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
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[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 26 <foo>
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0+10 <foo>:
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0+26 <foo>:
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[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%eax\)
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[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
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[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%eax\)
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[ ]*[a-f0-9]+: 89 58 00 mov %ebx,0x0\(%eax\)
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[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
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[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%eax\)
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[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%eax\)
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#pass
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@ -1,11 +1,26 @@
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.text
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mov (%eax),%ebx
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mov 3(%eax),%ebx
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mov.d8 (%eax),%ebx
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mov.d8 3(%eax),%ebx
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mov.d8 0xfff(%eax),%ebx
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mov.d32 (%eax),%ebx
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mov.d32 3(%eax),%ebx
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jmp foo
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jmp.d8 foo
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jmp.d32 foo
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foo:
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.intel_syntax noprefix
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mov DWORD PTR [eax], ebx
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mov DWORD PTR [eax+3], ebx
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mov DWORD PTR [eax+0xfff], ebx
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mov.d8 DWORD PTR [eax], ebx
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mov.d8 DWORD PTR [eax+3], ebx
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mov.d32 DWORD PTR [eax], ebx
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mov.d32 DWORD PTR [eax+3], ebx
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@ -7,13 +7,24 @@
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Disassembly of section .text:
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0+ <.*>:
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0+ <foo-0x26>:
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[ ]*[a-f0-9]+: 8b 18 mov \(%rax\),%ebx
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[ ]*[a-f0-9]+: 8b 58 03 mov 0x3\(%rax\),%ebx
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[ ]*[a-f0-9]+: 8b 58 00 mov 0x0\(%rax\),%ebx
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[ ]*[a-f0-9]+: 8b 58 03 mov 0x3\(%rax\),%ebx
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[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%rax\),%ebx
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[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%rax\),%ebx
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[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%rax\),%ebx
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[ ]*[a-f0-9]+: eb 05 jmp 10 <foo>
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 10 <foo>
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[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
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[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 26 <foo>
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0+10 <foo>:
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0+26 <foo>:
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[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%rax\)
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[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
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[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%rax\)
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[ ]*[a-f0-9]+: 89 58 00 mov %ebx,0x0\(%rax\)
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[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
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[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%rax\)
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[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%rax\)
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#pass
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@ -1,11 +1,26 @@
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.text
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mov (%rax),%ebx
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mov 3(%rax),%ebx
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mov.d8 (%rax),%ebx
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mov.d8 3(%rax),%ebx
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mov.d8 0xfff(%rax),%ebx
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mov.d32 (%rax),%ebx
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mov.d32 3(%rax),%ebx
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jmp foo
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jmp.d8 foo
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jmp.d32 foo
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foo:
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.intel_syntax noprefix
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mov DWORD PTR [rax], ebx
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mov DWORD PTR [rax+3], ebx
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mov DWORD PTR [rax+0xfff], ebx
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mov.d8 DWORD PTR [rax], ebx
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mov.d8 DWORD PTR [rax+3], ebx
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mov.d32 DWORD PTR [rax], ebx
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mov.d32 DWORD PTR [rax+3], ebx
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