Add support for m32rx processor.

bfd/ChangeLog

@@ -1,3 +1,28 @@
+Mon Dec 15 15:01:15 1997  Nick Clifton  <nickc@cygnus.com>
+
+	* elf32-m32r.c (m32r_elf_object_p): New Function.
+	(m32r_elf_final_write_processing):  New Function.
+	(m32r_elf_set_private_flags):  New Function.
+	(m32r_elf_copy_private_bfd_data):  New Function.
+	(m32r_elf_merge_private_bfd_data):  New Function.
+	(m32r_elf_print_private_bfd_data):  New Function.
+	(elf_backend_object_p): Point to m32r_object_p.
+	(elf_backend_final_write_processing): Point to
+	m32r_elf_final_write_processing. 
+	(bfd_elf32_bfd_copy_private_bfd_data): Point to
+	m32r_elf_copy_private_bfd_data. 
+	(bfd_elf32_bfd_merge_private_bfd_data): Point to
+	m32r_elf_merge_private_bfd_data. 
+	(bfd_elf32_bfd_set_private_flags): Point to
+	m32r_elf_set_private_bfd_data. 
+	(bfd_elf32_bfd_print_private_bfd_data): Point to
+	m32r_elf_print_private_bfd_data. 
+
+	* cpu-m32r.c: Add m32rx cpu architecture.
+
+	* bfd-in2.h (bfd_mach_m32r, bfd_mach_m32rx): Add identifiers for
+	M32R and M32RX architecture machines.
+
 Fri Dec 12 11:30:28 1997  Brendan Kehoe  <brendan@canuck.cygnus.com>
 
 	* configure: Only build libbfd shared if --enable-shared's value

bfd/bfd-in2.h

@@ -1258,7 +1258,9 @@ enum bfd_architecture
   /* end-sanitize-v850e */
   bfd_arch_arc,        /* Argonaut RISC Core */
 #define bfd_mach_arc_base 0
-  bfd_arch_m32r,       /* Mitsubishi M32R/D */
+  bfd_arch_m32r,       /* Mitsubishi M32R/D/X */
+#define bfd_mach_m32r		0 /* backwards compatibility */
+#define bfd_mach_m32rx		'x'
   bfd_arch_mn10200,    /* Matsushita MN10200 */
   bfd_arch_mn10300,    /* Matsushita MN10300 */
   bfd_arch_last

bfd/cpu-m32r.c

@@ -21,18 +21,13 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 #include "sysdep.h"
 #include "libbfd.h"
 
-const bfd_arch_info_type bfd_m32r_arch =
+#define N(number, print, default, next)  \
+{  32, 32, 8, bfd_arch_m32r, number, "m32r", print, 4, default, bfd_default_compatible, bfd_default_scan, next }
+
+static const bfd_arch_info_type arch_info_struct[2] = 
 {
-    32,	/* bits in a word */
-    32,	/* bits in an address */
-    8,	/* bits in a byte */
-    bfd_arch_m32r,
-    0,
-    "d10v",
-    "d10v",
-    4, /* section alignment power */
-    true, /* the default */
-    bfd_default_compatible,
-    bfd_default_scan,
-    0
+  N( bfd_mach_m32rx, "m32rx", false, NULL ),
 };
+
+const bfd_arch_info_type bfd_m32r_arch =
+  N( bfd_mach_m32r, "m32r", true, & arch_info_struct[0] );

include/elf/ChangeLog

@@ -1,3 +1,8 @@
+Mon Dec 15 15:07:49 1997  Nick Clifton  <nickc@cygnus.com>
+
+	* m32r.h (EF_M32R_ARCH, E_M32R_ARCH, E_M32RX_ARCH): New flags to
+	specify machine architecture.
+
 Fri Dec  5 11:20:08 1997  Nick Clifton  <nickc@cygnus.com>
 
 	* v850.h: New constants: SHN_V850_SCOMMON, SHN_V850_TCOMMON,

include/elf/m32r.h

@@ -0,0 +1,64 @@
+/* M32R ELF support for BFD.
+   Copyright (C) 1996, 1997 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef _ELF_M32R_H
+#define _ELF_M32R_H
+
+enum reloc_type
+{
+  R_M32R_NONE = 0,
+  R_M32R_16,
+  R_M32R_32,
+  R_M32R_24,
+  R_M32R_10_PCREL,
+  R_M32R_18_PCREL,
+  R_M32R_26_PCREL,
+  R_M32R_HI16_ULO,
+  R_M32R_HI16_SLO,
+  R_M32R_LO16,
+  R_M32R_SDA16,
+  R_M32R_max
+};
+
+/* Processor specific section indices.  These sections do not actually
+   exist.  Symbols with a st_shndx field corresponding to one of these
+   values have a special meaning.  */
+
+/* Small common symbol.  */
+#define SHN_M32R_SCOMMON	0xff00
+
+/* Processor specific section flags.  */
+
+/* This section contains sufficient relocs to be relaxed.
+   When relaxing, even relocs of branch instructions the assembler could
+   complete must be present because relaxing may cause the branch target to
+   move.  */
+#define SHF_M32R_CAN_RELAX	0x10000000
+
+/* Processor specific flags for the ELF header e_flags field.  */
+
+/* Two bit V850 architecture field.  */
+#define EF_M32R_ARCH		0x30000000
+
+/* m32r code.  */
+#define E_M32R_ARCH		0x00000000
+/* m32rx code.  */
+#define E_M32RX_ARCH		0x10000000
+
+#endif