[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling
bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
This commit is contained in:
Yufeng Zhang
parent
cec5225bd8
commit
a6bb11b2df
@ -1,3 +1,56 @@
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2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
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* bfd-in2.h: Re-generated.
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* elfnn-aarch64.c (HOWTO64, HOWTO32): New define.
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(IS_AARCH64_TLS_RELOC): Change to be based on the
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bfd reloc enumerators.
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(IS_AARCH64_TLSDESC_RELOC): Likewise.
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(PG, PG_OFFSET): Cast literal to bfd_vma.
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(elf64_aarch64_howto_table): Removed.
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(elf64_aarch64_howto_dynrelocs): Removed.
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(elf64_aarch64_tls_howto_table): Removed.
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(elf64_aarch64_tlsdesc_howto_table): Removed.
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(elfNN_aarch64_howto_table): New table to host all howto entires..
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(R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*).
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(elfNN_aarch64_bfd_reloc_from_howto): New function.
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(elfNN_aarch64_bfd_reloc_from_type): Ditto.
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(struct elf_aarch64_reloc_map): New.
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(elf_aarch64_reloc_map): New table.
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(elfNN_aarch64_howto_from_bfd_reloc): New function.
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(elfNN_aarch64_howto_from_type): Update to look up the new table
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elfNN_aarch64_howto_table.
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(struct elf64_aarch64_reloc_map): Remove.
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(elf64_aarch64_reloc_map): Remove.
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(elfNN_aarch64_reloc_type_lookup): Change to call
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elfNN_aarch64_howto_from_bfd_reloc.
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(elfNN_aarch64_reloc_name_lookup): Change to look up the new table
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elfNN_aarch64_howto_table.
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(aarch64_resolve_relocation): Refactor to switch on the bfd
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reloc enumerators.
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(bfd_elf_aarch64_put_addend): Likewise.
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(elfNN_aarch64_final_link_relocate): Likewise.
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(aarch64_tls_transition_without_check): Likewise.
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(aarch64_reloc_got_type): Likewise.
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(aarch64_can_relax_tls): Likewise.
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(aarch64_tls_transition): Likewise.
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(elfNN_aarch64_tls_relax): Likewise.
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(elfNN_aarch64_final_link_relocate): Likewise.
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(elfNN_aarch64_relocate_section): Likewise.
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(elfNN_aarch64_gc_sweep_hook): Likewise.
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(elfNN_aarch64_check_relocs): Likewise.
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(aarch64_tls_transition): Change to return a bfd reloc enumerator.
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* libbfd.h: Re-generated.
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* reloc.c: Re-order the AArch64 bfd reloc enumerators.
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(BFD_RELOC_AARCH64_RELOC_START)
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(BFD_RELOC_AARCH64_RELOC_END)
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(BFD_RELOC_AARCH64_LD_GOT_LO12_NC)
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(BFD_RELOC_AARCH64_LD32_GOT_LO12_NC)
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(BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC)
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(BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC)
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(BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC)
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(BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC)
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(BFD_RELOC_AARCH64_IRELATIVE): New relocs.
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2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
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* Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo.
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351
bfd/bfd-in2.h
351
bfd/bfd-in2.h
@ -5240,21 +5240,78 @@ to two words (uses imm instruction). */
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to two words (uses imm instruction). */
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BFD_RELOC_MICROBLAZE_64_TLSTPREL,
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/* AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
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Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */
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BFD_RELOC_AARCH64_ADD_LO12,
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/* AArch64 pseudo relocation code to mark the start of the AArch64
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relocation enumerators. N.B. the order of the enumerators is
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important as several tables in the AArch64 bfd backend are indexed
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by these enumerators; make sure they are all synced. */
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BFD_RELOC_AARCH64_RELOC_START,
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/* AArch64 Load Literal instruction, holding a 19 bit PC relative word
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offset of the global offset table entry for a symbol. The lowest two
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bits must be zero and are not stored in the instruction, giving a 21
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bit signed byte offset. This relocation type requires signed overflow
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checking. */
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BFD_RELOC_AARCH64_GOT_LD_PREL19,
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/* AArch64 null relocation code. */
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BFD_RELOC_AARCH64_NONE,
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/* Get to the page base of the global offset table entry for a symbol as
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part of an ADRP instruction using a 21 bit PC relative value.Used in
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conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC. */
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BFD_RELOC_AARCH64_ADR_GOT_PAGE,
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/* Basic absolute relocations of N bits. These are equivalent to
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BFD_RELOC_N and they were added to assist the indexing of the howto
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table. */
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BFD_RELOC_AARCH64_64,
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BFD_RELOC_AARCH64_32,
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BFD_RELOC_AARCH64_16,
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/* PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
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and they were added to assist the indexing of the howto table. */
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BFD_RELOC_AARCH64_64_PCREL,
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BFD_RELOC_AARCH64_32_PCREL,
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BFD_RELOC_AARCH64_16_PCREL,
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/* AArch64 MOV[NZK] instruction with most significant bits 0 to 15
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of an unsigned address/value. */
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BFD_RELOC_AARCH64_MOVW_G0,
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/* AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
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an address/value. No overflow checking. */
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BFD_RELOC_AARCH64_MOVW_G0_NC,
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/* AArch64 MOV[NZK] instruction with most significant bits 16 to 31
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of an unsigned address/value. */
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BFD_RELOC_AARCH64_MOVW_G1,
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/* AArch64 MOV[NZK] instruction with less significant bits 16 to 31
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of an address/value. No overflow checking. */
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BFD_RELOC_AARCH64_MOVW_G1_NC,
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/* AArch64 MOV[NZK] instruction with most significant bits 32 to 47
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of an unsigned address/value. */
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BFD_RELOC_AARCH64_MOVW_G2,
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/* AArch64 MOV[NZK] instruction with less significant bits 32 to 47
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of an address/value. No overflow checking. */
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BFD_RELOC_AARCH64_MOVW_G2_NC,
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/* AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
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of a signed or unsigned address/value. */
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BFD_RELOC_AARCH64_MOVW_G3,
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/* AArch64 MOV[NZ] instruction with most significant bits 0 to 15
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of a signed value. Changes instruction to MOVZ or MOVN depending on the
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value's sign. */
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BFD_RELOC_AARCH64_MOVW_G0_S,
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/* AArch64 MOV[NZ] instruction with most significant bits 16 to 31
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of a signed value. Changes instruction to MOVZ or MOVN depending on the
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value's sign. */
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BFD_RELOC_AARCH64_MOVW_G1_S,
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/* AArch64 MOV[NZ] instruction with most significant bits 32 to 47
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of a signed value. Changes instruction to MOVZ or MOVN depending on the
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value's sign. */
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BFD_RELOC_AARCH64_MOVW_G2_S,
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/* AArch64 Load Literal instruction, holding a 19 bit pc-relative word
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offset. The lowest two bits must be zero and are not stored in the
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instruction, giving a 21 bit signed byte offset. */
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BFD_RELOC_AARCH64_LD_LO19_PCREL,
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/* AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset. */
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BFD_RELOC_AARCH64_ADR_LO21_PCREL,
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/* AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
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offset, giving a 4KB aligned page base address. */
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@ -5265,45 +5322,33 @@ offset, giving a 4KB aligned page base address, but with no overflow
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checking. */
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BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL,
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/* AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset. */
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BFD_RELOC_AARCH64_ADR_LO21_PCREL,
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/* AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
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Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */
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BFD_RELOC_AARCH64_ADD_LO12,
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/* AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
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address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */
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BFD_RELOC_AARCH64_LDST8_LO12,
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/* AArch64 14 bit pc-relative test bit and branch.
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The lowest two bits must be zero and are not stored in the instruction,
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giving a 16 bit signed byte offset. */
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BFD_RELOC_AARCH64_TSTBR14,
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/* AArch64 19 bit pc-relative conditional branch and compare & branch.
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The lowest two bits must be zero and are not stored in the instruction,
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giving a 21 bit signed byte offset. */
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BFD_RELOC_AARCH64_BRANCH19,
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/* AArch64 26 bit pc-relative unconditional branch and link.
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The lowest two bits must be zero and are not stored in the instruction,
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giving a 28 bit signed byte offset. */
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BFD_RELOC_AARCH64_CALL26,
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/* AArch64 pseudo relocation code to be used internally by the AArch64
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assembler and not (currently) written to any object files. */
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BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP,
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/* AArch64 26 bit pc-relative unconditional branch.
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The lowest two bits must be zero and are not stored in the instruction,
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giving a 28 bit signed byte offset. */
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BFD_RELOC_AARCH64_JUMP26,
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/* AArch64 Load Literal instruction, holding a 19 bit pc-relative word
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offset. The lowest two bits must be zero and are not stored in the
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instruction, giving a 21 bit signed byte offset. */
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BFD_RELOC_AARCH64_LD_LO19_PCREL,
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/* Unsigned 12 bit byte offset for 64 bit load/store from the page of
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the GOT entry for this symbol. Used in conjunction with
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BFD_RELOC_AARCH64_ADR_GOTPAGE. */
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BFD_RELOC_AARCH64_LD64_GOT_LO12_NC,
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/* AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
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address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */
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BFD_RELOC_AARCH64_LDST_LO12,
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/* AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
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address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */
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BFD_RELOC_AARCH64_LDST8_LO12,
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/* AArch64 26 bit pc-relative unconditional branch and link.
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The lowest two bits must be zero and are not stored in the instruction,
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giving a 28 bit signed byte offset. */
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BFD_RELOC_AARCH64_CALL26,
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/* AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
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address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */
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@ -5321,86 +5366,27 @@ address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */
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address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */
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BFD_RELOC_AARCH64_LDST128_LO12,
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/* AArch64 MOV[NZK] instruction with most significant bits 0 to 15
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of an unsigned address/value. */
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BFD_RELOC_AARCH64_MOVW_G0,
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/* AArch64 Load Literal instruction, holding a 19 bit PC relative word
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offset of the global offset table entry for a symbol. The lowest two
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bits must be zero and are not stored in the instruction, giving a 21
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bit signed byte offset. This relocation type requires signed overflow
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checking. */
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BFD_RELOC_AARCH64_GOT_LD_PREL19,
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/* AArch64 MOV[NZ] instruction with most significant bits 0 to 15
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of a signed value. Changes instruction to MOVZ or MOVN depending on the
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value's sign. */
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BFD_RELOC_AARCH64_MOVW_G0_S,
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/* Get to the page base of the global offset table entry for a symbol as
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part of an ADRP instruction using a 21 bit PC relative value.Used in
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conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC. */
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BFD_RELOC_AARCH64_ADR_GOT_PAGE,
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/* AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
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an address/value. No overflow checking. */
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BFD_RELOC_AARCH64_MOVW_G0_NC,
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/* Unsigned 12 bit byte offset for 64 bit load/store from the page of
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the GOT entry for this symbol. Used in conjunction with
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BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in LP64 ABI only. */
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BFD_RELOC_AARCH64_LD64_GOT_LO12_NC,
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/* AArch64 MOV[NZK] instruction with most significant bits 16 to 31
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of an unsigned address/value. */
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BFD_RELOC_AARCH64_MOVW_G1,
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/* AArch64 MOV[NZK] instruction with less significant bits 16 to 31
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of an address/value. No overflow checking. */
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BFD_RELOC_AARCH64_MOVW_G1_NC,
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/* AArch64 MOV[NZ] instruction with most significant bits 16 to 31
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of a signed value. Changes instruction to MOVZ or MOVN depending on the
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value's sign. */
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BFD_RELOC_AARCH64_MOVW_G1_S,
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/* AArch64 MOV[NZK] instruction with most significant bits 32 to 47
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of an unsigned address/value. */
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BFD_RELOC_AARCH64_MOVW_G2,
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/* AArch64 MOV[NZK] instruction with less significant bits 32 to 47
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of an address/value. No overflow checking. */
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BFD_RELOC_AARCH64_MOVW_G2_NC,
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/* AArch64 MOV[NZ] instruction with most significant bits 32 to 47
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of a signed value. Changes instruction to MOVZ or MOVN depending on the
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value's sign. */
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BFD_RELOC_AARCH64_MOVW_G2_S,
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/* AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
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of a signed or unsigned address/value. */
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BFD_RELOC_AARCH64_MOVW_G3,
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/* AArch64 TLS relocation. */
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BFD_RELOC_AARCH64_TLSDESC,
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/* AArch64 TLS DESC relocation. */
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BFD_RELOC_AARCH64_TLSDESC_ADD,
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/* AArch64 TLS DESC relocation. */
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BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC,
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/* AArch64 TLS DESC relocation. */
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BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21,
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/* AArch64 TLS DESC relocation. */
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BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21,
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/* AArch64 TLS DESC relocation. */
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BFD_RELOC_AARCH64_TLSDESC_CALL,
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/* AArch64 TLS DESC relocation. */
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BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC,
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/* AArch64 TLS DESC relocation. */
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BFD_RELOC_AARCH64_TLSDESC_LD_PREL19,
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/* AArch64 TLS DESC relocation. */
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BFD_RELOC_AARCH64_TLSDESC_LDR,
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/* AArch64 TLS DESC relocation. */
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BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC,
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/* AArch64 TLS DESC relocation. */
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BFD_RELOC_AARCH64_TLSDESC_OFF_G1,
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/* Unsigned 12 bit byte offset to global offset table entry for a symbols
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tls_index structure. Used in conjunction with
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BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */
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BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC,
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/* Unsigned 12 bit byte offset for 32 bit load/store from the page of
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the GOT entry for this symbol. Used in conjunction with
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||||
BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in ILP32 ABI only. */
|
||||
BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
|
||||
|
||||
/* Get to the page base of the global offset table entry for a symbols
|
||||
tls_index structure as part of an adrp instruction using a 21 bit PC
|
||||
@ -5408,20 +5394,43 @@ relative value. Used in conjunction with
|
||||
BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC. */
|
||||
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21,
|
||||
|
||||
/* AArch64 TLS INITIAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21,
|
||||
/* Unsigned 12 bit byte offset to global offset table entry for a symbols
|
||||
tls_index structure. Used in conjunction with
|
||||
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */
|
||||
BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC,
|
||||
|
||||
/* AArch64 TLS INITIAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19,
|
||||
|
||||
/* AArch64 TLS INITIAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC,
|
||||
BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1,
|
||||
|
||||
/* AArch64 TLS INITIAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC,
|
||||
|
||||
/* AArch64 TLS INITIAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1,
|
||||
BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21,
|
||||
|
||||
/* AArch64 TLS INITIAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC,
|
||||
|
||||
/* AArch64 TLS INITIAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC,
|
||||
|
||||
/* AArch64 TLS INITIAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12,
|
||||
@ -5432,34 +5441,92 @@ BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC. */
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0,
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD_PREL19,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC,
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1,
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC,
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC,
|
||||
|
||||
/* AArch64 TLS LOCAL EXEC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2,
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
|
||||
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC,
|
||||
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_OFF_G1,
|
||||
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC,
|
||||
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_LDR,
|
||||
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADD,
|
||||
|
||||
/* AArch64 TLS DESC relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_CALL,
|
||||
|
||||
/* AArch64 TLS relocation. */
|
||||
BFD_RELOC_AARCH64_TLS_DTPMOD64,
|
||||
BFD_RELOC_AARCH64_COPY,
|
||||
|
||||
/* AArch64 TLS relocation. */
|
||||
BFD_RELOC_AARCH64_TLS_DTPREL64,
|
||||
BFD_RELOC_AARCH64_GLOB_DAT,
|
||||
|
||||
/* AArch64 TLS relocation. */
|
||||
BFD_RELOC_AARCH64_TLS_TPREL64,
|
||||
BFD_RELOC_AARCH64_JUMP_SLOT,
|
||||
|
||||
/* AArch64 14 bit pc-relative test bit and branch.
|
||||
The lowest two bits must be zero and are not stored in the instruction,
|
||||
giving a 16 bit signed byte offset. */
|
||||
BFD_RELOC_AARCH64_TSTBR14,
|
||||
/* AArch64 TLS relocation. */
|
||||
BFD_RELOC_AARCH64_RELATIVE,
|
||||
|
||||
/* AArch64 TLS relocation. */
|
||||
BFD_RELOC_AARCH64_TLS_DTPMOD,
|
||||
|
||||
/* AArch64 TLS relocation. */
|
||||
BFD_RELOC_AARCH64_TLS_DTPREL,
|
||||
|
||||
/* AArch64 TLS relocation. */
|
||||
BFD_RELOC_AARCH64_TLS_TPREL,
|
||||
|
||||
/* AArch64 TLS relocation. */
|
||||
BFD_RELOC_AARCH64_TLSDESC,
|
||||
|
||||
/* AArch64 support for STT_GNU_IFUNC. */
|
||||
BFD_RELOC_AARCH64_IRELATIVE,
|
||||
|
||||
/* AArch64 pseudo relocation code to mark the end of the AArch64
|
||||
relocation enumerators that have direct mapping to ELF reloc codes.
|
||||
There are a few more enumerators after this one; those are mainly
|
||||
used by the AArch64 assembler for the internal fixup or to select
|
||||
one of the above enumerators. */
|
||||
BFD_RELOC_AARCH64_RELOC_END,
|
||||
|
||||
/* AArch64 pseudo relocation code to be used internally by the AArch64
|
||||
assembler and not (currently) written to any object files. */
|
||||
BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP,
|
||||
|
||||
/* AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
|
||||
address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */
|
||||
BFD_RELOC_AARCH64_LDST_LO12,
|
||||
|
||||
/* AArch64 pseudo relocation code to be used internally by the AArch64
|
||||
assembler and not (currently) written to any object files. */
|
||||
BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
|
||||
|
||||
/* AArch64 pseudo relocation code to be used internally by the AArch64
|
||||
assembler and not (currently) written to any object files. */
|
||||
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC,
|
||||
|
||||
/* AArch64 pseudo relocation code to be used internally by the AArch64
|
||||
assembler and not (currently) written to any object files. */
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
|
||||
|
||||
/* Tilera TILEPro Relocations. */
|
||||
BFD_RELOC_TILEPRO_COPY,
|
||||
|
||||
3113
bfd/elfnn-aarch64.c
3113
bfd/elfnn-aarch64.c
File diff suppressed because it is too large
Load Diff
112
bfd/libbfd.h
112
bfd/libbfd.h
@ -2524,64 +2524,84 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
|
||||
"BFD_RELOC_MICROBLAZE_64_TLSDTPREL",
|
||||
"BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL",
|
||||
"BFD_RELOC_MICROBLAZE_64_TLSTPREL",
|
||||
"BFD_RELOC_AARCH64_ADD_LO12",
|
||||
"BFD_RELOC_AARCH64_GOT_LD_PREL19",
|
||||
"BFD_RELOC_AARCH64_ADR_GOT_PAGE",
|
||||
"BFD_RELOC_AARCH64_RELOC_START",
|
||||
"BFD_RELOC_AARCH64_NONE",
|
||||
"BFD_RELOC_AARCH64_64",
|
||||
"BFD_RELOC_AARCH64_32",
|
||||
"BFD_RELOC_AARCH64_16",
|
||||
"BFD_RELOC_AARCH64_64_PCREL",
|
||||
"BFD_RELOC_AARCH64_32_PCREL",
|
||||
"BFD_RELOC_AARCH64_16_PCREL",
|
||||
"BFD_RELOC_AARCH64_MOVW_G0",
|
||||
"BFD_RELOC_AARCH64_MOVW_G0_NC",
|
||||
"BFD_RELOC_AARCH64_MOVW_G1",
|
||||
"BFD_RELOC_AARCH64_MOVW_G1_NC",
|
||||
"BFD_RELOC_AARCH64_MOVW_G2",
|
||||
"BFD_RELOC_AARCH64_MOVW_G2_NC",
|
||||
"BFD_RELOC_AARCH64_MOVW_G3",
|
||||
"BFD_RELOC_AARCH64_MOVW_G0_S",
|
||||
"BFD_RELOC_AARCH64_MOVW_G1_S",
|
||||
"BFD_RELOC_AARCH64_MOVW_G2_S",
|
||||
"BFD_RELOC_AARCH64_LD_LO19_PCREL",
|
||||
"BFD_RELOC_AARCH64_ADR_LO21_PCREL",
|
||||
"BFD_RELOC_AARCH64_ADR_HI21_PCREL",
|
||||
"BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL",
|
||||
"BFD_RELOC_AARCH64_ADR_LO21_PCREL",
|
||||
"BFD_RELOC_AARCH64_BRANCH19",
|
||||
"BFD_RELOC_AARCH64_CALL26",
|
||||
"BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP",
|
||||
"BFD_RELOC_AARCH64_JUMP26",
|
||||
"BFD_RELOC_AARCH64_LD_LO19_PCREL",
|
||||
"BFD_RELOC_AARCH64_LD64_GOT_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_LDST_LO12",
|
||||
"BFD_RELOC_AARCH64_ADD_LO12",
|
||||
"BFD_RELOC_AARCH64_LDST8_LO12",
|
||||
"BFD_RELOC_AARCH64_TSTBR14",
|
||||
"BFD_RELOC_AARCH64_BRANCH19",
|
||||
"BFD_RELOC_AARCH64_JUMP26",
|
||||
"BFD_RELOC_AARCH64_CALL26",
|
||||
"BFD_RELOC_AARCH64_LDST16_LO12",
|
||||
"BFD_RELOC_AARCH64_LDST32_LO12",
|
||||
"BFD_RELOC_AARCH64_LDST64_LO12",
|
||||
"BFD_RELOC_AARCH64_LDST128_LO12",
|
||||
"BFD_RELOC_AARCH64_MOVW_G0",
|
||||
"BFD_RELOC_AARCH64_MOVW_G0_S",
|
||||
"BFD_RELOC_AARCH64_MOVW_G0_NC",
|
||||
"BFD_RELOC_AARCH64_MOVW_G1",
|
||||
"BFD_RELOC_AARCH64_MOVW_G1_NC",
|
||||
"BFD_RELOC_AARCH64_MOVW_G1_S",
|
||||
"BFD_RELOC_AARCH64_MOVW_G2",
|
||||
"BFD_RELOC_AARCH64_MOVW_G2_NC",
|
||||
"BFD_RELOC_AARCH64_MOVW_G2_S",
|
||||
"BFD_RELOC_AARCH64_MOVW_G3",
|
||||
"BFD_RELOC_AARCH64_TLSDESC",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_ADD",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_CALL",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_LD_PREL19",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_LDR",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_OFF_G1",
|
||||
"BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_GOT_LD_PREL19",
|
||||
"BFD_RELOC_AARCH64_ADR_GOT_PAGE",
|
||||
"BFD_RELOC_AARCH64_LD64_GOT_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_LD32_GOT_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21",
|
||||
"BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21",
|
||||
"BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19",
|
||||
"BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC",
|
||||
"BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1",
|
||||
"BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC",
|
||||
"BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21",
|
||||
"BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19",
|
||||
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2",
|
||||
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1",
|
||||
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC",
|
||||
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0",
|
||||
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC",
|
||||
"BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12",
|
||||
"BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12",
|
||||
"BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0",
|
||||
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC",
|
||||
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1",
|
||||
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC",
|
||||
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2",
|
||||
"BFD_RELOC_AARCH64_TLS_DTPMOD64",
|
||||
"BFD_RELOC_AARCH64_TLS_DTPREL64",
|
||||
"BFD_RELOC_AARCH64_TLS_TPREL64",
|
||||
"BFD_RELOC_AARCH64_TSTBR14",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_LD_PREL19",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_OFF_G1",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_LDR",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_ADD",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_CALL",
|
||||
"BFD_RELOC_AARCH64_COPY",
|
||||
"BFD_RELOC_AARCH64_GLOB_DAT",
|
||||
"BFD_RELOC_AARCH64_JUMP_SLOT",
|
||||
"BFD_RELOC_AARCH64_RELATIVE",
|
||||
"BFD_RELOC_AARCH64_TLS_DTPMOD",
|
||||
"BFD_RELOC_AARCH64_TLS_DTPREL",
|
||||
"BFD_RELOC_AARCH64_TLS_TPREL",
|
||||
"BFD_RELOC_AARCH64_TLSDESC",
|
||||
"BFD_RELOC_AARCH64_IRELATIVE",
|
||||
"BFD_RELOC_AARCH64_RELOC_END",
|
||||
"BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP",
|
||||
"BFD_RELOC_AARCH64_LDST_LO12",
|
||||
"BFD_RELOC_AARCH64_LD_GOT_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC",
|
||||
"BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC",
|
||||
"BFD_RELOC_TILEPRO_COPY",
|
||||
"BFD_RELOC_TILEPRO_GLOB_DAT",
|
||||
"BFD_RELOC_TILEPRO_JMP_SLOT",
|
||||
|
||||
419
bfd/reloc.c
419
bfd/reloc.c
@ -6113,24 +6113,98 @@ ENUMDOC
|
||||
to two words (uses imm instruction).
|
||||
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_ADD_LO12
|
||||
BFD_RELOC_AARCH64_RELOC_START
|
||||
ENUMDOC
|
||||
AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
|
||||
Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
|
||||
AArch64 pseudo relocation code to mark the start of the AArch64
|
||||
relocation enumerators. N.B. the order of the enumerators is
|
||||
important as several tables in the AArch64 bfd backend are indexed
|
||||
by these enumerators; make sure they are all synced.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_GOT_LD_PREL19
|
||||
BFD_RELOC_AARCH64_NONE
|
||||
ENUMDOC
|
||||
AArch64 Load Literal instruction, holding a 19 bit PC relative word
|
||||
offset of the global offset table entry for a symbol. The lowest two
|
||||
bits must be zero and are not stored in the instruction, giving a 21
|
||||
bit signed byte offset. This relocation type requires signed overflow
|
||||
checking.
|
||||
AArch64 null relocation code.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_ADR_GOT_PAGE
|
||||
BFD_RELOC_AARCH64_64
|
||||
ENUMX
|
||||
BFD_RELOC_AARCH64_32
|
||||
ENUMX
|
||||
BFD_RELOC_AARCH64_16
|
||||
ENUMDOC
|
||||
Get to the page base of the global offset table entry for a symbol as
|
||||
part of an ADRP instruction using a 21 bit PC relative value.Used in
|
||||
conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
|
||||
Basic absolute relocations of N bits. These are equivalent to
|
||||
BFD_RELOC_N and they were added to assist the indexing of the howto
|
||||
table.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_64_PCREL
|
||||
ENUMX
|
||||
BFD_RELOC_AARCH64_32_PCREL
|
||||
ENUMX
|
||||
BFD_RELOC_AARCH64_16_PCREL
|
||||
ENUMDOC
|
||||
PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
|
||||
and they were added to assist the indexing of the howto table.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G0
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with most significant bits 0 to 15
|
||||
of an unsigned address/value.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G0_NC
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
|
||||
an address/value. No overflow checking.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G1
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with most significant bits 16 to 31
|
||||
of an unsigned address/value.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G1_NC
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with less significant bits 16 to 31
|
||||
of an address/value. No overflow checking.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G2
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with most significant bits 32 to 47
|
||||
of an unsigned address/value.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G2_NC
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with less significant bits 32 to 47
|
||||
of an address/value. No overflow checking.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G3
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
|
||||
of a signed or unsigned address/value.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G0_S
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZ] instruction with most significant bits 0 to 15
|
||||
of a signed value. Changes instruction to MOVZ or MOVN depending on the
|
||||
value's sign.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G1_S
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZ] instruction with most significant bits 16 to 31
|
||||
of a signed value. Changes instruction to MOVZ or MOVN depending on the
|
||||
value's sign.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G2_S
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZ] instruction with most significant bits 32 to 47
|
||||
of a signed value. Changes instruction to MOVZ or MOVN depending on the
|
||||
value's sign.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_LD_LO19_PCREL
|
||||
ENUMDOC
|
||||
AArch64 Load Literal instruction, holding a 19 bit pc-relative word
|
||||
offset. The lowest two bits must be zero and are not stored in the
|
||||
instruction, giving a 21 bit signed byte offset.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_ADR_LO21_PCREL
|
||||
ENUMDOC
|
||||
AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_ADR_HI21_PCREL
|
||||
ENUMDOC
|
||||
@ -6143,26 +6217,27 @@ ENUMDOC
|
||||
offset, giving a 4KB aligned page base address, but with no overflow
|
||||
checking.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_ADR_LO21_PCREL
|
||||
BFD_RELOC_AARCH64_ADD_LO12
|
||||
ENUMDOC
|
||||
AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
|
||||
AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
|
||||
Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_LDST8_LO12
|
||||
ENUMDOC
|
||||
AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
|
||||
address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TSTBR14
|
||||
ENUMDOC
|
||||
AArch64 14 bit pc-relative test bit and branch.
|
||||
The lowest two bits must be zero and are not stored in the instruction,
|
||||
giving a 16 bit signed byte offset.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_BRANCH19
|
||||
ENUMDOC
|
||||
AArch64 19 bit pc-relative conditional branch and compare & branch.
|
||||
The lowest two bits must be zero and are not stored in the instruction,
|
||||
giving a 21 bit signed byte offset.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_CALL26
|
||||
ENUMDOC
|
||||
AArch64 26 bit pc-relative unconditional branch and link.
|
||||
The lowest two bits must be zero and are not stored in the instruction,
|
||||
giving a 28 bit signed byte offset.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
|
||||
ENUMDOC
|
||||
AArch64 pseudo relocation code to be used internally by the AArch64
|
||||
assembler and not (currently) written to any object files.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_JUMP26
|
||||
ENUMDOC
|
||||
@ -6170,27 +6245,11 @@ ENUMDOC
|
||||
The lowest two bits must be zero and are not stored in the instruction,
|
||||
giving a 28 bit signed byte offset.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_LD_LO19_PCREL
|
||||
BFD_RELOC_AARCH64_CALL26
|
||||
ENUMDOC
|
||||
AArch64 Load Literal instruction, holding a 19 bit pc-relative word
|
||||
offset. The lowest two bits must be zero and are not stored in the
|
||||
instruction, giving a 21 bit signed byte offset.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
|
||||
ENUMDOC
|
||||
Unsigned 12 bit byte offset for 64 bit load/store from the page of
|
||||
the GOT entry for this symbol. Used in conjunction with
|
||||
BFD_RELOC_AARCH64_ADR_GOTPAGE.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_LDST_LO12
|
||||
ENUMDOC
|
||||
AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
|
||||
address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_LDST8_LO12
|
||||
ENUMDOC
|
||||
AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
|
||||
address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
|
||||
AArch64 26 bit pc-relative unconditional branch and link.
|
||||
The lowest two bits must be zero and are not stored in the instruction,
|
||||
giving a 28 bit signed byte offset.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_LDST16_LO12
|
||||
ENUMDOC
|
||||
@ -6212,108 +6271,31 @@ ENUMDOC
|
||||
AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
|
||||
address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G0
|
||||
BFD_RELOC_AARCH64_GOT_LD_PREL19
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with most significant bits 0 to 15
|
||||
of an unsigned address/value.
|
||||
AArch64 Load Literal instruction, holding a 19 bit PC relative word
|
||||
offset of the global offset table entry for a symbol. The lowest two
|
||||
bits must be zero and are not stored in the instruction, giving a 21
|
||||
bit signed byte offset. This relocation type requires signed overflow
|
||||
checking.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G0_S
|
||||
BFD_RELOC_AARCH64_ADR_GOT_PAGE
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZ] instruction with most significant bits 0 to 15
|
||||
of a signed value. Changes instruction to MOVZ or MOVN depending on the
|
||||
value's sign.
|
||||
Get to the page base of the global offset table entry for a symbol as
|
||||
part of an ADRP instruction using a 21 bit PC relative value.Used in
|
||||
conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G0_NC
|
||||
BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
|
||||
an address/value. No overflow checking.
|
||||
Unsigned 12 bit byte offset for 64 bit load/store from the page of
|
||||
the GOT entry for this symbol. Used in conjunction with
|
||||
BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in LP64 ABI only.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G1
|
||||
BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with most significant bits 16 to 31
|
||||
of an unsigned address/value.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G1_NC
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with less significant bits 16 to 31
|
||||
of an address/value. No overflow checking.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G1_S
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZ] instruction with most significant bits 16 to 31
|
||||
of a signed value. Changes instruction to MOVZ or MOVN depending on the
|
||||
value's sign.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G2
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with most significant bits 32 to 47
|
||||
of an unsigned address/value.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G2_NC
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with less significant bits 32 to 47
|
||||
of an address/value. No overflow checking.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G2_S
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZ] instruction with most significant bits 32 to 47
|
||||
of a signed value. Changes instruction to MOVZ or MOVN depending on the
|
||||
value's sign.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_MOVW_G3
|
||||
ENUMDOC
|
||||
AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
|
||||
of a signed or unsigned address/value.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC
|
||||
ENUMDOC
|
||||
AArch64 TLS relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADD
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_CALL
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_LDR
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_OFF_G1
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
|
||||
ENUMDOC
|
||||
Unsigned 12 bit byte offset to global offset table entry for a symbols
|
||||
tls_index structure. Used in conjunction with
|
||||
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
|
||||
Unsigned 12 bit byte offset for 32 bit load/store from the page of
|
||||
the GOT entry for this symbol. Used in conjunction with
|
||||
BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in ILP32 ABI only.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
|
||||
ENUMDOC
|
||||
@ -6322,15 +6304,13 @@ ENUMDOC
|
||||
relative value. Used in conjunction with
|
||||
BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
|
||||
BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS INITIAL EXEC relocation.
|
||||
Unsigned 12 bit byte offset to global offset table entry for a symbols
|
||||
tls_index structure. Used in conjunction with
|
||||
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
|
||||
ENUMDOC
|
||||
AArch64 TLS INITIAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
|
||||
BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
|
||||
ENUMDOC
|
||||
AArch64 TLS INITIAL EXEC relocation.
|
||||
ENUM
|
||||
@ -6338,9 +6318,41 @@ ENUM
|
||||
ENUMDOC
|
||||
AArch64 TLS INITIAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
|
||||
BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
|
||||
ENUMDOC
|
||||
AArch64 TLS INITIAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS INITIAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS INITIAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
|
||||
ENUMDOC
|
||||
AArch64 TLS INITIAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
|
||||
ENUMDOC
|
||||
@ -6354,43 +6366,118 @@ ENUM
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS LOCAL EXEC relocation.
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLS_DTPMOD64
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_OFF_G1
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_LDR
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADD
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_CALL
|
||||
ENUMDOC
|
||||
AArch64 TLS DESC relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_COPY
|
||||
ENUMDOC
|
||||
AArch64 TLS relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLS_DTPREL64
|
||||
BFD_RELOC_AARCH64_GLOB_DAT
|
||||
ENUMDOC
|
||||
AArch64 TLS relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLS_TPREL64
|
||||
BFD_RELOC_AARCH64_JUMP_SLOT
|
||||
ENUMDOC
|
||||
AArch64 TLS relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TSTBR14
|
||||
BFD_RELOC_AARCH64_RELATIVE
|
||||
ENUMDOC
|
||||
AArch64 14 bit pc-relative test bit and branch.
|
||||
The lowest two bits must be zero and are not stored in the instruction,
|
||||
giving a 16 bit signed byte offset.
|
||||
AArch64 TLS relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLS_DTPMOD
|
||||
ENUMDOC
|
||||
AArch64 TLS relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLS_DTPREL
|
||||
ENUMDOC
|
||||
AArch64 TLS relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLS_TPREL
|
||||
ENUMDOC
|
||||
AArch64 TLS relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC
|
||||
ENUMDOC
|
||||
AArch64 TLS relocation.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_IRELATIVE
|
||||
ENUMDOC
|
||||
AArch64 support for STT_GNU_IFUNC.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_RELOC_END
|
||||
ENUMDOC
|
||||
AArch64 pseudo relocation code to mark the end of the AArch64
|
||||
relocation enumerators that have direct mapping to ELF reloc codes.
|
||||
There are a few more enumerators after this one; those are mainly
|
||||
used by the AArch64 assembler for the internal fixup or to select
|
||||
one of the above enumerators.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
|
||||
ENUMDOC
|
||||
AArch64 pseudo relocation code to be used internally by the AArch64
|
||||
assembler and not (currently) written to any object files.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_LDST_LO12
|
||||
ENUMDOC
|
||||
AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
|
||||
address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_LD_GOT_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 pseudo relocation code to be used internally by the AArch64
|
||||
assembler and not (currently) written to any object files.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 pseudo relocation code to be used internally by the AArch64
|
||||
assembler and not (currently) written to any object files.
|
||||
ENUM
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
|
||||
ENUMDOC
|
||||
AArch64 pseudo relocation code to be used internally by the AArch64
|
||||
assembler and not (currently) written to any object files.
|
||||
|
||||
ENUM
|
||||
BFD_RELOC_TILEPRO_COPY
|
||||
|
||||
@ -1,3 +1,18 @@
|
||||
2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
|
||||
|
||||
* config/tc-aarch64.c (reloc_table): Replace
|
||||
BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
|
||||
BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
|
||||
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
|
||||
(md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
|
||||
BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
|
||||
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
|
||||
BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
|
||||
(aarch64_force_relocation): Likewise.
|
||||
|
||||
2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
|
||||
|
||||
* config/tc-aarch64.c (ilp32_p): New static variable.
|
||||
|
||||
@ -2377,7 +2377,7 @@ static struct reloc_table_entry reloc_table[] = {
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
BFD_RELOC_AARCH64_LD64_GOT_LO12_NC},
|
||||
BFD_RELOC_AARCH64_LD_GOT_LO12_NC},
|
||||
|
||||
/* Get to the page containing GOT TLS entry for a symbol */
|
||||
{"tlsgd", 0,
|
||||
@ -2405,7 +2405,7 @@ static struct reloc_table_entry reloc_table[] = {
|
||||
0,
|
||||
0,
|
||||
BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC,
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC},
|
||||
BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC},
|
||||
|
||||
/* Get to the page containing GOT TLS entry for a symbol */
|
||||
{"gottprel", 0,
|
||||
@ -2419,7 +2419,7 @@ static struct reloc_table_entry reloc_table[] = {
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC},
|
||||
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC},
|
||||
|
||||
/* Get tp offset for a symbol. */
|
||||
{"tprel", 0,
|
||||
@ -6506,10 +6506,33 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
|
||||
}
|
||||
break;
|
||||
|
||||
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC:
|
||||
fixP->fx_r_type = (ilp32_p
|
||||
? BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
|
||||
: BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC);
|
||||
S_SET_THREAD_LOCAL (fixP->fx_addsy);
|
||||
/* Should always be exported to object file, see
|
||||
aarch64_force_relocation(). */
|
||||
gas_assert (!fixP->fx_done);
|
||||
gas_assert (seg->use_rela_p);
|
||||
break;
|
||||
|
||||
case BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC:
|
||||
fixP->fx_r_type = (ilp32_p
|
||||
? BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
|
||||
: BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC);
|
||||
S_SET_THREAD_LOCAL (fixP->fx_addsy);
|
||||
/* Should always be exported to object file, see
|
||||
aarch64_force_relocation(). */
|
||||
gas_assert (!fixP->fx_done);
|
||||
gas_assert (seg->use_rela_p);
|
||||
break;
|
||||
|
||||
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
|
||||
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
|
||||
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
|
||||
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
|
||||
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
|
||||
@ -6521,6 +6544,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
|
||||
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
|
||||
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
|
||||
S_SET_THREAD_LOCAL (fixP->fx_addsy);
|
||||
/* Should always be exported to object file, see
|
||||
aarch64_force_relocation(). */
|
||||
@ -6528,6 +6552,16 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
|
||||
gas_assert (seg->use_rela_p);
|
||||
break;
|
||||
|
||||
case BFD_RELOC_AARCH64_LD_GOT_LO12_NC:
|
||||
/* Should always be exported to object file, see
|
||||
aarch64_force_relocation(). */
|
||||
fixP->fx_r_type = (ilp32_p
|
||||
? BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
|
||||
: BFD_RELOC_AARCH64_LD64_GOT_LO12_NC);
|
||||
gas_assert (!fixP->fx_done);
|
||||
gas_assert (seg->use_rela_p);
|
||||
break;
|
||||
|
||||
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
|
||||
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
|
||||
case BFD_RELOC_AARCH64_ADD_LO12:
|
||||
@ -6539,6 +6573,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
|
||||
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
|
||||
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
|
||||
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
|
||||
/* Should always be exported to object file, see
|
||||
aarch64_force_relocation(). */
|
||||
gas_assert (!fixP->fx_done);
|
||||
@ -6669,10 +6704,18 @@ aarch64_force_relocation (struct fix *fixp)
|
||||
even if the symbol is extern or weak. */
|
||||
return 0;
|
||||
|
||||
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_LD_GOT_LO12_NC:
|
||||
/* Pseudo relocs that need to be fixed up according to
|
||||
ilp32_p. */
|
||||
return 0;
|
||||
|
||||
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
|
||||
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
|
||||
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
|
||||
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
|
||||
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
|
||||
@ -6684,8 +6727,10 @@ aarch64_force_relocation (struct fix *fixp)
|
||||
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
|
||||
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
|
||||
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
|
||||
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
|
||||
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
|
||||
case BFD_RELOC_AARCH64_ADD_LO12:
|
||||
|
||||
@ -1,3 +1,8 @@
|
||||
2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
|
||||
|
||||
* gas/aarch64/ilp32-basic.d: New file.
|
||||
* gas/aarch64/ilp32-basic.s: New file.
|
||||
|
||||
2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
|
||||
|
||||
* gas/mips/micromips-insn32.d: New test.
|
||||
|
||||
23
gas/testsuite/gas/aarch64/ilp32-basic.d
Normal file
23
gas/testsuite/gas/aarch64/ilp32-basic.d
Normal file
@ -0,0 +1,23 @@
|
||||
#as: -milp32
|
||||
#objdump: -dr
|
||||
|
||||
.*: file format elf32-.*aarch64
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <.*>:
|
||||
0: 90000004 adrp x4, c <.*>
|
||||
0: R_AARCH64_P32_ADR_PREL_PG_HI21 ptrs
|
||||
4: 91000083 add x3, x4, #0x0
|
||||
4: R_AARCH64_P32_ADD_ABS_LO12_NC ptrs
|
||||
8: b9000080 str w0, \[x4\]
|
||||
8: R_AARCH64_P32_LDST32_ABS_LO12_NC ptrs
|
||||
c: b9000461 str w1, \[x3,#4\]
|
||||
10: b9000862 str w2, \[x3,#8\]
|
||||
14: 90000004 adrp x4, c <.*>
|
||||
14: R_AARCH64_P32_ADR_GOT_PAGE ptrs
|
||||
18: f9400083 ldr x3, \[x4\]
|
||||
18: R_AARCH64_P32_LD32_GOT_LO12_NC ptrs
|
||||
1c: 2a0403e0 mov w0, w4
|
||||
20: d65f03c0 ret
|
||||
17
gas/testsuite/gas/aarch64/ilp32-basic.s
Normal file
17
gas/testsuite/gas/aarch64/ilp32-basic.s
Normal file
@ -0,0 +1,17 @@
|
||||
.cpu generic
|
||||
.text
|
||||
.align 2
|
||||
.global foo
|
||||
.type foo, %function
|
||||
foo:
|
||||
adrp x4, ptrs
|
||||
add x3, x4, :lo12:ptrs
|
||||
str w0, [x4,#:lo12:ptrs]
|
||||
str w1, [x3,4]
|
||||
str w2, [x3,8]
|
||||
adrp x4, :got:ptrs
|
||||
ldr x3, [x4,#:got_lo12:ptrs]
|
||||
mov w0, w4
|
||||
ret
|
||||
.size foo, .-foo
|
||||
.comm ptrs,12,8
|
||||
@ -1,3 +1,7 @@
|
||||
2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
|
||||
|
||||
* aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones.
|
||||
|
||||
2013-06-24 Maciej W. Rozycki <macro@codesourcery.com>
|
||||
|
||||
* mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting.
|
||||
|
||||
@ -43,7 +43,126 @@ START_RELOC_NUMBERS (elf_aarch64_reloc_type)
|
||||
/* Null relocations. */
|
||||
RELOC_NUMBER (R_AARCH64_NONE, 0) /* No reloc */
|
||||
|
||||
FAKE_RELOC (R_AARCH64_static_min, 256)
|
||||
/* Basic data relocations. */
|
||||
|
||||
/* .word: (S+A) */
|
||||
RELOC_NUMBER (R_AARCH64_P32_ABS32, 1)
|
||||
|
||||
/* .half: (S+A) */
|
||||
RELOC_NUMBER (R_AARCH64_P32_ABS16, 2)
|
||||
|
||||
/* .word: (S+A-P) */
|
||||
RELOC_NUMBER (R_AARCH64_P32_PREL32, 3)
|
||||
|
||||
/* .half: (S+A-P) */
|
||||
RELOC_NUMBER (R_AARCH64_P32_PREL16, 4)
|
||||
|
||||
/* Group relocations to create a 16, 32, 48 or 64 bit
|
||||
unsigned data or abs address inline. */
|
||||
|
||||
/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
|
||||
RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0, 5)
|
||||
|
||||
/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
|
||||
RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0_NC, 6)
|
||||
|
||||
/* MOV[ZK]: ((S+A) >> 16) & 0xffff */
|
||||
RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G1, 7)
|
||||
|
||||
/* Group relocations to create high part of a 16, 32, 48 or 64 bit
|
||||
signed data or abs address inline. Will change instruction
|
||||
to MOVN or MOVZ depending on sign of calculated value. */
|
||||
|
||||
/* MOV[ZN]: ((S+A) >> 0) & 0xffff */
|
||||
RELOC_NUMBER (R_AARCH64_P32_MOVW_SABS_G0, 8)
|
||||
|
||||
/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
|
||||
addresses: PG(x) is (x & ~0xfff). */
|
||||
|
||||
/* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
|
||||
RELOC_NUMBER (R_AARCH64_P32_LD_PREL_LO19, 9)
|
||||
|
||||
/* ADR: (S+A-P) & 0x1fffff */
|
||||
RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_LO21, 10)
|
||||
|
||||
/* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
|
||||
RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_PG_HI21, 11)
|
||||
|
||||
/* ADD: (S+A) & 0xfff */
|
||||
RELOC_NUMBER (R_AARCH64_P32_ADD_ABS_LO12_NC, 12)
|
||||
|
||||
/* LD/ST8: (S+A) & 0xfff */
|
||||
RELOC_NUMBER (R_AARCH64_P32_LDST8_ABS_LO12_NC, 13)
|
||||
|
||||
/* LD/ST16: (S+A) & 0xffe */
|
||||
RELOC_NUMBER (R_AARCH64_P32_LDST16_ABS_LO12_NC, 14)
|
||||
|
||||
/* LD/ST32: (S+A) & 0xffc */
|
||||
RELOC_NUMBER (R_AARCH64_P32_LDST32_ABS_LO12_NC, 15)
|
||||
|
||||
/* LD/ST64: (S+A) & 0xff8 */
|
||||
RELOC_NUMBER (R_AARCH64_P32_LDST64_ABS_LO12_NC, 16)
|
||||
|
||||
/* LD/ST128: (S+A) & 0xff0 */
|
||||
RELOC_NUMBER (R_AARCH64_P32_LDST128_ABS_LO12_NC, 17)
|
||||
|
||||
/* Relocations for control-flow instructions. */
|
||||
|
||||
/* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */
|
||||
RELOC_NUMBER (R_AARCH64_P32_TSTBR14, 18)
|
||||
|
||||
/* B.cond: ((S+A-P) >> 2) & 0x7ffff. */
|
||||
RELOC_NUMBER (R_AARCH64_P32_CONDBR19, 19)
|
||||
|
||||
/* B: ((S+A-P) >> 2) & 0x3ffffff. */
|
||||
RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20)
|
||||
|
||||
/* BL: ((S+A-P) >> 2) & 0x3ffffff. */
|
||||
RELOC_NUMBER (R_AARCH64_P32_CALL26, 21)
|
||||
|
||||
|
||||
RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25)
|
||||
RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26)
|
||||
RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27)
|
||||
|
||||
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G1, 106)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0, 107)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111)
|
||||
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PAGE21, 124)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD32_LO12_NC, 125)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADD_LO12_NC, 126)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSDESC_CALL, 127)
|
||||
|
||||
/* Dynamic relocations */
|
||||
|
||||
/* Copy symbol at runtime. */
|
||||
RELOC_NUMBER (R_AARCH64_P32_COPY, 180)
|
||||
|
||||
/* Create GOT entry. */
|
||||
RELOC_NUMBER (R_AARCH64_P32_GLOB_DAT, 181)
|
||||
|
||||
/* Create PLT entry. */
|
||||
RELOC_NUMBER (R_AARCH64_P32_JUMP_SLOT, 182)
|
||||
|
||||
/* Adjust by program base. */
|
||||
RELOC_NUMBER (R_AARCH64_P32_RELATIVE, 183)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLS_DTPMOD, 184)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLS_DTPREL, 185)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLS_TPREL, 186)
|
||||
RELOC_NUMBER (R_AARCH64_P32_TLSDESC, 187)
|
||||
RELOC_NUMBER (R_AARCH64_P32_IRELATIVE, 188)
|
||||
|
||||
RELOC_NUMBER (R_AARCH64_NULL, 256) /* No reloc */
|
||||
|
||||
@ -157,9 +276,6 @@ RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309)
|
||||
RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311)
|
||||
RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312)
|
||||
|
||||
FAKE_RELOC (R_AARCH64_static_max, 313)
|
||||
|
||||
FAKE_RELOC (R_AARCH64_tls_min, 512)
|
||||
RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513)
|
||||
RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514)
|
||||
RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539)
|
||||
@ -175,9 +291,7 @@ RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 548)
|
||||
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549)
|
||||
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550)
|
||||
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551)
|
||||
FAKE_RELOC (R_AARCH64_tls_max, 552)
|
||||
|
||||
FAKE_RELOC (R_AARCH64_tlsdesc_min, 560)
|
||||
RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560)
|
||||
RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561)
|
||||
RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562)
|
||||
@ -188,10 +302,8 @@ RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566)
|
||||
RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567)
|
||||
RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568)
|
||||
RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569)
|
||||
FAKE_RELOC (R_AARCH64_tlsdesc_max, 570)
|
||||
|
||||
/* Dynamic relocations */
|
||||
FAKE_RELOC (R_AARCH64_dyn_min, 1024)
|
||||
|
||||
/* Copy symbol at runtime. */
|
||||
RELOC_NUMBER (R_AARCH64_COPY, 1024)
|
||||
@ -204,11 +316,11 @@ RELOC_NUMBER (R_AARCH64_JUMP_SLOT, 1026)
|
||||
|
||||
/* Adjust by program base. */
|
||||
RELOC_NUMBER (R_AARCH64_RELATIVE, 1027)
|
||||
RELOC_NUMBER (R_AARCH64_TLS_DTPMOD64, 1028)
|
||||
RELOC_NUMBER (R_AARCH64_TLS_DTPREL64, 1029)
|
||||
RELOC_NUMBER (R_AARCH64_TLS_TPREL64, 1030)
|
||||
RELOC_NUMBER (R_AARCH64_TLS_DTPMOD, 1028)
|
||||
RELOC_NUMBER (R_AARCH64_TLS_DTPREL, 1029)
|
||||
RELOC_NUMBER (R_AARCH64_TLS_TPREL, 1030)
|
||||
RELOC_NUMBER (R_AARCH64_TLSDESC, 1031)
|
||||
FAKE_RELOC (R_AARCH64_dyn_max, 1032)
|
||||
RELOC_NUMBER (R_AARCH64_IRELATIVE, 1032)
|
||||
|
||||
END_RELOC_NUMBERS (R_AARCH64_end)
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user