RISC-V: Use pc-relative relocation for FDE initial location
The symbol address in .eh_frame may be adjusted in _bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert a relocation whose addend symbol is in .eh_frame. Othrewise, the value may be adjusted twice. bfd/ChangeLog 2017-06-26 Kuan-Lin Chen <rufus@andestech.com> * elfnn-riscv.c (perform_relocation): Support the new R_RISCV_32_PCREL relocation. (riscv_elf_relocate_section): Likewise. * elfxx-riscv.c (howto_table): Likewise. (riscv_reloc_map): Likewise. * bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation. * libbfd.h: Regenerate. gas/ChangeLog 2017-06-26 Kuan-Lin Chen <rufus@andestech.com> * config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a R_RISCV_32_PCREL relocation. include/ChangeLog 2017-06-26 Kuan-Lin Chen <rufus@andestech.com> * elf/riscv.h (R_RISCV_32_PCREL): New.
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@ -1,3 +1,13 @@
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2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
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* elfnn-riscv.c (perform_relocation): Support the new
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R_RISCV_32_PCREL relocation.
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(riscv_elf_relocate_section): Likewise.
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* elfxx-riscv.c (howto_table): Likewise.
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(riscv_reloc_map): Likewise.
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* bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation.
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* libbfd.h: Regenerate.
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2017-06-27 Alan Modra <amodra@gmail.com>
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PR binutils/21665
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@ -4771,6 +4771,7 @@ number for the SBIC, SBIS, SBI and CBI instructions */
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BFD_RELOC_RISCV_SET8,
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BFD_RELOC_RISCV_SET16,
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BFD_RELOC_RISCV_SET32,
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BFD_RELOC_RISCV_32_PCREL,
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/* Renesas RL78 Relocations. */
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BFD_RELOC_RL78_NEG8,
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@ -1566,6 +1566,7 @@ perform_relocation (const reloc_howto_type *howto,
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case R_RISCV_SET8:
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case R_RISCV_SET16:
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case R_RISCV_SET32:
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case R_RISCV_32_PCREL:
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case R_RISCV_TLS_DTPREL32:
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case R_RISCV_TLS_DTPREL64:
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break;
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@ -1849,6 +1850,7 @@ riscv_elf_relocate_section (bfd *output_bfd,
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case R_RISCV_SET8:
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case R_RISCV_SET16:
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case R_RISCV_SET32:
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case R_RISCV_32_PCREL:
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/* These require no special handling beyond perform_relocation. */
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break;
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@ -833,6 +833,21 @@ static reloc_howto_type howto_table[] =
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0, /* src_mask */
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MINUS_ONE, /* dst_mask */
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FALSE), /* pcrel_offset */
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/* 32-bit PC relative. */
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HOWTO (R_RISCV_32_PCREL, /* type */
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0, /* rightshift */
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2, /* size */
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32, /* bitsize */
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TRUE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_dont, /* complain_on_overflow */
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bfd_elf_generic_reloc, /* special_function */
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"R_RISCV_32_PCREL", /* name */
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FALSE, /* partial_inplace */
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0, /* src_mask */
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MINUS_ONE, /* dst_mask */
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FALSE), /* pcrel_offset */
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};
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/* A mapping from BFD reloc types to RISC-V ELF reloc types. */
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@ -894,6 +909,7 @@ static const struct elf_reloc_map riscv_reloc_map[] =
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{ BFD_RELOC_RISCV_SET8, R_RISCV_SET8 },
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{ BFD_RELOC_RISCV_SET16, R_RISCV_SET16 },
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{ BFD_RELOC_RISCV_SET32, R_RISCV_SET32 },
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{ BFD_RELOC_RISCV_32_PCREL, R_RISCV_32_PCREL },
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};
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/* Given a BFD reloc type, return a howto structure. */
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@ -2215,6 +2215,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
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"BFD_RELOC_RISCV_SET8",
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"BFD_RELOC_RISCV_SET16",
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"BFD_RELOC_RISCV_SET32",
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"BFD_RELOC_RISCV_32_PCREL",
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"BFD_RELOC_RL78_NEG8",
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"BFD_RELOC_RL78_NEG16",
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"BFD_RELOC_RL78_NEG24",
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@ -5155,6 +5155,8 @@ ENUMX
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BFD_RELOC_RISCV_SET16
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ENUMX
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BFD_RELOC_RISCV_SET32
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ENUMX
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BFD_RELOC_RISCV_32_PCREL
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ENUMDOC
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RISC-V relocations.
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@ -1,3 +1,8 @@
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2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
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* config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a
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R_RISCV_32_PCREL relocation.
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2017-06-26 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/21661
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@ -1871,6 +1871,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
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bfd_byte *buf = (bfd_byte *) (fixP->fx_frag->fr_literal + fixP->fx_where);
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bfd_boolean relaxable = FALSE;
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offsetT loc;
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segT sub_segment;
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/* Remember value for tc_gen_reloc. */
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fixP->fx_addnumber = *valP;
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@ -1919,8 +1920,25 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
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_("TLS relocation against a constant"));
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break;
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case BFD_RELOC_64:
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case BFD_RELOC_32:
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/* Use pc-relative relocation for FDE initial location.
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The symbol address in .eh_frame may be adjusted in
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_bfd_elf_discard_section_eh_frame, and the content of
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.eh_frame will be adjusted in _bfd_elf_write_section_eh_frame.
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Therefore, we cannot insert a relocation whose addend symbol is
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in .eh_frame. Othrewise, the value may be adjusted twice.*/
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if (fixP->fx_addsy && fixP->fx_subsy
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&& (sub_segment = S_GET_SEGMENT (fixP->fx_subsy))
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&& strcmp (sub_segment->name, ".eh_frame") == 0
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&& S_GET_VALUE (fixP->fx_subsy)
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== fixP->fx_frag->fr_address + fixP->fx_where)
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{
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fixP->fx_r_type = BFD_RELOC_RISCV_32_PCREL;
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fixP->fx_subsy = NULL;
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break;
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}
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/* Fall through. */
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case BFD_RELOC_64:
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case BFD_RELOC_16:
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case BFD_RELOC_8:
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case BFD_RELOC_RISCV_CFA:
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@ -1,3 +1,7 @@
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2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
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* elf/riscv.h (R_RISCV_32_PCREL): New.
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2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* elf/arm.h (TAG_CPU_ARCH_V8R): New macro.
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@ -87,6 +87,7 @@ START_RELOC_NUMBERS (elf_riscv_reloc_type)
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RELOC_NUMBER (R_RISCV_SET8, 54)
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RELOC_NUMBER (R_RISCV_SET16, 55)
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RELOC_NUMBER (R_RISCV_SET32, 56)
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RELOC_NUMBER (R_RISCV_32_PCREL, 57)
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END_RELOC_NUMBERS (R_RISCV_max)
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/* Processor specific flags for the ELF header e_flags field. */
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