Correctly emit lo16 relocs for elf-dlx target, fixing bogus range checking bug.

This commit is contained in:
Nick Clifton 2004-04-01 08:22:47 +00:00
parent fe046a1715
commit a7844384e8
8 changed files with 70 additions and 6 deletions

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@ -1,3 +1,13 @@
2004-04-01 Dave Korn <dk@artimi.com>
* config/tc-dlx.c (md_assemble): set fx_no_overflow flag for
hi16 and lo16 fixS structs.
(md_assemble): generate bit_fixS for RELOC_DLX_LO16 in
exactly the same way as for RELOC_DLX_REL16.
(machine_ip): properly respect LO flag in the_insn and
output RELOC_DLX_LO16 rather than RELOC_DLX_16.
(md_apply_fix3): apply RELOC_DLX_LO16.
2004-03-30 Stan Shebs <shebs@apple.com>
Remove long-obsolete MPW support.

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@ -1,5 +1,5 @@
/* tc-ldx.c -- Assemble for the DLX
Copyright 2002, 2003 Free Software Foundation, Inc.
Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@ -397,6 +397,18 @@ md_assemble (str)
the_insn.size, & the_insn.exp, the_insn.pcrel,
the_insn.reloc);
/* Turn off complaints that the addend is
too large for things like foo+100000@ha. */
switch (the_insn.reloc)
{
case RELOC_DLX_HI16:
case RELOC_DLX_LO16:
fixP->fx_no_overflow = 1;
break;
default:
break;
}
switch (fixP->fx_r_type)
{
case RELOC_DLX_REL26:
@ -410,6 +422,7 @@ md_assemble (str)
bitP->fx_bit_add = 0x03FFFFFF;
fixP->fx_bit_fixP = bitP;
break;
case RELOC_DLX_LO16:
case RELOC_DLX_REL16:
bitP = malloc (sizeof (bit_fixS));
bitP->fx_bit_size = 16;
@ -955,7 +968,8 @@ machine_ip (str)
continue;
}
the_insn.reloc = (the_insn.HI) ? RELOC_DLX_HI16 : RELOC_DLX_16;
the_insn.reloc = (the_insn.HI) ? RELOC_DLX_HI16
: (the_insn.LO ? RELOC_DLX_LO16 : RELOC_DLX_16);
the_insn.reloc_offset = 2;
the_insn.size = 2;
the_insn.pcrel = 0;
@ -1164,6 +1178,7 @@ md_apply_fix3 (fixP, valP, seg)
switch (fixP->fx_r_type)
{
case RELOC_DLX_LO16:
case RELOC_DLX_REL16:
if (fixP->fx_bit_fixP != (bit_fixS *) NULL)
{

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@ -1,3 +1,14 @@
2004-04-01 Dave Korn <dk@artimi.com>
* gas/dlx/alltests.exp: Execute new lohi test.
* gas/dlx/lohi.s: New test for spurious lo16/hi16
reloc overflow checking.
* gas/dlx/lohi.d: New file: expected output.
* gas/dlx/lhi.d: Updated to properly expect lo16
relocations where asked for.
* gas/dlx/itype.d: Likewise.
* gas/dlx/lhi.d: Corrected cut+paste error in test name.
2004-03-30 Stan Shebs <shebs@apple.com>
* gas/macros/macros.exp: Remove mention of MPW config.

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@ -5,6 +5,7 @@ if [istarget dlx*-*-*] {
run_dump_test "itype"
run_dump_test "lhi"
run_dump_test "load"
run_dump_test "lohi"
run_dump_test "rtype"
run_dump_test "store"
}

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@ -16,7 +16,7 @@ Disassembly of section .text:
12: R_DLX_RELOC_16 .text
14: 35 4c 00 78 ori r12,r10,0x0078
18: 39 af 00 00 xori r15,r13,0x0000
1a: R_DLX_RELOC_16 .text
1a: R_DLX_RELOC_16_LO .text
1c: da 30 00 1c slli r16,r17,0x001c
1e: R_DLX_RELOC_16 .text
20: e2 93 00 0f srai r19,r20,0x000f

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@ -1,6 +1,6 @@
#as:
#objdump: -dr
#name: itype
#name: lhi
.*: +file format .*
@ -11,7 +11,7 @@ Disassembly of section .text:
4: 3c 03 00 00 lhi r3,0x0000
6: R_DLX_RELOC_16_HI .text
8: 3c 04 00 00 lhi r4,0x0000
a: R_DLX_RELOC_16 .text
a: R_DLX_RELOC_16_LO .text
c: 3c 04 ff fb lhi r4,0xfffb
e: R_DLX_RELOC_16 .text
10: 3c 04 00 0c lhi r4,0x000c
@ -19,5 +19,5 @@ Disassembly of section .text:
18: 20 04 00 00 addi r4,r0,0x0000
1a: R_DLX_RELOC_16_HI .text
1c: 34 84 00 18 ori r4,r4,0x0018
1e: R_DLX_RELOC_16 .text
1e: R_DLX_RELOC_16_LO .text
20: 20 64 00 00 addi r4,r3,0x0000

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@ -0,0 +1,18 @@
#as:
#objdump: -dr
#name: lohi
.*: +file format .*
Disassembly of section .text:
00000000 <.text>:
0: 00 00 00 00 nop
4: 3c 01 00 03 lhi r1,0x0003
6: R_DLX_RELOC_16_HI .text
8: 34 01 0d 44 ori r1,r0,0x0d44
a: R_DLX_RELOC_16_LO .text
c: 3c 01 0b eb lhi r1,0x0beb
e: R_DLX_RELOC_16_HI .text
10: 34 01 c2 04 ori r1,r0,0xc204
12: R_DLX_RELOC_16_LO .text

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@ -0,0 +1,9 @@
.text
.align 2
nop
.L1:
lhi r1,%hi(.L1 + 200000)
ori r1,r0,%lo(.L1 + 200000)
lhi r1,%hi(.L1 + 200000000)
ori r1,r0,%lo(.L1 + 200000000)
.end