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2000-12-03 Kazu Hirata <kazu@hxi.com> 

* elf32-arm.h: Fix formatting.
	* elf32-avr.c: Likewise.
	* elf32-cris.c: Likewise.
	* elf32-d10v.c: Likewise.
	* elf32-d30v.c: Likewise.
	* elf-hppa.h: Likewise.
	* elf-m10200.c: Likewise.
	* elf-m10300.c: Likewise.
This commit is contained in:
Kazu Hirata 2000-12-03 20:44:04 +00:00
parent bc80588841
commit a7c108501a
9 changed files with 85 additions and 106 deletions
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11
bfd/ChangeLog
View File

@ -1,3 +1,14 @@
2000-12-03 Kazu Hirata <kazu@hxi.com>
* elf32-arm.h: Fix formatting.
* elf32-avr.c: Likewise.
* elf32-cris.c: Likewise.
* elf32-d10v.c: Likewise.
* elf32-d30v.c: Likewise.
* elf-hppa.h: Likewise.
* elf-m10200.c: Likewise.
* elf-m10300.c: Likewise.
2000-12-01 Chris Demetriou <cgd@sibyte.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mips32 and

27
bfd/elf-hppa.h
View File

@ -96,7 +96,6 @@ static unsigned int elf_hppa_relocate_insn
PARAMS ((unsigned int, unsigned int, unsigned int));
#endif
/* ELF/PA relocation howto entries. */
static reloc_howto_type elf_hppa_howto_table[ELF_HOWTO_TABLE_SIZE] =
@ -760,7 +759,6 @@ _bfd_elf_hppa_gen_reloc_type (abfd, base_type, format, field, ignore, sym)
}
break;
case R_HPPA_GOTOFF:
switch (format)
{
@ -803,7 +801,6 @@ _bfd_elf_hppa_gen_reloc_type (abfd, base_type, format, field, ignore, sym)
}
break;
case R_HPPA_PCREL_CALL:
switch (format)
{
@ -1093,7 +1090,6 @@ elf_hppa_unmark_useless_dynamic_symbols (h, data)
return true;
}
static boolean
elf_hppa_remark_useless_dynamic_symbols (h, data)
struct elf_link_hash_entry *h;
@ -1137,7 +1133,7 @@ elf_hppa_record_segment_addrs (abfd, section, data)
{
struct elf64_hppa_link_hash_table *hppa_info;
bfd_vma value;
hppa_info = (struct elf64_hppa_link_hash_table *)data;
value = section->vma - section->filepos;
@ -1193,7 +1189,6 @@ elf_hppa_final_link (abfd, info)
else
{
asection *sec;
/* First look for a .plt section. If found, then __gp is the
address of the .plt + gp_offset.
@ -1461,15 +1456,14 @@ elf_hppa_relocate_section (output_bfd, info, input_bfd, input_section,
return true;
}
/* Compute the value for a relocation (REL) during a final link stage,
then insert the value into the proper location in CONTENTS.
then insert the value into the proper location in CONTENTS.
VALUE is a tentative value for the relocation and may be overridden
and modified here based on the specific relocation to be performed.
For example we do conversions for PC-relative branches in this routine
or redirection of calls to external routines to stubs.
or redirection of calls to external routines to stubs.
The work of actually applying the relocation is left to a helper
routine in an attempt to reduce the complexity and size of this
@ -1527,7 +1521,7 @@ elf_hppa_final_link_relocate (rel, input_bfd, output_bfd,
if (sym_sec == NULL || sym_sec->output_section == NULL)
value = (dyn_h->stub_offset + hppa_info->stub_sec->output_offset
+ hppa_info->stub_sec->output_section->vma);
/* Turn VALUE into a proper PC relative address. */
value -= (offset + input_section->output_offset
+ input_section->output_section->vma);
@ -1561,7 +1555,7 @@ elf_hppa_final_link_relocate (rel, input_bfd, output_bfd,
if (sym_sec == NULL || sym_sec->output_section == NULL)
value = (dyn_h->stub_offset + hppa_info->stub_sec->output_offset
+ hppa_info->stub_sec->output_section->vma);
/* Turn VALUE into a proper PC relative address. */
value -= (offset + input_section->output_offset
+ input_section->output_section->vma);
@ -1611,7 +1605,7 @@ elf_hppa_final_link_relocate (rel, input_bfd, output_bfd,
to the local symbol's value).
So, if this is a local symbol (h == NULL), then we need to
fill in its DLT entry.
fill in its DLT entry.
Similarly we may still need to set up an entry in .opd for
a local function which had its address taken. */
@ -1895,7 +1889,7 @@ elf_hppa_final_link_relocate (rel, input_bfd, output_bfd,
if (sym_sec == NULL || sym_sec->output_section == NULL)
value = (dyn_h->stub_offset + hppa_info->stub_sec->output_offset
+ hppa_info->stub_sec->output_section->vma);
/* Turn VALUE into a proper PC relative address. */
value -= (offset + input_section->output_offset
+ input_section->output_section->vma);
@ -1914,8 +1908,7 @@ elf_hppa_final_link_relocate (rel, input_bfd, output_bfd,
if (sym_sec == NULL || sym_sec->output_section == NULL)
value = (dyn_h->stub_offset + hppa_info->stub_sec->output_offset
+ hppa_info->stub_sec->output_section->vma);
/* Turn VALUE into a proper PC relative address. */
value -= (offset + input_section->output_offset
+ input_section->output_section->vma);
@ -1926,7 +1919,6 @@ elf_hppa_final_link_relocate (rel, input_bfd, output_bfd,
return bfd_reloc_ok;
}
case R_PARISC_FPTR64:
{
/* We may still need to create the FPTR itself if it was for
@ -1953,7 +1945,7 @@ elf_hppa_final_link_relocate (rel, input_bfd, output_bfd,
value = (dyn_h->opd_offset
+ hppa_info->opd_sec->output_offset
+ hppa_info->opd_sec->output_section->vma);
bfd_put_64 (input_bfd, value + addend, hit_data);
return bfd_reloc_ok;
}
@ -1992,7 +1984,6 @@ elf_hppa_final_link_relocate (rel, input_bfd, output_bfd,
bfd_put_64 (input_bfd, value, hit_data);
return bfd_reloc_ok;
}
/* Something we don't know how to handle. */
default:

17
bfd/elf-m10200.c
View File

@ -505,11 +505,11 @@ mn10200_elf_relocate_section (output_bfd, info, input_bfd, input_section,
abs24, imm24, d24 all look the same at the reloc level. It
might make the code simpler if we had different relocs for
the various relaxable operand types.
We don't handle imm16->imm8 or d16->d8 as they're very rare
and somewhat more difficult to support. */
static boolean
static boolean
mn10200_elf_relax_section (abfd, sec, link_info, again)
bfd *abfd;
asection *sec;
@ -654,7 +654,6 @@ mn10200_elf_relax_section (abfd, sec, link_info, again)
that would be more work, but would require less memory when
the linker is run. */
/* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative
branch/call. */
if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24)
@ -774,7 +773,6 @@ mn10200_elf_relax_section (abfd, sec, link_info, again)
bra lab2
lab1: lab1:
This happens when the bCC can't reach lab2 at assembly time,
but due to other relaxations it can reach at link time. */
if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8)
@ -814,7 +812,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again)
continue;
/* Now make sure we are a conditional branch. This may not
be necessary, but why take the chance.
be necessary, but why take the chance.
Note these checks assume that R_MN10200_PCREL8 relocs
only occur on bCC and bCCx insns. If they occured
@ -904,7 +902,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again)
break;
}
bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
/* Set the reloc type and symbol for the first branch
from the second branch. */
irel->r_info = nrel->r_info;
@ -929,7 +927,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again)
{
bfd_vma value = symval;
/* See if the value will fit in 16 bits.
/* See if the value will fit in 16 bits.
We allow any 16bit match here. We prune those we can't
handle below. */
if ((long)value < 0x7fff && (long)value > -0x8000)
@ -991,7 +989,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again)
*again = true;
break;
/* mov imm24,an -> mov imm16,an
/* mov imm24,an -> mov imm16,an
cmp imm24,an -> cmp imm16,an
mov (abs24),dn -> mov (abs16),dn
mov dn,(abs24) -> mov dn,(abs16)
@ -1053,7 +1051,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again)
add imm24,dn -> add imm16,dn
add imm24,an -> add imm16,an
sub imm24,dn -> sub imm16,dn
sub imm24,an -> sub imm16,an
sub imm24,an -> sub imm16,an
And all d24->d16 in memory ops. */
case 0x78:
case 0xd0:
@ -1506,7 +1504,6 @@ mn10200_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
return NULL;
}
#define TARGET_LITTLE_SYM bfd_elf32_mn10200_vec
#define TARGET_LITTLE_NAME "elf32-mn10200"
#define ELF_ARCH bfd_arch_mn10200

18
bfd/elf-m10300.c
View File

@ -119,7 +119,6 @@ static void compute_function_info
does absolutely nothing. */
#define USE_RELA
static reloc_howto_type elf_mn10300_howto_table[] =
{
/* Dummy relocation. Does nothing. */
@ -342,7 +341,7 @@ mn10300_elf_check_relocs (abfd, info, sec, relocs)
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof(Elf32_External_Sym);
sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
if (!elf_bad_symtab (abfd))
sym_hashes_end -= symtab_hdr->sh_info;
@ -767,7 +766,6 @@ elf32_mn10300_finish_hash_table_entry (gen_entry, in_args)
This is only done if the resulting code is no larger
than the original code.
* jmp:32 -> jmp:16 2 bytes
* jmp:16 -> bra:8 1 byte
@ -930,7 +928,7 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
sym_sec = bfd_abs_section_ptr;
else if (isym.st_shndx == SHN_COMMON)
sym_sec = bfd_com_section_ptr;
sym_name = bfd_elf_string_from_elf_section (input_bfd,
symtab_hdr->sh_link,
isym.st_name);
@ -993,7 +991,6 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
shndx = _bfd_elf_section_from_bfd_section (input_bfd,
section);
/* Look at each function defined in this section and
update info for that function. */
esym = extsyms;
@ -1182,7 +1179,6 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
goto error_return;
}
shndx = _bfd_elf_section_from_bfd_section (input_bfd, section);
/* Now look for any function in this section which needs
@ -1213,7 +1209,7 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
sym_sec = bfd_com_section_ptr;
else
abort ();
sym_name = bfd_elf_string_from_elf_section (input_bfd,
symtab_hdr->sh_link,
isym.st_name);
@ -1370,7 +1366,6 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
}
}
/* (Re)initialize for the basic instruction shortening/relaxing pass. */
contents = NULL;
extsyms = NULL;
@ -1482,7 +1477,7 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
sym_sec = bfd_com_section_ptr;
else
abort ();
symval = (isym.st_value
+ sym_sec->output_section->vma
+ sym_sec->output_offset);
@ -1771,7 +1766,6 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
bra lab2
lab1: lab1:
This happens when the bCC can't reach lab2 at assembly time,
but due to other relaxations it can reach at link time. */
if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10300_PCREL8)
@ -2642,7 +2636,7 @@ mn10300_elf_symbol_address_p (abfd, sec, extsyms, addr)
return true;
}
sym_hash = (struct elf32_mn10300_link_hash_entry **)(elf_sym_hashes (abfd));
sym_hash = (struct elf32_mn10300_link_hash_entry **) (elf_sym_hashes (abfd));
sym_hash_end = (sym_hash
+ (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
- symtab_hdr->sh_info));
@ -2948,7 +2942,6 @@ _bfd_mn10300_elf_merge_private_bfd_data (ibfd, obfd)
return true;
}
#define TARGET_LITTLE_SYM bfd_elf32_mn10300_vec
#define TARGET_LITTLE_NAME "elf32-mn10300"
#define ELF_ARCH bfd_arch_mn10300
@ -2977,5 +2970,4 @@ _bfd_mn10300_elf_merge_private_bfd_data (ibfd, obfd)
#define bfd_elf32_bfd_merge_private_bfd_data \
_bfd_mn10300_elf_merge_private_bfd_data
#include "elf32-target.h"

9
bfd/elf32-arm.h
View File

@ -17,7 +17,6 @@
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
typedef unsigned long int insn32;
typedef unsigned short int insn16;
@ -159,7 +158,6 @@ struct elf32_arm_link_hash_table
int no_pipeline_knowledge;
};
/* Create an entry in an ARM ELF linker hash table. */
static struct bfd_hash_entry *
@ -682,7 +680,7 @@ bfd_elf32_arm_process_before_allocation (abfd, link_info, no_pipeline_knowledge)
}
}
/* If the relocation is not against a symbol it cannot concern us. */
/* If the relocation is not against a symbol it cannot concern us. */
h = NULL;
/* We don't care about local symbols. */
@ -1479,7 +1477,7 @@ elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
(bfd_vma) 0);
case R_ARM_GOTPC:
/* Use global offset table as symbol value. */
/* Use global offset table as symbol value. */
BFD_ASSERT (sgot != NULL);
if (sgot == NULL)
@ -2621,7 +2619,6 @@ elf32_arm_check_relocs (abfd, info, sec, relocs)
return true;
}
/* Find the nearest line to a particular section and offset, for error
reporting. This code is a duplicate of the code in elf.c, except
that it also accepts STT_ARM_TFUNC as a symbol that names a function. */
@ -3366,12 +3363,10 @@ elf32_arm_post_process_headers (abfd, link_info)
i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
}
#define ELF_ARCH bfd_arch_arm
#define ELF_MACHINE_CODE EM_ARM
#define ELF_MAXPAGESIZE 0x8000
#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags

10
bfd/elf32-avr.c
View File

@ -18,7 +18,6 @@ You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
@ -47,7 +46,6 @@ static boolean elf32_avr_relocate_section
static void bfd_elf_avr_final_write_processing PARAMS ((bfd *, boolean));
static boolean elf32_avr_object_p PARAMS ((bfd *));
/* Use RELA instead of REL */
#undef USE_REL
@ -472,7 +470,7 @@ elf32_avr_check_relocs (abfd, info, sec, relocs)
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof(Elf32_External_Sym);
sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
if (!elf_bad_symtab (abfd))
sym_hashes_end -= symtab_hdr->sh_info;
@ -516,7 +514,7 @@ avr_final_link_relocate (howto, input_bfd, input_section,
srel = (bfd_signed_vma) relocation;
srel += rel->r_addend;
srel -= rel->r_offset;
srel -= 2; /* Branch instructions add 2 to the PC... */
srel -= 2; /* Branch instructions add 2 to the PC... */
srel -= (input_section->output_section->vma +
input_section->output_offset);
@ -534,7 +532,7 @@ avr_final_link_relocate (howto, input_bfd, input_section,
srel = (bfd_signed_vma) relocation;
srel += rel->r_addend;
srel -= rel->r_offset;
srel -= 2; /* Branch instructions add 2 to the PC... */
srel -= 2; /* Branch instructions add 2 to the PC... */
srel -= (input_section->output_section->vma +
input_section->output_offset);
@ -947,7 +945,6 @@ elf32_avr_object_p (abfd)
e_set);
}
#define ELF_ARCH bfd_arch_avr
#define ELF_MACHINE_CODE EM_AVR
#define ELF_MAXPAGESIZE 1
@ -966,5 +963,4 @@ elf32_avr_object_p (abfd)
bfd_elf_avr_final_write_processing
#define elf_backend_object_p elf32_avr_object_p
#include "elf32-target.h"

46
bfd/elf32-cris.c
View File

@ -29,10 +29,10 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
static reloc_howto_type * cris_reloc_type_lookup
PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
static void cris_info_to_howto_rela
static void cris_info_to_howto_rela
PARAMS ((bfd *, arelent *, Elf32_Internal_Rela *));
static boolean cris_elf_relocate_section
static boolean cris_elf_relocate_section
PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
@ -226,7 +226,7 @@ cris_reloc_type_lookup (abfd, code)
--i;)
if (cris_reloc_map [i].bfd_reloc_val == code)
return & cris_elf_howto_table [cris_reloc_map[i].cris_reloc_val];
return NULL;
}
@ -305,13 +305,13 @@ cris_elf_relocate_section (output_bfd, info, input_bfd, input_section,
bfd_reloc_status_type r;
const char * name = NULL;
int r_type;
r_type = ELF32_R_TYPE (rel->r_info);
if ( r_type == R_CRIS_GNU_VTINHERIT
|| r_type == R_CRIS_GNU_VTENTRY)
continue;
r_symndx = ELF32_R_SYM (rel->r_info);
if (info->relocateable)
@ -323,7 +323,7 @@ cris_elf_relocate_section (output_bfd, info, input_bfd, input_section,
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
{
sec = local_sections [r_symndx];
@ -339,7 +339,7 @@ cris_elf_relocate_section (output_bfd, info, input_bfd, input_section,
h = NULL;
sym = NULL;
sec = NULL;
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
@ -347,7 +347,7 @@ cris_elf_relocate_section (output_bfd, info, input_bfd, input_section,
relocation = (sec->output_section->vma
+ sec->output_offset
+ sym->st_value);
name = bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name);
name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
@ -361,13 +361,13 @@ cris_elf_relocate_section (output_bfd, info, input_bfd, input_section,
else
{
h = sym_hashes [r_symndx - symtab_hdr->sh_info];
while (h->root.type == bfd_link_hash_indirect
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
name = h->root.root.string;
if (h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
{
@ -405,7 +405,7 @@ cris_elf_relocate_section (output_bfd, info, input_bfd, input_section,
relocation = 0;
}
}
r = cris_final_link_relocate (howto, input_bfd, input_section,
contents, rel, relocation);
@ -420,13 +420,13 @@ cris_elf_relocate_section (output_bfd, info, input_bfd, input_section,
(info, name, howto->name, (bfd_vma) 0,
input_bfd, input_section, rel->r_offset);
break;
case bfd_reloc_undefined:
r = info->callbacks->undefined_symbol
(info, name, input_bfd, input_section, rel->r_offset,
true);
break;
case bfd_reloc_outofrange:
msg = _("internal error: out of range error");
break;
@ -519,7 +519,7 @@ cris_elf_gc_sweep_hook (abfd, info, sec, relocs)
/* Look through the relocs for a section during the first phase.
Since we don't do .gots or .plts, we just need to consider the
virtual table relocs for gc. */
static boolean
cris_elf_check_relocs (abfd, info, sec, relocs)
bfd *abfd;
@ -531,28 +531,28 @@ cris_elf_check_relocs (abfd, info, sec, relocs)
struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
const Elf_Internal_Rela *rel;
const Elf_Internal_Rela *rel_end;
if (info->relocateable)
return true;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof(Elf32_External_Sym);
sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
if (!elf_bad_symtab (abfd))
sym_hashes_end -= symtab_hdr->sh_info;
rel_end = relocs + sec->reloc_count;
for (rel = relocs; rel < rel_end; rel++)
{
struct elf_link_hash_entry *h;
unsigned long r_symndx;
r_symndx = ELF32_R_SYM (rel->r_info);
if (r_symndx < symtab_hdr->sh_info)
h = NULL;
else
h = sym_hashes[r_symndx - symtab_hdr->sh_info];
switch (ELF32_R_TYPE (rel->r_info))
{
/* This relocation describes the C++ object vtable hierarchy.
@ -561,7 +561,7 @@ cris_elf_check_relocs (abfd, info, sec, relocs)
if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
return false;
break;
/* This relocation describes which C++ vtable entries are actually
used. Record for later use during GC. */
case R_CRIS_GNU_VTENTRY:
@ -570,7 +570,7 @@ cris_elf_check_relocs (abfd, info, sec, relocs)
break;
}
}
return true;
}

23
bfd/elf32-d10v.c
View File

@ -29,7 +29,6 @@ static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
static void d10v_info_to_howto_rel
PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
/* Use REL instead of RELA to save space */
#define USE_REL
@ -171,7 +170,7 @@ static reloc_howto_type elf_d10v_howto_table[] =
0, /* src_mask */
0, /* dst_mask */
false), /* pcrel_offset */
};
/* Map BFD reloc types to D10V ELF reloc types. */
@ -286,7 +285,7 @@ elf32_d10v_gc_sweep_hook (abfd, info, sec, relocs)
/* Look through the relocs for a section during the first phase.
Since we don't do .gots or .plts, we just need to consider the
virtual table relocs for gc. */
static boolean
elf32_d10v_check_relocs (abfd, info, sec, relocs)
bfd *abfd;
@ -298,28 +297,28 @@ elf32_d10v_check_relocs (abfd, info, sec, relocs)
struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
const Elf_Internal_Rela *rel;
const Elf_Internal_Rela *rel_end;
if (info->relocateable)
return true;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof(Elf32_External_Sym);
sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
if (!elf_bad_symtab (abfd))
sym_hashes_end -= symtab_hdr->sh_info;
rel_end = relocs + sec->reloc_count;
for (rel = relocs; rel < rel_end; rel++)
{
struct elf_link_hash_entry *h;
unsigned long r_symndx;
r_symndx = ELF32_R_SYM (rel->r_info);
if (r_symndx < symtab_hdr->sh_info)
h = NULL;
else
h = sym_hashes[r_symndx - symtab_hdr->sh_info];
switch (ELF32_R_TYPE (rel->r_info))
{
/* This relocation describes the C++ object vtable hierarchy.
@ -328,7 +327,7 @@ elf32_d10v_check_relocs (abfd, info, sec, relocs)
if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
return false;
break;
/* This relocation describes which C++ vtable entries are actually
used. Record for later use during GC. */
case R_D10V_GNU_VTENTRY:
@ -337,7 +336,7 @@ elf32_d10v_check_relocs (abfd, info, sec, relocs)
break;
}
}
return true;
}
@ -450,7 +449,7 @@ elf32_d10v_relocate_section (output_bfd, info, input_bfd, input_section,
if (name == NULL || *name == '\0')
name = bfd_section_name (input_bfd, sec);
}
r = _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset,
relocation, rel->r_addend);

30
bfd/elf32-d30v.c
View File

@ -280,7 +280,7 @@ bfd_elf_d30v_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
r = bfd_elf_generic_reloc (abfd, reloc_entry, symbol, data,
input_section, output_bfd, error_message);
if (r != bfd_reloc_continue)
return r;
return r;
/* a hacked-up version of bfd_perform_reloc() follows */
if (bfd_is_und_section (symbol->section)
@ -315,11 +315,11 @@ bfd_elf_d30v_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
if (howto->pc_relative == true)
{
tmp_addr = input_section->output_section->vma + input_section->output_offset
tmp_addr = input_section->output_section->vma + input_section->output_offset
+ reloc_entry->address;
relocation -= tmp_addr;
}
in1 = bfd_get_32 (abfd, (bfd_byte *) data + addr);
in2 = bfd_get_32 (abfd, (bfd_byte *) data + addr + 4);
@ -329,7 +329,7 @@ bfd_elf_d30v_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
| ((in1 & 0x3F) << 26));
in1 &= 0xFFFFFFC0;
in2 = 0x80000000;
relocation += num;
if (howto->pc_relative == true && howto->bitsize == 32)
@ -343,11 +343,11 @@ bfd_elf_d30v_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
make_absolute = 1;
}
}
in1 |= (relocation >> 26) & 0x3F; /* top 6 bits */
in2 |= ((relocation & 0x03FC0000) << 2); /* next 8 bits */
in2 |= ((relocation & 0x03FC0000) << 2); /* next 8 bits */
in2 |= relocation & 0x0003FFFF; /* bottom 18 bits */
/* change a PC-relative instruction to its absolute equivalent */
/* with this simple hack */
if (make_absolute)
@ -355,10 +355,9 @@ bfd_elf_d30v_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
bfd_put_32 (abfd, in1, (bfd_byte *) data + addr);
bfd_put_32 (abfd, in2, (bfd_byte *) data + addr + 4);
return flag;
}
return flag;
}
static bfd_reloc_status_type
bfd_elf_d30v_reloc_21 (abfd, reloc_entry, symbol, data, input_section, output_bfd, error_message)
@ -386,11 +385,11 @@ bfd_elf_d30v_reloc_21 (abfd, reloc_entry, symbol, data, input_section, output_bf
reloc_entry->address += input_section->output_offset;
return bfd_reloc_ok;
}
r = bfd_elf_generic_reloc (abfd, reloc_entry, symbol, data,
input_section, output_bfd, error_message);
if (r != bfd_reloc_continue)
return r;
return r;
/* a hacked-up version of bfd_perform_reloc() follows */
if (bfd_is_und_section (symbol->section)
@ -462,16 +461,16 @@ bfd_elf_d30v_reloc_21 (abfd, reloc_entry, symbol, data, input_section, output_bf
if ((int)relocation > max)
flag = bfd_reloc_overflow;
}
relocation >>= 3;
relocation >>= 3;
if (howto->bitsize == 6)
in1 |= ((relocation & (mask >> 12)) << 12);
else
in1 |= relocation & mask;
bfd_put_32 (abfd, in1, (bfd_byte *) data + addr);
return flag;
}
}
/* Map BFD reloc types to D30V ELF reloc types. */
@ -481,7 +480,6 @@ struct d30v_reloc_map
unsigned char elf_reloc_val;
};
static const struct d30v_reloc_map d30v_reloc_map[] =
{
{ BFD_RELOC_NONE, R_D30V_NONE, },