* Makefile.in (devices.o): Add dependencies.
* arch.h,cpu.c,cpu.h,cpuall.h: Regenerate. * sem-switch.c,sem.c: Regenerate. * mloop.in (execute): Update calls to TRACE_INSN_{INIT,FINI}. * cpux.c,cpux.h,modelx.c,semx.c: Regenerate. * m32rx.c (m32rx_model_mark_{busy,unbusy}_reg): New functions. * mloopx.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
This commit is contained in:
parent
bcb829fdbd
commit
a8981d6751
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@ -1,3 +1,20 @@
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Fri May 15 16:43:27 1998 Doug Evans <devans@seba.cygnus.com>
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* Makefile.in (devices.o): Add dependencies.
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* arch.h,cpu.c,cpu.h,cpuall.h: Regenerate.
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* sem-switch.c,sem.c: Regenerate.
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* mloop.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
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start-sanitize-m32rx
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* cpux.c,cpux.h,modelx.c,semx.c: Regenerate.
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* m32rx.c (m32rx_model_mark_{busy,unbusy}_reg): New functions.
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* mloopx.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
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end-sanitize-m32rx
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Thu May 7 02:51:35 1998 Doug Evans <devans@seba.cygnus.com>
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* Makefile.in (SIM_OBJS): Add sim-cpu.o.
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Wed May 6 14:51:39 1998 Doug Evans <devans@seba.cygnus.com>
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Wed May 6 14:51:39 1998 Doug Evans <devans@seba.cygnus.com>
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* arch.h,arch.c,cpu.h,cpuall.h: Regenerate, tweaks mostly.
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* arch.h,arch.c,cpu.h,cpuall.h: Regenerate, tweaks mostly.
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@ -36,7 +36,7 @@ EOF
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xinit)
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xinit)
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cat <<EOF
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cat <<EOF
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DECODE *d1,*d2;
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const IDESC *d1,*d2;
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ARGBUF abufs[MAX_PARALLEL_INSNS];
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ARGBUF abufs[MAX_PARALLEL_INSNS];
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PAREXEC pbufs[MAX_PARALLEL_INSNS];
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PAREXEC pbufs[MAX_PARALLEL_INSNS];
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EOF
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EOF
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@ -57,6 +57,7 @@ cat <<EOF
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insn &= 0x7fff;
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insn &= 0x7fff;
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d1 = m32rx_decode (current_cpu, pc, insn);
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d1 = m32rx_decode (current_cpu, pc, insn);
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abufs[0].insn = insn;
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abufs[0].insn = insn;
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abufs[0].idesc = d1;
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icount = 1;
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icount = 1;
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}
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}
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else
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else
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@ -66,6 +67,7 @@ cat <<EOF
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{
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{
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d1 = m32rx_decode (current_cpu, pc, insn >> 16);
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d1 = m32rx_decode (current_cpu, pc, insn >> 16);
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abufs[0].insn = insn;
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abufs[0].insn = insn;
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abufs[0].idesc = d1;
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icount = 1;
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icount = 1;
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}
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}
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else
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else
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@ -74,14 +76,17 @@ cat <<EOF
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{
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{
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d1 = m32rx_decode (current_cpu, pc, insn >> 16);
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d1 = m32rx_decode (current_cpu, pc, insn >> 16);
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abufs[0].insn = insn >> 16;
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abufs[0].insn = insn >> 16;
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abufs[0].idesc = d1;
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d2 = m32rx_decode (current_cpu, pc, insn & 0x7fff);
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d2 = m32rx_decode (current_cpu, pc, insn & 0x7fff);
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abufs[1].insn = insn & 0x7fff;
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abufs[1].insn = insn & 0x7fff;
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abufs[1].idesc = d2;
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icount = 2;
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icount = 2;
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}
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}
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else
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else
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{
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{
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d1 = m32rx_decode (current_cpu, pc, insn >> 16);
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d1 = m32rx_decode (current_cpu, pc, insn >> 16);
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abufs[0].insn = insn >> 16;
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abufs[0].insn = insn >> 16;
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abufs[0].idesc = d1;
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icount = 1;
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icount = 1;
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}
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}
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}
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}
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@ -90,7 +95,7 @@ cat <<EOF
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{
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{
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int icount2 = icount;
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int icount2 = icount;
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USI insn = abufs[0].insn;
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USI insn = abufs[0].insn;
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DECODE *decode = d1;
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const IDESC *decode = d1;
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/* decode, par_exec, and insn are refered to by readx.c. */
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/* decode, par_exec, and insn are refered to by readx.c. */
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PAREXEC *par_exec = &pbufs[0];
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PAREXEC *par_exec = &pbufs[0];
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do
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do
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@ -117,17 +122,18 @@ cat <<EOF
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PAREXEC *par_exec = &pbufs[0];
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PAREXEC *par_exec = &pbufs[0];
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PCADDR new_pc;
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PCADDR new_pc;
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#if 0 /* wip */
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/* If doing parallel execution, verify insns are in the right pipeline. */
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/* If doing parallel execution, verify insns are in the right pipeline. */
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if (icount == 2)
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if (icount == 2)
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{
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{
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; /*wip*/
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...
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}
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}
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#endif
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TRACE_INSN_INIT (current_cpu);
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TRACE_INSN_INIT (current_cpu, 1);
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TRACE_INSN (current_cpu, d1->opcode, sem_arg, CPU (h_pc));
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TRACE_INSN (current_cpu, d1->opcode, sem_arg, CPU (h_pc));
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new_pc = (*d1->semantic) (current_cpu, sem_arg, par_exec);
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new_pc = (*d1->sem_full) (current_cpu, sem_arg, par_exec);
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TRACE_INSN_FINI (current_cpu);
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TRACE_INSN_FINI (current_cpu, icount == 1);
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PROFILE_COUNT_INSN (current_cpu, CPU (h_pc), CGEN_INSN_INDEX (d1->opcode));
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/* The result of the semantic fn is one of:
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/* The result of the semantic fn is one of:
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- next address, branch only
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- next address, branch only
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@ -136,39 +142,44 @@ cat <<EOF
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- NEW_PC_4, 4 byte non-branch insn
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- NEW_PC_4, 4 byte non-branch insn
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*/
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*/
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/* The tests are ordered to try to favor the more frequent cases, while
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keeping the over all costs down. */
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if (new_pc == NEW_PC_4)
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if (new_pc == NEW_PC_4)
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CPU (h_pc) += 4;
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CPU (h_pc) += 4;
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else if (icount == 2)
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{
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/* Note that we only get here if doing parallel execution. */
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if (new_pc == NEW_PC_SKIP)
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{
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/* ??? Need generic notion of bypassing an insn for the name of
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this macro. Annulled? On the otherhand such tracing can go
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in the sc/snc semantic fn. */
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; /*TRACE_INSN_SKIPPED (current_cpu);*/
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CPU (h_pc) += 4;
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}
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else
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{
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PCADDR pc2;
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++sem_arg;
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++par_exec;
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TRACE_INSN_INIT (current_cpu, 0);
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TRACE_INSN (current_cpu, d2->opcode, sem_arg, CPU (h_pc) + 2);
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/* pc2 isn't used. It's assigned a value for debugging. */
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pc2 = (*d2->sem_full) (current_cpu, sem_arg, par_exec);
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TRACE_INSN_FINI (current_cpu, 1);
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if (NEW_PC_BRANCH_P (new_pc))
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CPU (h_pc) = new_pc;
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else
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CPU (h_pc) += 4;
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}
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}
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else if (NEW_PC_BRANCH_P (new_pc))
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else if (NEW_PC_BRANCH_P (new_pc))
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CPU (h_pc) = new_pc;
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CPU (h_pc) = new_pc;
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else
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else
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{
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CPU (h_pc) += 2;
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PCADDR pc = CPU (h_pc);
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CPU (h_pc) = pc + 2;
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if (icount == 2)
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{
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/* Note that we only get here if doing parallel execution. */
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if (new_pc == NEW_PC_SKIP)
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{
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/* ??? Need generic notion of bypassing an insn for the name of
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this macro. Annulled? On the otherhand such tracing can go
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in the sc/snc semantic fn. */
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; /*TRACE_INSN_SKIPPED (current_cpu);*/
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}
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else
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{
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++sem_arg;
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++par_exec;
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TRACE_INSN_INIT (current_cpu);
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TRACE_INSN (current_cpu, d2->opcode, sem_arg, CPU (h_pc));
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/* new_pc isn't used. It's assigned a value for debugging. */
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new_pc = (*d2->semantic) (current_cpu, sem_arg, par_exec);
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TRACE_INSN_FINI (current_cpu);
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PROFILE_COUNT_INSN (current_cpu, pc, CGEN_INSN_INDEX (d2->opcode));
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}
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CPU (h_pc) = pc + 4;
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}
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}
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}
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}
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EOF
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EOF
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@ -27,118 +27,118 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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/* The labels have the case they have because the enum of insn types
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/* The labels have the case they have because the enum of insn types
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is all uppercase and in the non-stdc case the insn symbol is built
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is all uppercase and in the non-stdc case the insn symbol is built
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into the enum name.
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into the enum name. */
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The order here must match the order in m32r_decode_vars in decode.c. */
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static struct {
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int index;
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static void *labels[] = {
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void *label;
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&& case_sem_INSN_ILLEGAL,
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} labels[] = {
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&& case_sem_INSN_ADD,
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{ M32R_XINSN_ILLEGAL, && case_sem_INSN_ILLEGAL },
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&& case_sem_INSN_ADD3,
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{ M32R_XINSN_ADD, && case_sem_INSN_ADD },
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&& case_sem_INSN_AND,
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{ M32R_XINSN_ADD3, && case_sem_INSN_ADD3 },
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&& case_sem_INSN_AND3,
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{ M32R_XINSN_AND, && case_sem_INSN_AND },
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&& case_sem_INSN_OR,
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{ M32R_XINSN_AND3, && case_sem_INSN_AND3 },
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&& case_sem_INSN_OR3,
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{ M32R_XINSN_OR, && case_sem_INSN_OR },
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&& case_sem_INSN_XOR,
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{ M32R_XINSN_OR3, && case_sem_INSN_OR3 },
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&& case_sem_INSN_XOR3,
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{ M32R_XINSN_XOR, && case_sem_INSN_XOR },
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&& case_sem_INSN_ADDI,
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{ M32R_XINSN_XOR3, && case_sem_INSN_XOR3 },
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&& case_sem_INSN_ADDV,
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{ M32R_XINSN_ADDI, && case_sem_INSN_ADDI },
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&& case_sem_INSN_ADDV3,
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{ M32R_XINSN_ADDV, && case_sem_INSN_ADDV },
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&& case_sem_INSN_ADDX,
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{ M32R_XINSN_ADDV3, && case_sem_INSN_ADDV3 },
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&& case_sem_INSN_BC8,
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{ M32R_XINSN_ADDX, && case_sem_INSN_ADDX },
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&& case_sem_INSN_BC24,
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{ M32R_XINSN_BC8, && case_sem_INSN_BC8 },
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&& case_sem_INSN_BEQ,
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{ M32R_XINSN_BC24, && case_sem_INSN_BC24 },
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&& case_sem_INSN_BEQZ,
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{ M32R_XINSN_BEQ, && case_sem_INSN_BEQ },
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&& case_sem_INSN_BGEZ,
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{ M32R_XINSN_BEQZ, && case_sem_INSN_BEQZ },
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&& case_sem_INSN_BGTZ,
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{ M32R_XINSN_BGEZ, && case_sem_INSN_BGEZ },
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&& case_sem_INSN_BLEZ,
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{ M32R_XINSN_BGTZ, && case_sem_INSN_BGTZ },
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&& case_sem_INSN_BLTZ,
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{ M32R_XINSN_BLEZ, && case_sem_INSN_BLEZ },
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&& case_sem_INSN_BNEZ,
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{ M32R_XINSN_BLTZ, && case_sem_INSN_BLTZ },
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&& case_sem_INSN_BL8,
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{ M32R_XINSN_BNEZ, && case_sem_INSN_BNEZ },
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&& case_sem_INSN_BL24,
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{ M32R_XINSN_BL8, && case_sem_INSN_BL8 },
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&& case_sem_INSN_BNC8,
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{ M32R_XINSN_BL24, && case_sem_INSN_BL24 },
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&& case_sem_INSN_BNC24,
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{ M32R_XINSN_BNC8, && case_sem_INSN_BNC8 },
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&& case_sem_INSN_BNE,
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{ M32R_XINSN_BNC24, && case_sem_INSN_BNC24 },
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&& case_sem_INSN_BRA8,
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{ M32R_XINSN_BNE, && case_sem_INSN_BNE },
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&& case_sem_INSN_BRA24,
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{ M32R_XINSN_BRA8, && case_sem_INSN_BRA8 },
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&& case_sem_INSN_CMP,
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{ M32R_XINSN_BRA24, && case_sem_INSN_BRA24 },
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&& case_sem_INSN_CMPI,
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{ M32R_XINSN_CMP, && case_sem_INSN_CMP },
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&& case_sem_INSN_CMPU,
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{ M32R_XINSN_CMPI, && case_sem_INSN_CMPI },
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&& case_sem_INSN_CMPUI,
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{ M32R_XINSN_CMPU, && case_sem_INSN_CMPU },
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&& case_sem_INSN_DIV,
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{ M32R_XINSN_CMPUI, && case_sem_INSN_CMPUI },
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&& case_sem_INSN_DIVU,
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{ M32R_XINSN_DIV, && case_sem_INSN_DIV },
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&& case_sem_INSN_REM,
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{ M32R_XINSN_DIVU, && case_sem_INSN_DIVU },
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&& case_sem_INSN_REMU,
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{ M32R_XINSN_REM, && case_sem_INSN_REM },
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&& case_sem_INSN_JL,
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{ M32R_XINSN_REMU, && case_sem_INSN_REMU },
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&& case_sem_INSN_JMP,
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{ M32R_XINSN_JL, && case_sem_INSN_JL },
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&& case_sem_INSN_LD,
|
{ M32R_XINSN_JMP, && case_sem_INSN_JMP },
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&& case_sem_INSN_LD_D,
|
{ M32R_XINSN_LD, && case_sem_INSN_LD },
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&& case_sem_INSN_LDB,
|
{ M32R_XINSN_LD_D, && case_sem_INSN_LD_D },
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&& case_sem_INSN_LDB_D,
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{ M32R_XINSN_LDB, && case_sem_INSN_LDB },
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&& case_sem_INSN_LDH,
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{ M32R_XINSN_LDB_D, && case_sem_INSN_LDB_D },
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&& case_sem_INSN_LDH_D,
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{ M32R_XINSN_LDH, && case_sem_INSN_LDH },
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&& case_sem_INSN_LDUB,
|
{ M32R_XINSN_LDH_D, && case_sem_INSN_LDH_D },
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&& case_sem_INSN_LDUB_D,
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{ M32R_XINSN_LDUB, && case_sem_INSN_LDUB },
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&& case_sem_INSN_LDUH,
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{ M32R_XINSN_LDUB_D, && case_sem_INSN_LDUB_D },
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&& case_sem_INSN_LDUH_D,
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{ M32R_XINSN_LDUH, && case_sem_INSN_LDUH },
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&& case_sem_INSN_LD_PLUS,
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{ M32R_XINSN_LDUH_D, && case_sem_INSN_LDUH_D },
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||||||
&& case_sem_INSN_LD24,
|
{ M32R_XINSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
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&& case_sem_INSN_LDI8,
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{ M32R_XINSN_LD24, && case_sem_INSN_LD24 },
|
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&& case_sem_INSN_LDI16,
|
{ M32R_XINSN_LDI8, && case_sem_INSN_LDI8 },
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||||||
&& case_sem_INSN_LOCK,
|
{ M32R_XINSN_LDI16, && case_sem_INSN_LDI16 },
|
||||||
&& case_sem_INSN_MACHI,
|
{ M32R_XINSN_LOCK, && case_sem_INSN_LOCK },
|
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&& case_sem_INSN_MACLO,
|
{ M32R_XINSN_MACHI, && case_sem_INSN_MACHI },
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||||||
&& case_sem_INSN_MACWHI,
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{ M32R_XINSN_MACLO, && case_sem_INSN_MACLO },
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&& case_sem_INSN_MACWLO,
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{ M32R_XINSN_MACWHI, && case_sem_INSN_MACWHI },
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&& case_sem_INSN_MUL,
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{ M32R_XINSN_MACWLO, && case_sem_INSN_MACWLO },
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&& case_sem_INSN_MULHI,
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{ M32R_XINSN_MUL, && case_sem_INSN_MUL },
|
||||||
&& case_sem_INSN_MULLO,
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{ M32R_XINSN_MULHI, && case_sem_INSN_MULHI },
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||||||
&& case_sem_INSN_MULWHI,
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{ M32R_XINSN_MULLO, && case_sem_INSN_MULLO },
|
||||||
&& case_sem_INSN_MULWLO,
|
{ M32R_XINSN_MULWHI, && case_sem_INSN_MULWHI },
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||||||
&& case_sem_INSN_MV,
|
{ M32R_XINSN_MULWLO, && case_sem_INSN_MULWLO },
|
||||||
&& case_sem_INSN_MVFACHI,
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{ M32R_XINSN_MV, && case_sem_INSN_MV },
|
||||||
&& case_sem_INSN_MVFACLO,
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{ M32R_XINSN_MVFACHI, && case_sem_INSN_MVFACHI },
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||||||
&& case_sem_INSN_MVFACMI,
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{ M32R_XINSN_MVFACLO, && case_sem_INSN_MVFACLO },
|
||||||
&& case_sem_INSN_MVFC,
|
{ M32R_XINSN_MVFACMI, && case_sem_INSN_MVFACMI },
|
||||||
&& case_sem_INSN_MVTACHI,
|
{ M32R_XINSN_MVFC, && case_sem_INSN_MVFC },
|
||||||
&& case_sem_INSN_MVTACLO,
|
{ M32R_XINSN_MVTACHI, && case_sem_INSN_MVTACHI },
|
||||||
&& case_sem_INSN_MVTC,
|
{ M32R_XINSN_MVTACLO, && case_sem_INSN_MVTACLO },
|
||||||
&& case_sem_INSN_NEG,
|
{ M32R_XINSN_MVTC, && case_sem_INSN_MVTC },
|
||||||
&& case_sem_INSN_NOP,
|
{ M32R_XINSN_NEG, && case_sem_INSN_NEG },
|
||||||
&& case_sem_INSN_NOT,
|
{ M32R_XINSN_NOP, && case_sem_INSN_NOP },
|
||||||
&& case_sem_INSN_RAC,
|
{ M32R_XINSN_NOT, && case_sem_INSN_NOT },
|
||||||
&& case_sem_INSN_RACH,
|
{ M32R_XINSN_RAC, && case_sem_INSN_RAC },
|
||||||
&& case_sem_INSN_RTE,
|
{ M32R_XINSN_RACH, && case_sem_INSN_RACH },
|
||||||
&& case_sem_INSN_SETH,
|
{ M32R_XINSN_RTE, && case_sem_INSN_RTE },
|
||||||
&& case_sem_INSN_SLL,
|
{ M32R_XINSN_SETH, && case_sem_INSN_SETH },
|
||||||
&& case_sem_INSN_SLL3,
|
{ M32R_XINSN_SLL, && case_sem_INSN_SLL },
|
||||||
&& case_sem_INSN_SLLI,
|
{ M32R_XINSN_SLL3, && case_sem_INSN_SLL3 },
|
||||||
&& case_sem_INSN_SRA,
|
{ M32R_XINSN_SLLI, && case_sem_INSN_SLLI },
|
||||||
&& case_sem_INSN_SRA3,
|
{ M32R_XINSN_SRA, && case_sem_INSN_SRA },
|
||||||
&& case_sem_INSN_SRAI,
|
{ M32R_XINSN_SRA3, && case_sem_INSN_SRA3 },
|
||||||
&& case_sem_INSN_SRL,
|
{ M32R_XINSN_SRAI, && case_sem_INSN_SRAI },
|
||||||
&& case_sem_INSN_SRL3,
|
{ M32R_XINSN_SRL, && case_sem_INSN_SRL },
|
||||||
&& case_sem_INSN_SRLI,
|
{ M32R_XINSN_SRL3, && case_sem_INSN_SRL3 },
|
||||||
&& case_sem_INSN_ST,
|
{ M32R_XINSN_SRLI, && case_sem_INSN_SRLI },
|
||||||
&& case_sem_INSN_ST_D,
|
{ M32R_XINSN_ST, && case_sem_INSN_ST },
|
||||||
&& case_sem_INSN_STB,
|
{ M32R_XINSN_ST_D, && case_sem_INSN_ST_D },
|
||||||
&& case_sem_INSN_STB_D,
|
{ M32R_XINSN_STB, && case_sem_INSN_STB },
|
||||||
&& case_sem_INSN_STH,
|
{ M32R_XINSN_STB_D, && case_sem_INSN_STB_D },
|
||||||
&& case_sem_INSN_STH_D,
|
{ M32R_XINSN_STH, && case_sem_INSN_STH },
|
||||||
&& case_sem_INSN_ST_PLUS,
|
{ M32R_XINSN_STH_D, && case_sem_INSN_STH_D },
|
||||||
&& case_sem_INSN_ST_MINUS,
|
{ M32R_XINSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
|
||||||
&& case_sem_INSN_SUB,
|
{ M32R_XINSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
|
||||||
&& case_sem_INSN_SUBV,
|
{ M32R_XINSN_SUB, && case_sem_INSN_SUB },
|
||||||
&& case_sem_INSN_SUBX,
|
{ M32R_XINSN_SUBV, && case_sem_INSN_SUBV },
|
||||||
&& case_sem_INSN_TRAP,
|
{ M32R_XINSN_SUBX, && case_sem_INSN_SUBX },
|
||||||
&& case_sem_INSN_UNLOCK,
|
{ M32R_XINSN_TRAP, && case_sem_INSN_TRAP },
|
||||||
0
|
{ M32R_XINSN_UNLOCK, && case_sem_INSN_UNLOCK },
|
||||||
|
{ 0, 0 }
|
||||||
};
|
};
|
||||||
extern DECODE *m32r_decode_vars[];
|
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 0; m32r_decode_vars[i] != 0; ++i)
|
for (i = 0; labels[i].label != 0; ++i)
|
||||||
m32r_decode_vars[i]->semantic_lab = labels[i];
|
CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
|
||||||
|
|
||||||
#endif /* DEFINE_LABELS */
|
#endif /* DEFINE_LABELS */
|
||||||
|
|
||||||
|
@ -156,7 +156,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#undef GET_ATTR
|
#undef GET_ATTR
|
||||||
#define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->opcode, CGEN_INSN_##attr)
|
#define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->idesc->opcode, CGEN_INSN_##attr)
|
||||||
|
|
||||||
{
|
{
|
||||||
SEM_ARG sem_arg = sc;
|
SEM_ARG sem_arg = sc;
|
||||||
|
@ -338,28 +338,28 @@ do {
|
||||||
}
|
}
|
||||||
BREAK (sem);
|
BREAK (sem);
|
||||||
|
|
||||||
CASE (sem, INSN_BC8) : /* bc $disp8 */
|
CASE (sem, INSN_BC8) : /* bc.s $disp8 */
|
||||||
{
|
{
|
||||||
#define FLD(f) abuf->fields.fmt_bc8.f
|
#define FLD(f) abuf->fields.fmt_bc8.f
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
||||||
|
|
||||||
if (CPU (h_cond)) {
|
if (CPU (h_cond)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
BREAK (sem);
|
BREAK (sem);
|
||||||
|
|
||||||
CASE (sem, INSN_BC24) : /* bc $disp24 */
|
CASE (sem, INSN_BC24) : /* bc.l $disp24 */
|
||||||
{
|
{
|
||||||
#define FLD(f) abuf->fields.fmt_bc24.f
|
#define FLD(f) abuf->fields.fmt_bc24.f
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
||||||
|
|
||||||
if (CPU (h_cond)) {
|
if (CPU (h_cond)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -373,7 +373,7 @@ if (CPU (h_cond)) {
|
||||||
|
|
||||||
if (EQSI (* FLD (f_r1), * FLD (f_r2))) {
|
if (EQSI (* FLD (f_r1), * FLD (f_r2))) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -387,7 +387,7 @@ if (EQSI (* FLD (f_r1), * FLD (f_r2))) {
|
||||||
|
|
||||||
if (EQSI (* FLD (f_r2), 0)) {
|
if (EQSI (* FLD (f_r2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -401,7 +401,7 @@ if (EQSI (* FLD (f_r2), 0)) {
|
||||||
|
|
||||||
if (GESI (* FLD (f_r2), 0)) {
|
if (GESI (* FLD (f_r2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -415,7 +415,7 @@ if (GESI (* FLD (f_r2), 0)) {
|
||||||
|
|
||||||
if (GTSI (* FLD (f_r2), 0)) {
|
if (GTSI (* FLD (f_r2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -429,7 +429,7 @@ if (GTSI (* FLD (f_r2), 0)) {
|
||||||
|
|
||||||
if (LESI (* FLD (f_r2), 0)) {
|
if (LESI (* FLD (f_r2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -443,7 +443,7 @@ if (LESI (* FLD (f_r2), 0)) {
|
||||||
|
|
||||||
if (LTSI (* FLD (f_r2), 0)) {
|
if (LTSI (* FLD (f_r2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -457,67 +457,67 @@ if (LTSI (* FLD (f_r2), 0)) {
|
||||||
|
|
||||||
if (NESI (* FLD (f_r2), 0)) {
|
if (NESI (* FLD (f_r2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
BREAK (sem);
|
BREAK (sem);
|
||||||
|
|
||||||
CASE (sem, INSN_BL8) : /* bl $disp8 */
|
CASE (sem, INSN_BL8) : /* bl.s $disp8 */
|
||||||
{
|
{
|
||||||
#define FLD(f) abuf->fields.fmt_bl8.f
|
#define FLD(f) abuf->fields.fmt_bl8.f
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
||||||
|
|
||||||
do {
|
do {
|
||||||
CPU (h_gr[14]) = ADDSI (ANDSI (CPU (h_pc), -4), 4);
|
CPU (h_gr[14]) = ADDSI (ANDSI (CPU (h_pc), -4), 4);
|
||||||
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
|
TRACE_RESULT (current_cpu, "gr-14", 'x', CPU (h_gr[14]));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
BREAK (sem);
|
BREAK (sem);
|
||||||
|
|
||||||
CASE (sem, INSN_BL24) : /* bl $disp24 */
|
CASE (sem, INSN_BL24) : /* bl.l $disp24 */
|
||||||
{
|
{
|
||||||
#define FLD(f) abuf->fields.fmt_bl24.f
|
#define FLD(f) abuf->fields.fmt_bl24.f
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
||||||
|
|
||||||
do {
|
do {
|
||||||
CPU (h_gr[14]) = ADDSI (CPU (h_pc), 4);
|
CPU (h_gr[14]) = ADDSI (CPU (h_pc), 4);
|
||||||
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
|
TRACE_RESULT (current_cpu, "gr-14", 'x', CPU (h_gr[14]));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
BREAK (sem);
|
BREAK (sem);
|
||||||
|
|
||||||
CASE (sem, INSN_BNC8) : /* bnc $disp8 */
|
CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
|
||||||
{
|
{
|
||||||
#define FLD(f) abuf->fields.fmt_bc8.f
|
#define FLD(f) abuf->fields.fmt_bc8.f
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
||||||
|
|
||||||
if (NOTBI (CPU (h_cond))) {
|
if (NOTBI (CPU (h_cond))) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
BREAK (sem);
|
BREAK (sem);
|
||||||
|
|
||||||
CASE (sem, INSN_BNC24) : /* bnc $disp24 */
|
CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
|
||||||
{
|
{
|
||||||
#define FLD(f) abuf->fields.fmt_bc24.f
|
#define FLD(f) abuf->fields.fmt_bc24.f
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
||||||
|
|
||||||
if (NOTBI (CPU (h_cond))) {
|
if (NOTBI (CPU (h_cond))) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -531,32 +531,32 @@ if (NOTBI (CPU (h_cond))) {
|
||||||
|
|
||||||
if (NESI (* FLD (f_r1), * FLD (f_r2))) {
|
if (NESI (* FLD (f_r1), * FLD (f_r2))) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
BREAK (sem);
|
BREAK (sem);
|
||||||
|
|
||||||
CASE (sem, INSN_BRA8) : /* bra $disp8 */
|
CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
|
||||||
{
|
{
|
||||||
#define FLD(f) abuf->fields.fmt_bra8.f
|
#define FLD(f) abuf->fields.fmt_bra8.f
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
||||||
|
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
BREAK (sem);
|
BREAK (sem);
|
||||||
|
|
||||||
CASE (sem, INSN_BRA24) : /* bra $disp24 */
|
CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
|
||||||
{
|
{
|
||||||
#define FLD(f) abuf->fields.fmt_bra24.f
|
#define FLD(f) abuf->fields.fmt_bra24.f
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
||||||
|
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
|
@ -676,9 +676,9 @@ do {
|
||||||
temp0 = ADDSI (ANDSI (CPU (h_pc), -4), 4);
|
temp0 = ADDSI (ANDSI (CPU (h_pc), -4), 4);
|
||||||
temp1 = * FLD (f_r2);
|
temp1 = * FLD (f_r2);
|
||||||
CPU (h_gr[14]) = temp0;
|
CPU (h_gr[14]) = temp0;
|
||||||
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
|
TRACE_RESULT (current_cpu, "gr-14", 'x', CPU (h_gr[14]));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, temp1));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, temp1));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -691,7 +691,7 @@ do {
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
||||||
|
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, * FLD (f_r2)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, * FLD (f_r2)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
|
@ -848,7 +848,7 @@ do {
|
||||||
}
|
}
|
||||||
BREAK (sem);
|
BREAK (sem);
|
||||||
|
|
||||||
CASE (sem, INSN_LDI8) : /* ldi $dr,$simm8 */
|
CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
|
||||||
{
|
{
|
||||||
#define FLD(f) abuf->fields.fmt_ldi8.f
|
#define FLD(f) abuf->fields.fmt_ldi8.f
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
||||||
|
@ -860,7 +860,7 @@ do {
|
||||||
}
|
}
|
||||||
BREAK (sem);
|
BREAK (sem);
|
||||||
|
|
||||||
CASE (sem, INSN_LDI16) : /* ldi $dr,$hash$slo16 */
|
CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
|
||||||
{
|
{
|
||||||
#define FLD(f) abuf->fields.fmt_ldi16.f
|
#define FLD(f) abuf->fields.fmt_ldi16.f
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
||||||
|
@ -879,7 +879,7 @@ do {
|
||||||
|
|
||||||
do {
|
do {
|
||||||
CPU (h_lock) = 1;
|
CPU (h_lock) = 1;
|
||||||
TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
|
TRACE_RESULT (current_cpu, "lock-0", 'x', CPU (h_lock));
|
||||||
* FLD (f_r1) = GETMEMSI (current_cpu, * FLD (f_r2));
|
* FLD (f_r1) = GETMEMSI (current_cpu, * FLD (f_r2));
|
||||||
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
|
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
|
||||||
} while (0);
|
} while (0);
|
||||||
|
@ -1177,13 +1177,13 @@ m32r_h_accum_set (current_cpu, SRADI (SLLDI (tmp_tmp1, 7), 7));
|
||||||
|
|
||||||
do {
|
do {
|
||||||
CPU (h_sm) = CPU (h_bsm);
|
CPU (h_sm) = CPU (h_bsm);
|
||||||
TRACE_RESULT (current_cpu, "h-sm-0", 'x', CPU (h_sm));
|
TRACE_RESULT (current_cpu, "sm-0", 'x', CPU (h_sm));
|
||||||
CPU (h_ie) = CPU (h_bie);
|
CPU (h_ie) = CPU (h_bie);
|
||||||
TRACE_RESULT (current_cpu, "h-ie-0", 'x', CPU (h_ie));
|
TRACE_RESULT (current_cpu, "ie-0", 'x', CPU (h_ie));
|
||||||
CPU (h_cond) = CPU (h_bcond);
|
CPU (h_cond) = CPU (h_bcond);
|
||||||
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
|
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (CPU (h_bpc), -4)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (CPU (h_bpc), -4)));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -1316,7 +1316,7 @@ do {
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
||||||
|
|
||||||
SETMEMSI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
SETMEMSI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, * FLD (f_r2)));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMSI (current_cpu, * FLD (f_r2)));
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
|
@ -1328,7 +1328,7 @@ SETMEMSI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
||||||
|
|
||||||
SETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
|
SETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
|
@ -1340,7 +1340,7 @@ SETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
||||||
|
|
||||||
SETMEMQI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
SETMEMQI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMQI (current_cpu, * FLD (f_r2)));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMQI (current_cpu, * FLD (f_r2)));
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
|
@ -1352,7 +1352,7 @@ SETMEMQI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
||||||
|
|
||||||
SETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
|
SETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
|
@ -1364,7 +1364,7 @@ SETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
new_pc = SEM_NEXT_PC (sem_arg, 2);
|
||||||
|
|
||||||
SETMEMHI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
SETMEMHI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMHI (current_cpu, * FLD (f_r2)));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMHI (current_cpu, * FLD (f_r2)));
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
|
@ -1376,7 +1376,7 @@ SETMEMHI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
||||||
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
new_pc = SEM_NEXT_PC (sem_arg, 4);
|
||||||
|
|
||||||
SETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
|
SETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
}
|
}
|
||||||
|
@ -1391,7 +1391,7 @@ do {
|
||||||
SI tmp_new_src2;
|
SI tmp_new_src2;
|
||||||
tmp_new_src2 = ADDSI (* FLD (f_r2), 4);
|
tmp_new_src2 = ADDSI (* FLD (f_r2), 4);
|
||||||
SETMEMSI (current_cpu, tmp_new_src2, * FLD (f_r1));
|
SETMEMSI (current_cpu, tmp_new_src2, * FLD (f_r1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-new-src2", 'x', GETMEMSI (current_cpu, tmp_new_src2));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMSI (current_cpu, tmp_new_src2));
|
||||||
* FLD (f_r2) = tmp_new_src2;
|
* FLD (f_r2) = tmp_new_src2;
|
||||||
TRACE_RESULT (current_cpu, "src2", 'x', * FLD (f_r2));
|
TRACE_RESULT (current_cpu, "src2", 'x', * FLD (f_r2));
|
||||||
} while (0);
|
} while (0);
|
||||||
|
@ -1409,7 +1409,7 @@ do {
|
||||||
SI tmp_new_src2;
|
SI tmp_new_src2;
|
||||||
tmp_new_src2 = SUBSI (* FLD (f_r2), 4);
|
tmp_new_src2 = SUBSI (* FLD (f_r2), 4);
|
||||||
SETMEMSI (current_cpu, tmp_new_src2, * FLD (f_r1));
|
SETMEMSI (current_cpu, tmp_new_src2, * FLD (f_r1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-new-src2", 'x', GETMEMSI (current_cpu, tmp_new_src2));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMSI (current_cpu, tmp_new_src2));
|
||||||
* FLD (f_r2) = tmp_new_src2;
|
* FLD (f_r2) = tmp_new_src2;
|
||||||
TRACE_RESULT (current_cpu, "src2", 'x', * FLD (f_r2));
|
TRACE_RESULT (current_cpu, "src2", 'x', * FLD (f_r2));
|
||||||
} while (0);
|
} while (0);
|
||||||
|
@ -1475,11 +1475,11 @@ do {
|
||||||
|
|
||||||
do {
|
do {
|
||||||
m32r_h_cr_set (current_cpu, 6, ADDSI (CPU (h_pc), 4));
|
m32r_h_cr_set (current_cpu, 6, ADDSI (CPU (h_pc), 4));
|
||||||
TRACE_RESULT (current_cpu, "h-cr-6", 'x', m32r_h_cr_get (current_cpu, 6));
|
TRACE_RESULT (current_cpu, "cr-6", 'x', m32r_h_cr_get (current_cpu, 6));
|
||||||
m32r_h_cr_set (current_cpu, 0, ANDSI (SLLSI (m32r_h_cr_get (current_cpu, 0), 8), 65408));
|
m32r_h_cr_set (current_cpu, 0, ANDSI (SLLSI (m32r_h_cr_get (current_cpu, 0), 8), 65408));
|
||||||
TRACE_RESULT (current_cpu, "h-cr-0", 'x', m32r_h_cr_get (current_cpu, 0));
|
TRACE_RESULT (current_cpu, "cr-0", 'x', m32r_h_cr_get (current_cpu, 0));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, do_trap (current_cpu, FLD (f_uimm4))));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, do_trap (current_cpu, FLD (f_uimm4))));
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
@ -1494,10 +1494,10 @@ m32r_h_cr_set (current_cpu, 0, ANDSI (SLLSI (m32r_h_cr_get (current_cpu, 0), 8),
|
||||||
do {
|
do {
|
||||||
if (CPU (h_lock)) {
|
if (CPU (h_lock)) {
|
||||||
SETMEMSI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
SETMEMSI (current_cpu, * FLD (f_r2), * FLD (f_r1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, * FLD (f_r2)));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMSI (current_cpu, * FLD (f_r2)));
|
||||||
}
|
}
|
||||||
CPU (h_lock) = 0;
|
CPU (h_lock) = 0;
|
||||||
TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
|
TRACE_RESULT (current_cpu, "lock-0", 'x', CPU (h_lock));
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
#undef FLD
|
#undef FLD
|
||||||
|
|
577
sim/m32r/sem.c
577
sim/m32r/sem.c
File diff suppressed because it is too large
Load Diff
108
sim/m32r/semx.c
108
sim/m32r/semx.c
|
@ -30,7 +30,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
|
||||||
#include "cgen-ops.h"
|
#include "cgen-ops.h"
|
||||||
#include "cpu-sim.h"
|
#include "cpu-sim.h"
|
||||||
|
|
||||||
#if ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE)
|
#if ! WITH_SCACHE
|
||||||
|
|
||||||
#undef GET_ATTR
|
#undef GET_ATTR
|
||||||
#define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->idesc->opcode, CGEN_INSN_##attr)
|
#define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->idesc->opcode, CGEN_INSN_##attr)
|
||||||
|
@ -432,7 +432,7 @@ SEM_FN_NAME (m32rx,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
|
||||||
if (OPRND (condbit)) {
|
if (OPRND (condbit)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -464,7 +464,7 @@ SEM_FN_NAME (m32rx,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
if (OPRND (condbit)) {
|
if (OPRND (condbit)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -496,7 +496,7 @@ SEM_FN_NAME (m32rx,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
|
||||||
if (EQSI (OPRND (src1), OPRND (src2))) {
|
if (EQSI (OPRND (src1), OPRND (src2))) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -529,7 +529,7 @@ SEM_FN_NAME (m32rx,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
if (EQSI (OPRND (src2), 0)) {
|
if (EQSI (OPRND (src2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -562,7 +562,7 @@ SEM_FN_NAME (m32rx,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
if (GESI (OPRND (src2), 0)) {
|
if (GESI (OPRND (src2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -595,7 +595,7 @@ SEM_FN_NAME (m32rx,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
if (GTSI (OPRND (src2), 0)) {
|
if (GTSI (OPRND (src2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -628,7 +628,7 @@ SEM_FN_NAME (m32rx,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
if (LESI (OPRND (src2), 0)) {
|
if (LESI (OPRND (src2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -661,7 +661,7 @@ SEM_FN_NAME (m32rx,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
if (LTSI (OPRND (src2), 0)) {
|
if (LTSI (OPRND (src2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -694,7 +694,7 @@ SEM_FN_NAME (m32rx,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
if (NESI (OPRND (src2), 0)) {
|
if (NESI (OPRND (src2), 0)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -726,10 +726,10 @@ SEM_FN_NAME (m32rx,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
|
||||||
|
|
||||||
do {
|
do {
|
||||||
CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
|
CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
|
||||||
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
|
TRACE_RESULT (current_cpu, "gr-14", 'x', CPU (h_gr[14]));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -761,10 +761,10 @@ SEM_FN_NAME (m32rx,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
|
|
||||||
do {
|
do {
|
||||||
CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
|
CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
|
||||||
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
|
TRACE_RESULT (current_cpu, "gr-14", 'x', CPU (h_gr[14]));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -797,10 +797,10 @@ SEM_FN_NAME (m32rx,bcl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
if (OPRND (condbit)) {
|
if (OPRND (condbit)) {
|
||||||
do {
|
do {
|
||||||
CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
|
CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
|
||||||
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
|
TRACE_RESULT (current_cpu, "gr-14", 'x', CPU (h_gr[14]));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -834,10 +834,10 @@ SEM_FN_NAME (m32rx,bcl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
|
||||||
if (OPRND (condbit)) {
|
if (OPRND (condbit)) {
|
||||||
do {
|
do {
|
||||||
CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
|
CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
|
||||||
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
|
TRACE_RESULT (current_cpu, "gr-14", 'x', CPU (h_gr[14]));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -871,7 +871,7 @@ SEM_FN_NAME (m32rx,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
if (NOTBI (OPRND (condbit))) {
|
if (NOTBI (OPRND (condbit))) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -903,7 +903,7 @@ SEM_FN_NAME (m32rx,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
|
||||||
if (NOTBI (OPRND (condbit))) {
|
if (NOTBI (OPRND (condbit))) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -935,7 +935,7 @@ SEM_FN_NAME (m32rx,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
|
||||||
if (NESI (OPRND (src1), OPRND (src2))) {
|
if (NESI (OPRND (src1), OPRND (src2))) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -967,7 +967,7 @@ SEM_FN_NAME (m32rx,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
|
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -997,7 +997,7 @@ SEM_FN_NAME (m32rx,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
|
||||||
|
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -1028,10 +1028,10 @@ SEM_FN_NAME (m32rx,bncl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
|
||||||
if (NOTBI (OPRND (condbit))) {
|
if (NOTBI (OPRND (condbit))) {
|
||||||
do {
|
do {
|
||||||
CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
|
CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
|
||||||
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
|
TRACE_RESULT (current_cpu, "gr-14", 'x', CPU (h_gr[14]));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1065,10 +1065,10 @@ SEM_FN_NAME (m32rx,bncl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
|
||||||
if (NOTBI (OPRND (condbit))) {
|
if (NOTBI (OPRND (condbit))) {
|
||||||
do {
|
do {
|
||||||
CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
|
CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
|
||||||
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
|
TRACE_RESULT (current_cpu, "gr-14", 'x', CPU (h_gr[14]));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1436,7 +1436,7 @@ SEM_FN_NAME (m32rx,jc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec
|
||||||
if (OPRND (condbit)) {
|
if (OPRND (condbit)) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -1469,7 +1469,7 @@ SEM_FN_NAME (m32rx,jnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
|
||||||
if (NOTBI (OPRND (condbit))) {
|
if (NOTBI (OPRND (condbit))) {
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -1504,10 +1504,10 @@ do {
|
||||||
temp0 = ADDSI (ANDSI (OPRND (pc), -4), 4);
|
temp0 = ADDSI (ANDSI (OPRND (pc), -4), 4);
|
||||||
temp1 = OPRND (sr);
|
temp1 = OPRND (sr);
|
||||||
CPU (h_gr[14]) = temp0;
|
CPU (h_gr[14]) = temp0;
|
||||||
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
|
TRACE_RESULT (current_cpu, "gr-14", 'x', CPU (h_gr[14]));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, temp1));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, temp1));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -1540,7 +1540,7 @@ SEM_FN_NAME (m32rx,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
|
||||||
|
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, OPRND (sr)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, OPRND (sr)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -1994,7 +1994,7 @@ SEM_FN_NAME (m32rx,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
|
|
||||||
do {
|
do {
|
||||||
CPU (h_lock) = 1;
|
CPU (h_lock) = 1;
|
||||||
TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
|
TRACE_RESULT (current_cpu, "lock-0", 'x', CPU (h_lock));
|
||||||
CPU (h_gr[f_r1]) = OPRND (h_memory_sr);
|
CPU (h_gr[f_r1]) = OPRND (h_memory_sr);
|
||||||
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
|
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
|
||||||
} while (0);
|
} while (0);
|
||||||
|
@ -2677,14 +2677,14 @@ SEM_FN_NAME (m32rx,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
|
||||||
|
|
||||||
do {
|
do {
|
||||||
CPU (h_sm) = OPRND (h_bsm_0);
|
CPU (h_sm) = OPRND (h_bsm_0);
|
||||||
TRACE_RESULT (current_cpu, "h-sm-0", 'x', CPU (h_sm));
|
TRACE_RESULT (current_cpu, "sm-0", 'x', CPU (h_sm));
|
||||||
CPU (h_ie) = OPRND (h_bie_0);
|
CPU (h_ie) = OPRND (h_bie_0);
|
||||||
TRACE_RESULT (current_cpu, "h-ie-0", 'x', CPU (h_ie));
|
TRACE_RESULT (current_cpu, "ie-0", 'x', CPU (h_ie));
|
||||||
CPU (h_cond) = OPRND (h_bcond_0);
|
CPU (h_cond) = OPRND (h_bcond_0);
|
||||||
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
|
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (h_bpc_0), -4)));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (h_bpc_0), -4)));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -3012,7 +3012,7 @@ SEM_FN_NAME (m32rx,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec
|
||||||
EXTRACT_FMT_ST_CODE
|
EXTRACT_FMT_ST_CODE
|
||||||
|
|
||||||
SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
|
SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMSI (current_cpu, OPRND (src2)));
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -3041,7 +3041,7 @@ SEM_FN_NAME (m32rx,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
EXTRACT_FMT_ST_D_CODE
|
EXTRACT_FMT_ST_D_CODE
|
||||||
|
|
||||||
SETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
|
SETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -3070,7 +3070,7 @@ SEM_FN_NAME (m32rx,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
|
||||||
EXTRACT_FMT_STB_CODE
|
EXTRACT_FMT_STB_CODE
|
||||||
|
|
||||||
SETMEMQI (current_cpu, OPRND (src2), OPRND (src1));
|
SETMEMQI (current_cpu, OPRND (src2), OPRND (src1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMQI (current_cpu, OPRND (src2)));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMQI (current_cpu, OPRND (src2)));
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -3099,7 +3099,7 @@ SEM_FN_NAME (m32rx,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
|
||||||
EXTRACT_FMT_STB_D_CODE
|
EXTRACT_FMT_STB_D_CODE
|
||||||
|
|
||||||
SETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
|
SETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -3128,7 +3128,7 @@ SEM_FN_NAME (m32rx,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
|
||||||
EXTRACT_FMT_STH_CODE
|
EXTRACT_FMT_STH_CODE
|
||||||
|
|
||||||
SETMEMHI (current_cpu, OPRND (src2), OPRND (src1));
|
SETMEMHI (current_cpu, OPRND (src2), OPRND (src1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMHI (current_cpu, OPRND (src2)));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMHI (current_cpu, OPRND (src2)));
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -3157,7 +3157,7 @@ SEM_FN_NAME (m32rx,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
|
||||||
EXTRACT_FMT_STH_D_CODE
|
EXTRACT_FMT_STH_D_CODE
|
||||||
|
|
||||||
SETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
|
SETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -3189,7 +3189,7 @@ do {
|
||||||
SI tmp_new_src2;
|
SI tmp_new_src2;
|
||||||
tmp_new_src2 = ADDSI (OPRND (src2), 4);
|
tmp_new_src2 = ADDSI (OPRND (src2), 4);
|
||||||
SETMEMSI (current_cpu, tmp_new_src2, OPRND (src1));
|
SETMEMSI (current_cpu, tmp_new_src2, OPRND (src1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-new-src2", 'x', GETMEMSI (current_cpu, tmp_new_src2));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMSI (current_cpu, tmp_new_src2));
|
||||||
CPU (h_gr[f_r2]) = tmp_new_src2;
|
CPU (h_gr[f_r2]) = tmp_new_src2;
|
||||||
TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
|
TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
|
||||||
} while (0);
|
} while (0);
|
||||||
|
@ -3225,7 +3225,7 @@ do {
|
||||||
SI tmp_new_src2;
|
SI tmp_new_src2;
|
||||||
tmp_new_src2 = SUBSI (OPRND (src2), 4);
|
tmp_new_src2 = SUBSI (OPRND (src2), 4);
|
||||||
SETMEMSI (current_cpu, tmp_new_src2, OPRND (src1));
|
SETMEMSI (current_cpu, tmp_new_src2, OPRND (src1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-new-src2", 'x', GETMEMSI (current_cpu, tmp_new_src2));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMSI (current_cpu, tmp_new_src2));
|
||||||
CPU (h_gr[f_r2]) = tmp_new_src2;
|
CPU (h_gr[f_r2]) = tmp_new_src2;
|
||||||
TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
|
TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
|
||||||
} while (0);
|
} while (0);
|
||||||
|
@ -3364,12 +3364,12 @@ SEM_FN_NAME (m32rx,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
|
|
||||||
do {
|
do {
|
||||||
m32rx_h_cr_set (current_cpu, 6, ADDSI (OPRND (pc), 4));
|
m32rx_h_cr_set (current_cpu, 6, ADDSI (OPRND (pc), 4));
|
||||||
TRACE_RESULT (current_cpu, "h-cr-6", 'x', m32rx_h_cr_get (current_cpu, 6));
|
TRACE_RESULT (current_cpu, "cr-6", 'x', m32rx_h_cr_get (current_cpu, 6));
|
||||||
m32rx_h_cr_set (current_cpu, 0, ANDSI (SLLSI (OPRND (h_cr_0), 8), 65408));
|
m32rx_h_cr_set (current_cpu, 0, ANDSI (SLLSI (OPRND (h_cr_0), 8), 65408));
|
||||||
TRACE_RESULT (current_cpu, "h-cr-0", 'x', m32rx_h_cr_get (current_cpu, 0));
|
TRACE_RESULT (current_cpu, "cr-0", 'x', m32rx_h_cr_get (current_cpu, 0));
|
||||||
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, do_trap (current_cpu, OPRND (uimm4))));
|
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, do_trap (current_cpu, OPRND (uimm4))));
|
||||||
taken_p = 1;
|
taken_p = 1;
|
||||||
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
|
TRACE_RESULT (current_cpu, "pc", 'x', new_pc);
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -3400,10 +3400,10 @@ SEM_FN_NAME (m32rx,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
|
||||||
do {
|
do {
|
||||||
if (OPRND (h_lock_0)) {
|
if (OPRND (h_lock_0)) {
|
||||||
SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
|
SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
|
||||||
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
|
TRACE_RESULT (current_cpu, "memory", 'x', GETMEMSI (current_cpu, OPRND (src2)));
|
||||||
}
|
}
|
||||||
CPU (h_lock) = 0;
|
CPU (h_lock) = 0;
|
||||||
TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
|
TRACE_RESULT (current_cpu, "lock-0", 'x', CPU (h_lock));
|
||||||
} while (0);
|
} while (0);
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
@ -3552,7 +3552,7 @@ SEM_FN_NAME (m32rx,sadd) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
|
||||||
EXTRACT_FMT_SADD_CODE
|
EXTRACT_FMT_SADD_CODE
|
||||||
|
|
||||||
m32rx_h_accums_set (current_cpu, 0, ADDDI (SRADI (OPRND (h_accums_1), 16), OPRND (h_accums_0)));
|
m32rx_h_accums_set (current_cpu, 0, ADDDI (SRADI (OPRND (h_accums_1), 16), OPRND (h_accums_0)));
|
||||||
TRACE_RESULT (current_cpu, "h-accums-0", 'D', m32rx_h_accums_get (current_cpu, 0));
|
TRACE_RESULT (current_cpu, "accums-0", 'D', m32rx_h_accums_get (current_cpu, 0));
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -3580,7 +3580,7 @@ SEM_FN_NAME (m32rx,macwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
|
||||||
EXTRACT_FMT_MACWU1_CODE
|
EXTRACT_FMT_MACWU1_CODE
|
||||||
|
|
||||||
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535)))), 8), 8));
|
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535)))), 8), 8));
|
||||||
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
|
TRACE_RESULT (current_cpu, "accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -3638,7 +3638,7 @@ SEM_FN_NAME (m32rx,mulwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
|
||||||
EXTRACT_FMT_MULWU1_CODE
|
EXTRACT_FMT_MULWU1_CODE
|
||||||
|
|
||||||
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535))), 16), 16));
|
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535))), 16), 16));
|
||||||
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
|
TRACE_RESULT (current_cpu, "accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -3667,7 +3667,7 @@ SEM_FN_NAME (m32rx,maclh1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
|
||||||
EXTRACT_FMT_MACWU1_CODE
|
EXTRACT_FMT_MACWU1_CODE
|
||||||
|
|
||||||
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (OPRND (src1))), SRASI (OPRND (src2), 16))), 16)), 8), 8));
|
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (OPRND (src1))), SRASI (OPRND (src2), 16))), 16)), 8), 8));
|
||||||
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
|
TRACE_RESULT (current_cpu, "accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
|
||||||
|
|
||||||
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
|
||||||
|
|
||||||
|
@ -3748,4 +3748,4 @@ SEM_FN_NAME (m32rx,illegal) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE) */
|
#endif /* WITH_SCACHE */
|
||||||
|
|
Loading…
Reference in New Issue