i386: Document memory size reference in assembler
* doc/c-i386.texi: Document x/y/z instruction sufffixes in AT&T syntax and xmmword/ymmword/zmmword/fword/tbyte/oword ptr in Intel syntax.
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2019-06-26 Lili Cui <lili.cui@intel.com>
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* doc/c-i386.texi: Document x/y/z instruction sufffixes in AT&T
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syntax and xmmword/ymmword/zmmword/fword/tbyte/oword ptr in
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Intel syntax.
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2019-06-25 Faraz Shahbazker <fshahbazker@wavecomp.com>
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* config/tc-mips.c (macro) <M_LI>: Re-order MTHC1 with
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@ -590,11 +590,16 @@ instruction, do @emph{not} have reversed order. @ref{i386-Bugs}.
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In AT&T syntax the size of memory operands is determined from the last
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character of the instruction mnemonic. Mnemonic suffixes of @samp{b},
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@samp{w}, @samp{l} and @samp{q} specify byte (8-bit), word (16-bit), long
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(32-bit) and quadruple word (64-bit) memory references. Intel syntax accomplishes
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this by prefixing memory operands (@emph{not} the instruction mnemonics) with
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@samp{byte ptr}, @samp{word ptr}, @samp{dword ptr} and @samp{qword ptr}. Thus,
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Intel @samp{mov al, byte ptr @var{foo}} is @samp{movb @var{foo}, %al} in AT&T
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syntax.
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(32-bit) and quadruple word (64-bit) memory references. Mnemonic suffixes
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of @samp{x}, @samp{y} and @samp{z} specify xmm (128-bit vector), ymm
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(256-bit vector) and zmm (512-bit vector) memory references, only when there's
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no other way to disambiguate an instruction. Intel syntax accomplishes this by
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prefixing memory operands (@emph{not} the instruction mnemonics) with
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@samp{byte ptr}, @samp{word ptr}, @samp{dword ptr}, @samp{qword ptr},
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@samp{xmmword ptr}, @samp{ymmword ptr} and @samp{zmmword ptr}. Thus, Intel
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syntax @samp{mov al, byte ptr @var{foo}} is @samp{movb @var{foo}, %al} in AT&T
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syntax. In Intel syntax, @samp{fword ptr}, @samp{tbyte ptr} and
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@samp{oword ptr} specify 48-bit, 80-bit and 128-bit memory references.
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In 64-bit code, @samp{movabs} can be used to encode the @samp{mov}
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instruction with the 64-bit displacement or immediate operand.
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