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* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. 

(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
    (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
    and elfxx-tilegx.lo.
    (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
    elfxx-tilegx.c.
    (BFD64_BACKENDS): Add elf64-tilegx.lo.
    (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
    * Makefile.in: Regenerate.
    * arctures.c (bfd_architecture): Define bfd_arch_tilepro,
    bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
    (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
    (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
    bfd-in2.h: Regenerate.
    * config.bfd: Handle tilegx-*-* and tilepro-*-*.
    * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * configure: Regenerate.
    * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
    TILEPRO_ELF_DATA.
    * libbfd.h: Regenerate.
    * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
    RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
    IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
    IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
    IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
    IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
    IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
    IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
    IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
    IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
    MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
    IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
    IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
    IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
    IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
    IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
    IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
    HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
    JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
    DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
    SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
    IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
    IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
    IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
    IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
    IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
    IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
    IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
    IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
    IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
    IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
    IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
    IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
    IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
    IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
    IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
    IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
    IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
    IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
    IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
    IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
    IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
    IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
    IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
    IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
    IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
    IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
    IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
    TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    * targets.c (bfd_elf32_tilegx_vec): Declare.
    (bfd_elf32_tilepro_vec): Declare.
    (bfd_elf64_tilegx_vec): Declare.
    (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * cpu-tilegx.c: New file.
    * cpu-tilepro.c: New file.
    * elf32-tilepro.h: New file.
    * elf32-tilepro.c: New file.
    * elf32-tilegx.c: New file.
    * elf32-tilegx.h: New file.
    * elf64-tilegx.c: New file.
    * elf64-tilegx.h: New file.
    * elfxx-tilegx.c: New file.
    * elfxx-tilegx.h: New file.

	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
	config/tc-tilepro.c.
	(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
	config/tc-tilepro.h.
	* Makefile.in: Regenerate.
	* configure.tgt (tilepro-*-*): New.
	(tilegx-*-*): Likewise.
	* config/tc-tilegx.c: New file.
	* config/tc-tilegx.h: Likewise.
	* config/tc-tilepro.h: Likewise.
	* config/tc-tilepro.c: Likewise.
	* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
	c-tilepro.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TILEGX): Define.
	(TILEPRO): Define.
	* doc/as.texinfo: Add Tile-Gx and TILEPro documentation.  Include
	c-tilegx.texi and c-tilepro.texi.
	* doc/c-tilegx.texi: New.
	* doc/c-tilepro.texi: New.

        * gas/tilepro/t_constants.s: New file.
	* gas/tilepro/t_constants.d: Likewise.
	* gas/tilepro/t_insns.s: Likewise.
	* gas/tilepro/tilepro.exp: Likewise.
	* gas/tilepro/t_insns.d: Likewise.
	* gas/tilegx/tilegx.exp: Likewise.
	* gas/tilegx/t_insns.d: Likewise.
	* gas/tilegx/t_insns.s: Likewise.

	* dis-asm.h (print_insn_tilegx): Declare.
	(print_insn_tilepro): Likewise.

	* tilegx.h: New file.
	* tilepro.h: New file.

	* common.h: Add EM_TILEGX.
	* tilegx.h: New file.
	* tilepro.h: New file.

	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
	eelf32tilepro.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
	(eelf32tilegx.c): New target.
	(eelf32tilepro.c): Likewise.
	(eelf64tilegx.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
	* emulparams/elf32tilegx.sh: New file.
	* emulparams/elf64tilegx.sh: New file.
	* emulparams/elf32tilepro.sh: New file.

	* ld-elf/eh5.d: Don't run on tile*.
	* ld-srec/srec.exp: xfail on tile*.
	* ld-tilegx/external.s: New file.
	* ld-tilegx/reloc.d: New file.
	* ld-tilegx/reloc.s: New file.
	* ld-tilegx/tilegx.exp: New file.
	* ld-tilepro/external.s: New file.
	* ld-tilepro/reloc.d: New file.
	* ld-tilepro/reloc.s: New file.
	* ld-tilepro/tilepro.exp: New file.

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
	tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
	* Makefile.in: Regenerate.
	* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
	* po/POTFILES.in: Regenerate.
	* tilegx-dis.c: New file.
	* tilegx-opc.c: New file.
	* tilepro-dis.c: New file.
	* tilepro-opc.c: New file.
This commit is contained in:
Nick Clifton 2011-06-13 15:18:54 +00:00
parent af199b0601
commit aa137e4d51
85 changed files with 74105 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

89
bfd/ChangeLog
View File

@ -1,3 +1,92 @@
2011-06-13 Walter Lee <walt@tilera.com>
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
2011-06-13 Alan Modra <amodra@gmail.com>
* linker.c (bfd_link_hash_traverse): Follow warning symbol link.

12
bfd/Makefile.am
View File

@ -132,6 +132,8 @@ ALL_MACHINES = \
cpu-tic54x.lo \
cpu-tic6x.lo \
cpu-tic80.lo \
cpu-tilegx.lo \
cpu-tilepro.lo \
cpu-v850.lo \
cpu-vax.lo \
cpu-w65.lo \
@ -204,6 +206,8 @@ ALL_MACHINES_CFILES = \
cpu-tic54x.c \
cpu-tic6x.c \
cpu-tic80.c \
cpu-tilegx.c \
cpu-tilepro.c \
cpu-v850.c \
cpu-vax.c \
cpu-w65.c \
@ -319,6 +323,8 @@ BFD32_BACKENDS = \
elf32-sparc.lo \
elf32-spu.lo \
elf32-tic6x.lo \
elf32-tilegx.lo \
elf32-tilepro.lo \
elf32-v850.lo \
elf32-vax.lo \
elf32-xc16x.lo \
@ -328,6 +334,7 @@ BFD32_BACKENDS = \
elflink.lo \
elfxx-mips.lo \
elfxx-sparc.lo \
elfxx-tilegx.lo \
epoc-pe-arm.lo \
epoc-pei-arm.lo \
hp300bsd.lo \
@ -500,6 +507,8 @@ BFD32_BACKENDS_CFILES = \
elf32-sparc.c \
elf32-spu.c \
elf32-tic6x.c \
elf32-tilegx.c \
elf32-tilepro.c \
elf32-v850.c \
elf32-vax.c \
elf32-xc16x.c \
@ -509,6 +518,7 @@ BFD32_BACKENDS_CFILES = \
elflink.c \
elfxx-mips.c \
elfxx-sparc.c \
elfxx-tilegx.c \
epoc-pe-arm.c \
epoc-pei-arm.c \
hp300bsd.c \
@ -602,6 +612,7 @@ BFD64_BACKENDS = \
elf64-s390.lo \
elf64-sh64.lo \
elf64-sparc.lo \
elf64-tilegx.lo \
elf64-x86-64.lo \
elf64.lo \
elfn32-mips.lo \
@ -635,6 +646,7 @@ BFD64_BACKENDS_CFILES = \
elf64-s390.c \
elf64-sh64.c \
elf64-sparc.c \
elf64-tilegx.c \
elf64-x86-64.c \
elf64.c \
elfn32-mips.c \

12
bfd/Makefile.in
View File

@ -431,6 +431,8 @@ ALL_MACHINES = \
cpu-tic54x.lo \
cpu-tic6x.lo \
cpu-tic80.lo \
cpu-tilegx.lo \
cpu-tilepro.lo \
cpu-v850.lo \
cpu-vax.lo \
cpu-w65.lo \
@ -503,6 +505,8 @@ ALL_MACHINES_CFILES = \
cpu-tic54x.c \
cpu-tic6x.c \
cpu-tic80.c \
cpu-tilegx.c \
cpu-tilepro.c \
cpu-v850.c \
cpu-vax.c \
cpu-w65.c \
@ -619,6 +623,8 @@ BFD32_BACKENDS = \
elf32-sparc.lo \
elf32-spu.lo \
elf32-tic6x.lo \
elf32-tilegx.lo \
elf32-tilepro.lo \
elf32-v850.lo \
elf32-vax.lo \
elf32-xc16x.lo \
@ -628,6 +634,7 @@ BFD32_BACKENDS = \
elflink.lo \
elfxx-mips.lo \
elfxx-sparc.lo \
elfxx-tilegx.lo \
epoc-pe-arm.lo \
epoc-pei-arm.lo \
hp300bsd.lo \
@ -800,6 +807,8 @@ BFD32_BACKENDS_CFILES = \
elf32-sparc.c \
elf32-spu.c \
elf32-tic6x.c \
elf32-tilegx.c \
elf32-tilepro.c \
elf32-v850.c \
elf32-vax.c \
elf32-xc16x.c \
@ -809,6 +818,7 @@ BFD32_BACKENDS_CFILES = \
elflink.c \
elfxx-mips.c \
elfxx-sparc.c \
elfxx-tilegx.c \
epoc-pe-arm.c \
epoc-pei-arm.c \
hp300bsd.c \
@ -903,6 +913,7 @@ BFD64_BACKENDS = \
elf64-s390.lo \
elf64-sh64.lo \
elf64-sparc.lo \
elf64-tilegx.lo \
elf64-x86-64.lo \
elf64.lo \
elfn32-mips.lo \
@ -936,6 +947,7 @@ BFD64_BACKENDS_CFILES = \
elf64-s390.c \
elf64-sh64.c \
elf64-sparc.c \
elf64-tilegx.c \
elf64-x86-64.c \
elf64.c \
elfn32-mips.c \

8
bfd/archures.c
View File

@ -437,6 +437,10 @@ DESCRIPTION
. bfd_arch_lm32, {* Lattice Mico32 *}
.#define bfd_mach_lm32 1
. bfd_arch_microblaze,{* Xilinx MicroBlaze. *}
. bfd_arch_tilepro, {* Tilera TILEPro *}
. bfd_arch_tilegx, {* Tilera TILE-Gx *}
.#define bfd_mach_tilepro 1
.#define bfd_mach_tilegx 1
. bfd_arch_last
. };
*/
@ -537,6 +541,8 @@ extern const bfd_arch_info_type bfd_tic4x_arch;
extern const bfd_arch_info_type bfd_tic54x_arch;
extern const bfd_arch_info_type bfd_tic6x_arch;
extern const bfd_arch_info_type bfd_tic80_arch;
extern const bfd_arch_info_type bfd_tilegx_arch;
extern const bfd_arch_info_type bfd_tilepro_arch;
extern const bfd_arch_info_type bfd_v850_arch;
extern const bfd_arch_info_type bfd_vax_arch;
extern const bfd_arch_info_type bfd_w65_arch;
@ -611,6 +617,8 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_tic54x_arch,
&bfd_tic6x_arch,
&bfd_tic80_arch,
&bfd_tilegx_arch,
&bfd_tilepro_arch,
&bfd_v850_arch,
&bfd_vax_arch,
&bfd_w65_arch,

176
bfd/bfd-in2.h
View File

@ -2133,6 +2133,10 @@ enum bfd_architecture
bfd_arch_lm32, /* Lattice Mico32 */
#define bfd_mach_lm32 1
bfd_arch_microblaze,/* Xilinx MicroBlaze. */
bfd_arch_tilepro, /* Tilera TILEPro */
bfd_arch_tilegx, /* Tilera TILE-Gx */
#define bfd_mach_tilepro 1
#define bfd_mach_tilegx 1
bfd_arch_last
};
@ -4799,6 +4803,178 @@ value in a word. The relocation is relative offset from */
/* This is used to tell the dynamic linker to copy the value out of
the dynamic object into the runtime process image. */
BFD_RELOC_MICROBLAZE_COPY,
/* Tilera TILEPro Relocations. */
BFD_RELOC_TILEPRO_COPY,
BFD_RELOC_TILEPRO_GLOB_DAT,
BFD_RELOC_TILEPRO_JMP_SLOT,
BFD_RELOC_TILEPRO_RELATIVE,
BFD_RELOC_TILEPRO_BROFF_X1,
BFD_RELOC_TILEPRO_JOFFLONG_X1,
BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT,
BFD_RELOC_TILEPRO_IMM8_X0,
BFD_RELOC_TILEPRO_IMM8_Y0,
BFD_RELOC_TILEPRO_IMM8_X1,
BFD_RELOC_TILEPRO_IMM8_Y1,
BFD_RELOC_TILEPRO_DEST_IMM8_X1,
BFD_RELOC_TILEPRO_MT_IMM15_X1,
BFD_RELOC_TILEPRO_MF_IMM15_X1,
BFD_RELOC_TILEPRO_IMM16_X0,
BFD_RELOC_TILEPRO_IMM16_X1,
BFD_RELOC_TILEPRO_IMM16_X0_LO,
BFD_RELOC_TILEPRO_IMM16_X1_LO,
BFD_RELOC_TILEPRO_IMM16_X0_HI,
BFD_RELOC_TILEPRO_IMM16_X1_HI,
BFD_RELOC_TILEPRO_IMM16_X0_HA,
BFD_RELOC_TILEPRO_IMM16_X1_HA,
BFD_RELOC_TILEPRO_IMM16_X0_PCREL,
BFD_RELOC_TILEPRO_IMM16_X1_PCREL,
BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL,
BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL,
BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL,
BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL,
BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL,
BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL,
BFD_RELOC_TILEPRO_IMM16_X0_GOT,
BFD_RELOC_TILEPRO_IMM16_X1_GOT,
BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO,
BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO,
BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI,
BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI,
BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA,
BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA,
BFD_RELOC_TILEPRO_MMSTART_X0,
BFD_RELOC_TILEPRO_MMEND_X0,
BFD_RELOC_TILEPRO_MMSTART_X1,
BFD_RELOC_TILEPRO_MMEND_X1,
BFD_RELOC_TILEPRO_SHAMT_X0,
BFD_RELOC_TILEPRO_SHAMT_X1,
BFD_RELOC_TILEPRO_SHAMT_Y0,
BFD_RELOC_TILEPRO_SHAMT_Y1,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA,
BFD_RELOC_TILEPRO_TLS_DTPMOD32,
BFD_RELOC_TILEPRO_TLS_DTPOFF32,
BFD_RELOC_TILEPRO_TLS_TPOFF32,
/* Tilera TILE-Gx Relocations. */
BFD_RELOC_TILEGX_HW0,
BFD_RELOC_TILEGX_HW1,
BFD_RELOC_TILEGX_HW2,
BFD_RELOC_TILEGX_HW3,
BFD_RELOC_TILEGX_HW0_LAST,
BFD_RELOC_TILEGX_HW1_LAST,
BFD_RELOC_TILEGX_HW2_LAST,
BFD_RELOC_TILEGX_COPY,
BFD_RELOC_TILEGX_GLOB_DAT,
BFD_RELOC_TILEGX_JMP_SLOT,
BFD_RELOC_TILEGX_RELATIVE,
BFD_RELOC_TILEGX_BROFF_X1,
BFD_RELOC_TILEGX_JUMPOFF_X1,
BFD_RELOC_TILEGX_JUMPOFF_X1_PLT,
BFD_RELOC_TILEGX_IMM8_X0,
BFD_RELOC_TILEGX_IMM8_Y0,
BFD_RELOC_TILEGX_IMM8_X1,
BFD_RELOC_TILEGX_IMM8_Y1,
BFD_RELOC_TILEGX_DEST_IMM8_X1,
BFD_RELOC_TILEGX_MT_IMM14_X1,
BFD_RELOC_TILEGX_MF_IMM14_X1,
BFD_RELOC_TILEGX_MMSTART_X0,
BFD_RELOC_TILEGX_MMEND_X0,
BFD_RELOC_TILEGX_SHAMT_X0,
BFD_RELOC_TILEGX_SHAMT_X1,
BFD_RELOC_TILEGX_SHAMT_Y0,
BFD_RELOC_TILEGX_SHAMT_Y1,
BFD_RELOC_TILEGX_IMM16_X0_HW0,
BFD_RELOC_TILEGX_IMM16_X1_HW0,
BFD_RELOC_TILEGX_IMM16_X0_HW1,
BFD_RELOC_TILEGX_IMM16_X1_HW1,
BFD_RELOC_TILEGX_IMM16_X0_HW2,
BFD_RELOC_TILEGX_IMM16_X1_HW2,
BFD_RELOC_TILEGX_IMM16_X0_HW3,
BFD_RELOC_TILEGX_IMM16_X1_HW3,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST,
BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE,
BFD_RELOC_TILEGX_TLS_DTPMOD64,
BFD_RELOC_TILEGX_TLS_DTPOFF64,
BFD_RELOC_TILEGX_TLS_TPOFF64,
BFD_RELOC_TILEGX_TLS_DTPMOD32,
BFD_RELOC_TILEGX_TLS_DTPOFF32,
BFD_RELOC_TILEGX_TLS_TPOFF32,
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
reloc_howto_type *bfd_reloc_type_lookup

13
bfd/config.bfd
View File

@ -100,6 +100,8 @@ s390*) targ_archs=bfd_s390_arch ;;
sh*) targ_archs=bfd_sh_arch ;;
sparc*) targ_archs=bfd_sparc_arch ;;
spu*) targ_archs=bfd_spu_arch ;;
tilegx*) targ_archs=bfd_tilegx_arch ;;
tilepro*) targ_archs=bfd_tilepro_arch ;;
v850*) targ_archs=bfd_v850_arch ;;
x86_64*) targ_archs=bfd_i386_arch ;;
xtensa*) targ_archs=bfd_xtensa_arch ;;
@ -1480,6 +1482,17 @@ case "${targ}" in
targ_underscore=yes
;;
#ifdef BFD64
tilegx-*-*)
targ_defvec=bfd_elf64_tilegx_vec
targ_selvecs=bfd_elf32_tilegx_vec
;;
#endif
tilepro-*-*)
targ_defvec=bfd_elf32_tilepro_vec
;;
v850*-*-*)
targ_defvec=bfd_elf32_v850_vec
;;

3
bfd/configure vendored
View File

@ -15298,6 +15298,8 @@ do
bfd_elf32_tic6x_linux_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
bfd_elf32_tic6x_elf_be_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
bfd_elf32_tic6x_elf_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
bfd_elf32_tilegx_vec) tb="$tb elf32-tilegx.lo elfxx-tilegx.lo elf32.lo $elf" ; target_size=32 ;;
bfd_elf32_tilepro_vec) tb="$tb elf32-tilepro.lo elf32.lo $elf" ;;
bfd_elf32_tradbigmips_vec | bfd_elf32_tradbigmips_freebsd_vec)
tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_tradlittlemips_vec | bfd_elf32_tradlittlemips_freebsd_vec)
@ -15334,6 +15336,7 @@ do
bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_sparc_freebsd_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_sparc_sol2_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_tilegx_vec) tb="$tb elf64-tilegx.lo elfxx-tilegx.lo elf64.lo $elf" ; target_size=64 ;;
bfd_elf64_tradbigmips_vec | bfd_elf64_tradbigmips_freebsd_vec)
tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_tradlittlemips_vec | bfd_elf64_tradlittlemips_freebsd_vec)

3
bfd/configure.in
View File

@ -797,6 +797,8 @@ do
bfd_elf32_tic6x_linux_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
bfd_elf32_tic6x_elf_be_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
bfd_elf32_tic6x_elf_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
bfd_elf32_tilegx_vec) tb="$tb elf32-tilegx.lo elfxx-tilegx.lo elf32.lo $elf" ; target_size=32 ;;
bfd_elf32_tilepro_vec) tb="$tb elf32-tilepro.lo elf32.lo $elf" ;;
bfd_elf32_tradbigmips_vec | bfd_elf32_tradbigmips_freebsd_vec)
tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_tradlittlemips_vec | bfd_elf32_tradlittlemips_freebsd_vec)
@ -833,6 +835,7 @@ do
bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_sparc_freebsd_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_sparc_sol2_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_tilegx_vec) tb="$tb elf64-tilegx.lo elf64.lo $elf" ; target_size=64 ;;
bfd_elf64_tradbigmips_vec | bfd_elf64_tradbigmips_freebsd_vec)
tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_tradlittlemips_vec | bfd_elf64_tradlittlemips_freebsd_vec)

39
bfd/cpu-tilegx.c Normal file
View File

@ -0,0 +1,39 @@
/* BFD support for the TILE-Gx processor.
Copyright 2011 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_tilegx_arch =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_tilegx,
bfd_mach_tilegx,
"tilegx",
"tilegx",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
0,
};

39
bfd/cpu-tilepro.c Normal file
View File

@ -0,0 +1,39 @@
/* BFD support for the TILEPro processor.
Copyright 2011 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_tilepro_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_tilepro,
bfd_mach_tilepro,
"tilepro",
"tilepro",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
0,
};

2
bfd/elf-bfd.h
View File

@ -428,6 +428,8 @@ enum elf_target_id
TIC6X_ELF_DATA,
X86_64_ELF_DATA,
XTENSA_ELF_DATA,
TILEGX_ELF_DATA,
TILEPRO_ELF_DATA,
GENERIC_ELF_DATA
};

132
bfd/elf32-tilegx.c Normal file
View File

@ -0,0 +1,132 @@
/* TILE-Gx-specific support for 32-bit ELF.
Copyright 2011 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "elfxx-tilegx.h"
#include "elf32-tilegx.h"
/* Support for core dump NOTE sections. */
static bfd_boolean
tilegx_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
{
int offset;
size_t size;
if (note->descsz != TILEGX_PRSTATUS_SIZEOF)
return FALSE;
/* pr_cursig */
elf_tdata (abfd)->core_signal =
bfd_get_16 (abfd, note->descdata + TILEGX_PRSTATUS_OFFSET_PR_CURSIG);
/* pr_pid */
elf_tdata (abfd)->core_pid =
bfd_get_32 (abfd, note->descdata + TILEGX_PRSTATUS_OFFSET_PR_PID);
/* pr_reg */
offset = TILEGX_PRSTATUS_OFFSET_PR_REG;
size = TILEGX_GREGSET_T_SIZE;
/* Make a ".reg/999" section. */
return _bfd_elfcore_make_pseudosection (abfd, ".reg",
size, note->descpos + offset);
}
static bfd_boolean
tilegx_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
{
if (note->descsz != TILEGX_PRPSINFO_SIZEOF)
return FALSE;
elf_tdata (abfd)->core_program
= _bfd_elfcore_strndup (abfd, note->descdata + TILEGX_PRPSINFO_OFFSET_PR_FNAME, 16);
elf_tdata (abfd)->core_command
= _bfd_elfcore_strndup (abfd, note->descdata + TILEGX_PRPSINFO_OFFSET_PR_PSARGS, ELF_PR_PSARGS_SIZE);
/* Note that for some reason, a spurious space is tacked
onto the end of the args in some (at least one anyway)
implementations, so strip it off if it exists. */
{
char *command = elf_tdata (abfd)->core_command;
int n = strlen (command);
if (0 < n && command[n - 1] == ' ')
command[n - 1] = '\0';
}
return TRUE;
}
#define ELF_ARCH bfd_arch_tilegx
#define ELF_TARGET_ID TILEGX_ELF_DATA
#define ELF_MACHINE_CODE EM_TILEGX
#define ELF_MAXPAGESIZE 0x10000
#define ELF_COMMONPAGESIZE 0x10000
#define TARGET_LITTLE_SYM bfd_elf32_tilegx_vec
#define TARGET_LITTLE_NAME "elf32-tilegx"
#define elf_backend_reloc_type_class tilegx_reloc_type_class
#define bfd_elf32_bfd_reloc_name_lookup tilegx_reloc_name_lookup
#define bfd_elf32_bfd_link_hash_table_create tilegx_elf_link_hash_table_create
#define bfd_elf32_bfd_reloc_type_lookup tilegx_reloc_type_lookup
#define bfd_elf32_bfd_merge_private_bfd_data \
_bfd_tilegx_elf_merge_private_bfd_data
#define elf_backend_copy_indirect_symbol tilegx_elf_copy_indirect_symbol
#define elf_backend_create_dynamic_sections tilegx_elf_create_dynamic_sections
#define elf_backend_check_relocs tilegx_elf_check_relocs
#define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol
#define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym
#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections
#define elf_backend_relocate_section tilegx_elf_relocate_section
#define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol
#define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections
#define elf_backend_gc_mark_hook tilegx_elf_gc_mark_hook
#define elf_backend_gc_sweep_hook tilegx_elf_gc_sweep_hook
#define elf_backend_plt_sym_val tilegx_elf_plt_sym_val
#define elf_info_to_howto_rel NULL
#define elf_info_to_howto tilegx_info_to_howto_rela
#define elf_backend_grok_prstatus tilegx_elf_grok_prstatus
#define elf_backend_grok_psinfo tilegx_elf_grok_psinfo
#define elf_backend_additional_program_headers tilegx_additional_program_headers
#define elf_backend_init_index_section _bfd_elf_init_1_index_section
#define elf_backend_can_gc_sections 1
#define elf_backend_can_refcount 1
#define elf_backend_want_got_plt 1
#define elf_backend_plt_readonly 1
/* Align PLT mod 64 byte L2 line size. */
#define elf_backend_plt_alignment 6
#define elf_backend_want_plt_sym 1
#define elf_backend_got_header_size 4
#define elf_backend_rela_normal 1
#define elf_backend_default_execstack 0
#include "elf32-target.h"

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/* TILE-Gx-specific support for 32-bit ELF.
Copyright 2011 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#ifndef _ELF32_TILEGX_H
#define _ELF32_TILEGX_H
/* This file contains sizes and offsets of Linux data structures. */
#define TILEGX_PRSTATUS_SIZEOF 592
#define TILEGX_PRSTATUS_OFFSET_PR_CURSIG 12
#define TILEGX_PRSTATUS_OFFSET_PR_PID 24
#define TILEGX_PRSTATUS_OFFSET_PR_REG 72
#define TILEGX_PRPSINFO_SIZEOF 128
#define TILEGX_PRPSINFO_OFFSET_PR_FNAME 32
#define TILEGX_PRPSINFO_OFFSET_PR_PSARGS 48
#define ELF_PR_PSARGS_SIZE 80
#define TILEGX_GREGSET_T_SIZE 512
#endif /* _ELF32_TILEGX_H */

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/* TILEPro-specific support for 32-bit ELF.
Copyright 2011 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#ifndef _ELF32_TILEPRO_H
#define _ELF32_TILEPRO_H
/* This file contains sizes and offsets of Linux data structures. */
#define TILEPRO_PRSTATUS_SIZEOF 332
#define TILEPRO_PRSTATUS_OFFSET_PR_CURSIG 12
#define TILEPRO_PRSTATUS_OFFSET_PR_PID 24
#define TILEPRO_PRSTATUS_OFFSET_PR_REG 72
#define TILEPRO_PRPSINFO_SIZEOF 128
#define TILEPRO_PRPSINFO_OFFSET_PR_FNAME 32
#define TILEPRO_PRPSINFO_OFFSET_PR_PSARGS 48
#define ELF_PR_PSARGS_SIZE 80
#define TILEPRO_GREGSET_T_SIZE 256
#endif /* _ELF32_TILEPRO_H */

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/* TILE-Gx-specific support for 64-bit ELF.
Copyright 2011 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "elfxx-tilegx.h"
#include "elf64-tilegx.h"
/* Support for core dump NOTE sections. */
static bfd_boolean
tilegx_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
{
int offset;
size_t size;
if (note->descsz != TILEGX_PRSTATUS_SIZEOF)
return FALSE;
/* pr_cursig */
elf_tdata (abfd)->core_signal =
bfd_get_16 (abfd, note->descdata + TILEGX_PRSTATUS_OFFSET_PR_CURSIG);
/* pr_pid */
elf_tdata (abfd)->core_pid =
bfd_get_32 (abfd, note->descdata + TILEGX_PRSTATUS_OFFSET_PR_PID);
/* pr_reg */
offset = TILEGX_PRSTATUS_OFFSET_PR_REG;
size = TILEGX_GREGSET_T_SIZE;
/* Make a ".reg/999" section. */
return _bfd_elfcore_make_pseudosection (abfd, ".reg",
size, note->descpos + offset);
}
static bfd_boolean
tilegx_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
{
if (note->descsz != TILEGX_PRPSINFO_SIZEOF)
return FALSE;
elf_tdata (abfd)->core_program
= _bfd_elfcore_strndup (abfd, note->descdata + TILEGX_PRPSINFO_OFFSET_PR_FNAME, 16);
elf_tdata (abfd)->core_command
= _bfd_elfcore_strndup (abfd, note->descdata + TILEGX_PRPSINFO_OFFSET_PR_PSARGS, ELF_PR_PSARGS_SIZE);
/* Note that for some reason, a spurious space is tacked
onto the end of the args in some (at least one anyway)
implementations, so strip it off if it exists. */
{
char *command = elf_tdata (abfd)->core_command;
int n = strlen (command);
if (0 < n && command[n - 1] == ' ')
command[n - 1] = '\0';
}
return TRUE;
}
#define ELF_ARCH bfd_arch_tilegx
#define ELF_TARGET_ID TILEGX_ELF_DATA
#define ELF_MACHINE_CODE EM_TILEGX
#define ELF_MAXPAGESIZE 0x10000
#define ELF_COMMONPAGESIZE 0x10000
#define TARGET_LITTLE_SYM bfd_elf64_tilegx_vec
#define TARGET_LITTLE_NAME "elf64-tilegx"
#define elf_backend_reloc_type_class tilegx_reloc_type_class
#define bfd_elf64_bfd_reloc_name_lookup tilegx_reloc_name_lookup
#define bfd_elf64_bfd_link_hash_table_create tilegx_elf_link_hash_table_create
#define bfd_elf64_bfd_reloc_type_lookup tilegx_reloc_type_lookup
#define bfd_elf64_bfd_merge_private_bfd_data \
_bfd_tilegx_elf_merge_private_bfd_data
#define elf_backend_copy_indirect_symbol tilegx_elf_copy_indirect_symbol
#define elf_backend_create_dynamic_sections tilegx_elf_create_dynamic_sections
#define elf_backend_check_relocs tilegx_elf_check_relocs
#define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol
#define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym
#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections
#define elf_backend_relocate_section tilegx_elf_relocate_section
#define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol
#define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections
#define elf_backend_gc_mark_hook tilegx_elf_gc_mark_hook
#define elf_backend_gc_sweep_hook tilegx_elf_gc_sweep_hook
#define elf_backend_plt_sym_val tilegx_elf_plt_sym_val
#define elf_info_to_howto_rel NULL
#define elf_info_to_howto tilegx_info_to_howto_rela
#define elf_backend_grok_prstatus tilegx_elf_grok_prstatus
#define elf_backend_grok_psinfo tilegx_elf_grok_psinfo
#define elf_backend_additional_program_headers tilegx_additional_program_headers
#define elf_backend_init_index_section _bfd_elf_init_1_index_section
#define elf_backend_can_gc_sections 1
#define elf_backend_can_refcount 1
#define elf_backend_want_got_plt 1
#define elf_backend_plt_readonly 1
/* Align PLT mod 64 byte L2 line size. */
#define elf_backend_plt_alignment 6
#define elf_backend_want_plt_sym 1
#define elf_backend_got_header_size 8
#define elf_backend_rela_normal 1
#define elf_backend_default_execstack 0
#include "elf64-target.h"

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@ -0,0 +1,38 @@
/* TILE-Gx-specific support for 64-bit ELF.
Copyright 2011 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#ifndef _ELF64_TILEGX_H
#define _ELF64_TILEGX_H
/* This file contains sizes and offsets of Linux data structures. */
#define TILEGX_PRSTATUS_SIZEOF 632
#define TILEGX_PRSTATUS_OFFSET_PR_CURSIG 12
#define TILEGX_PRSTATUS_OFFSET_PR_PID 32
#define TILEGX_PRSTATUS_OFFSET_PR_REG 112
#define TILEGX_PRPSINFO_SIZEOF 136
#define TILEGX_PRPSINFO_OFFSET_PR_FNAME 40
#define TILEGX_PRPSINFO_OFFSET_PR_PSARGS 56
#define ELF_PR_PSARGS_SIZE 80
#define TILEGX_GREGSET_T_SIZE 512
#endif /* _ELF64_TILEGX_H */

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@ -0,0 +1,97 @@
/* TILE-Gx ELF specific backend routines.
Copyright 2011 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "elf/common.h"
#include "elf/internal.h"
extern enum elf_reloc_type_class
tilegx_reloc_type_class (const Elf_Internal_Rela *);
extern reloc_howto_type *
tilegx_reloc_name_lookup (bfd *, const char *);
extern struct bfd_link_hash_table *
tilegx_elf_link_hash_table_create (bfd *);
extern reloc_howto_type *
tilegx_reloc_type_lookup (bfd *, bfd_reloc_code_real_type);
extern void
tilegx_elf_copy_indirect_symbol (struct bfd_link_info *,
struct elf_link_hash_entry *,
struct elf_link_hash_entry *);
extern bfd_boolean
tilegx_elf_create_dynamic_sections (bfd *, struct bfd_link_info *);
extern bfd_boolean
tilegx_elf_check_relocs (bfd *, struct bfd_link_info *,
asection *, const Elf_Internal_Rela *);
extern bfd_boolean
tilegx_elf_adjust_dynamic_symbol (struct bfd_link_info *,
struct elf_link_hash_entry *);
extern bfd_boolean
tilegx_elf_omit_section_dynsym (bfd *,
struct bfd_link_info *,
asection *);
extern bfd_boolean
tilegx_elf_size_dynamic_sections (bfd *, struct bfd_link_info *);
extern bfd_boolean
tilegx_elf_relocate_section (bfd *, struct bfd_link_info *,
bfd *, asection *,
bfd_byte *, Elf_Internal_Rela *,
Elf_Internal_Sym *,
asection **);
extern asection *
tilegx_elf_gc_mark_hook (asection *,
struct bfd_link_info *,
Elf_Internal_Rela *,
struct elf_link_hash_entry *,
Elf_Internal_Sym *);
extern bfd_boolean
tilegx_elf_gc_sweep_hook (bfd *, struct bfd_link_info *,
asection *, const Elf_Internal_Rela *);
extern bfd_vma
tilegx_elf_plt_sym_val (bfd_vma, const asection *, const arelent *);
extern void
tilegx_info_to_howto_rela (bfd *, arelent *, Elf_Internal_Rela *);
extern int
tilegx_additional_program_headers (bfd *, struct bfd_link_info *);
extern bfd_boolean
tilegx_elf_finish_dynamic_symbol (bfd *,
struct bfd_link_info *,
struct elf_link_hash_entry *,
Elf_Internal_Sym *);
extern bfd_boolean
tilegx_elf_finish_dynamic_sections (bfd *, struct bfd_link_info *);
extern bfd_boolean
_bfd_tilegx_elf_merge_private_bfd_data (bfd *, bfd *);

168
bfd/libbfd.h
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@ -2268,6 +2268,174 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_MICROBLAZE_64_GOTOFF",
"BFD_RELOC_MICROBLAZE_32_GOTOFF",
"BFD_RELOC_MICROBLAZE_COPY",
"BFD_RELOC_TILEPRO_COPY",
"BFD_RELOC_TILEPRO_GLOB_DAT",
"BFD_RELOC_TILEPRO_JMP_SLOT",
"BFD_RELOC_TILEPRO_RELATIVE",
"BFD_RELOC_TILEPRO_BROFF_X1",
"BFD_RELOC_TILEPRO_JOFFLONG_X1",
"BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT",
"BFD_RELOC_TILEPRO_IMM8_X0",
"BFD_RELOC_TILEPRO_IMM8_Y0",
"BFD_RELOC_TILEPRO_IMM8_X1",
"BFD_RELOC_TILEPRO_IMM8_Y1",
"BFD_RELOC_TILEPRO_DEST_IMM8_X1",
"BFD_RELOC_TILEPRO_MT_IMM15_X1",
"BFD_RELOC_TILEPRO_MF_IMM15_X1",
"BFD_RELOC_TILEPRO_IMM16_X0",
"BFD_RELOC_TILEPRO_IMM16_X1",
"BFD_RELOC_TILEPRO_IMM16_X0_LO",
"BFD_RELOC_TILEPRO_IMM16_X1_LO",
"BFD_RELOC_TILEPRO_IMM16_X0_HI",
"BFD_RELOC_TILEPRO_IMM16_X1_HI",
"BFD_RELOC_TILEPRO_IMM16_X0_HA",
"BFD_RELOC_TILEPRO_IMM16_X1_HA",
"BFD_RELOC_TILEPRO_IMM16_X0_PCREL",
"BFD_RELOC_TILEPRO_IMM16_X1_PCREL",
"BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL",
"BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL",
"BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL",
"BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL",
"BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL",
"BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL",
"BFD_RELOC_TILEPRO_IMM16_X0_GOT",
"BFD_RELOC_TILEPRO_IMM16_X1_GOT",
"BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO",
"BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO",
"BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI",
"BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI",
"BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA",
"BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA",
"BFD_RELOC_TILEPRO_MMSTART_X0",
"BFD_RELOC_TILEPRO_MMEND_X0",
"BFD_RELOC_TILEPRO_MMSTART_X1",
"BFD_RELOC_TILEPRO_MMEND_X1",
"BFD_RELOC_TILEPRO_SHAMT_X0",
"BFD_RELOC_TILEPRO_SHAMT_X1",
"BFD_RELOC_TILEPRO_SHAMT_Y0",
"BFD_RELOC_TILEPRO_SHAMT_Y1",
"BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD",
"BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD",
"BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO",
"BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO",
"BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI",
"BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI",
"BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA",
"BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA",
"BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE",
"BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE",
"BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO",
"BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO",
"BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI",
"BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI",
"BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA",
"BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA",
"BFD_RELOC_TILEPRO_TLS_DTPMOD32",
"BFD_RELOC_TILEPRO_TLS_DTPOFF32",
"BFD_RELOC_TILEPRO_TLS_TPOFF32",
"BFD_RELOC_TILEGX_HW0",
"BFD_RELOC_TILEGX_HW1",
"BFD_RELOC_TILEGX_HW2",
"BFD_RELOC_TILEGX_HW3",
"BFD_RELOC_TILEGX_HW0_LAST",
"BFD_RELOC_TILEGX_HW1_LAST",
"BFD_RELOC_TILEGX_HW2_LAST",
"BFD_RELOC_TILEGX_COPY",
"BFD_RELOC_TILEGX_GLOB_DAT",
"BFD_RELOC_TILEGX_JMP_SLOT",
"BFD_RELOC_TILEGX_RELATIVE",
"BFD_RELOC_TILEGX_BROFF_X1",
"BFD_RELOC_TILEGX_JUMPOFF_X1",
"BFD_RELOC_TILEGX_JUMPOFF_X1_PLT",
"BFD_RELOC_TILEGX_IMM8_X0",
"BFD_RELOC_TILEGX_IMM8_Y0",
"BFD_RELOC_TILEGX_IMM8_X1",
"BFD_RELOC_TILEGX_IMM8_Y1",
"BFD_RELOC_TILEGX_DEST_IMM8_X1",
"BFD_RELOC_TILEGX_MT_IMM14_X1",
"BFD_RELOC_TILEGX_MF_IMM14_X1",
"BFD_RELOC_TILEGX_MMSTART_X0",
"BFD_RELOC_TILEGX_MMEND_X0",
"BFD_RELOC_TILEGX_SHAMT_X0",
"BFD_RELOC_TILEGX_SHAMT_X1",
"BFD_RELOC_TILEGX_SHAMT_Y0",
"BFD_RELOC_TILEGX_SHAMT_Y1",
"BFD_RELOC_TILEGX_IMM16_X0_HW0",
"BFD_RELOC_TILEGX_IMM16_X1_HW0",
"BFD_RELOC_TILEGX_IMM16_X0_HW1",
"BFD_RELOC_TILEGX_IMM16_X1_HW1",
"BFD_RELOC_TILEGX_IMM16_X0_HW2",
"BFD_RELOC_TILEGX_IMM16_X1_HW2",
"BFD_RELOC_TILEGX_IMM16_X0_HW3",
"BFD_RELOC_TILEGX_IMM16_X1_HW3",
"BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST",
"BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST",
"BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST",
"BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST",
"BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST",
"BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST",
"BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL",
"BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL",
"BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL",
"BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL",
"BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL",
"BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL",
"BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL",
"BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL",
"BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL",
"BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL",
"BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL",
"BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL",
"BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL",
"BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL",
"BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT",
"BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT",
"BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT",
"BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT",
"BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT",
"BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT",
"BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT",
"BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT",
"BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT",
"BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT",
"BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT",
"BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT",
"BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT",
"BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT",
"BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD",
"BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE",
"BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE",
"BFD_RELOC_TILEGX_TLS_DTPMOD64",
"BFD_RELOC_TILEGX_TLS_DTPOFF64",
"BFD_RELOC_TILEGX_TLS_TPOFF64",
"BFD_RELOC_TILEGX_TLS_DTPMOD32",
"BFD_RELOC_TILEGX_TLS_DTPOFF32",
"BFD_RELOC_TILEGX_TLS_TPOFF32",
"@@overflow: BFD_RELOC_UNUSED@@",
};
#endif

342
bfd/reloc.c
View File

@ -5551,6 +5551,348 @@ ENUMDOC
This is used to tell the dynamic linker to copy the value out of
the dynamic object into the runtime process image.
ENUM
BFD_RELOC_TILEPRO_COPY
ENUMX
BFD_RELOC_TILEPRO_GLOB_DAT
ENUMX
BFD_RELOC_TILEPRO_JMP_SLOT
ENUMX
BFD_RELOC_TILEPRO_RELATIVE
ENUMX
BFD_RELOC_TILEPRO_BROFF_X1
ENUMX
BFD_RELOC_TILEPRO_JOFFLONG_X1
ENUMX
BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
ENUMX
BFD_RELOC_TILEPRO_IMM8_X0
ENUMX
BFD_RELOC_TILEPRO_IMM8_Y0
ENUMX
BFD_RELOC_TILEPRO_IMM8_X1
ENUMX
BFD_RELOC_TILEPRO_IMM8_Y1
ENUMX
BFD_RELOC_TILEPRO_DEST_IMM8_X1
ENUMX
BFD_RELOC_TILEPRO_MT_IMM15_X1
ENUMX
BFD_RELOC_TILEPRO_MF_IMM15_X1
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_LO
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_LO
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_HI
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_HI
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_HA
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_HA
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_PCREL
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_PCREL
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_GOT
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_GOT
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
ENUMX
BFD_RELOC_TILEPRO_MMSTART_X0
ENUMX
BFD_RELOC_TILEPRO_MMEND_X0
ENUMX
BFD_RELOC_TILEPRO_MMSTART_X1
ENUMX
BFD_RELOC_TILEPRO_MMEND_X1
ENUMX
BFD_RELOC_TILEPRO_SHAMT_X0
ENUMX
BFD_RELOC_TILEPRO_SHAMT_X1
ENUMX
BFD_RELOC_TILEPRO_SHAMT_Y0
ENUMX
BFD_RELOC_TILEPRO_SHAMT_Y1
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
ENUMX
BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
ENUMX
BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
ENUMX
BFD_RELOC_TILEPRO_TLS_DTPMOD32
ENUMX
BFD_RELOC_TILEPRO_TLS_DTPOFF32
ENUMX
BFD_RELOC_TILEPRO_TLS_TPOFF32
ENUMDOC
Tilera TILEPro Relocations.
ENUM
BFD_RELOC_TILEGX_HW0
ENUMX
BFD_RELOC_TILEGX_HW1
ENUMX
BFD_RELOC_TILEGX_HW2
ENUMX
BFD_RELOC_TILEGX_HW3
ENUMX
BFD_RELOC_TILEGX_HW0_LAST
ENUMX
BFD_RELOC_TILEGX_HW1_LAST
ENUMX
BFD_RELOC_TILEGX_HW2_LAST
ENUMX
BFD_RELOC_TILEGX_COPY
ENUMX
BFD_RELOC_TILEGX_GLOB_DAT
ENUMX
BFD_RELOC_TILEGX_JMP_SLOT
ENUMX
BFD_RELOC_TILEGX_RELATIVE
ENUMX
BFD_RELOC_TILEGX_BROFF_X1
ENUMX
BFD_RELOC_TILEGX_JUMPOFF_X1
ENUMX
BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
ENUMX
BFD_RELOC_TILEGX_IMM8_X0
ENUMX
BFD_RELOC_TILEGX_IMM8_Y0
ENUMX
BFD_RELOC_TILEGX_IMM8_X1
ENUMX
BFD_RELOC_TILEGX_IMM8_Y1
ENUMX
BFD_RELOC_TILEGX_DEST_IMM8_X1
ENUMX
BFD_RELOC_TILEGX_MT_IMM14_X1
ENUMX
BFD_RELOC_TILEGX_MF_IMM14_X1
ENUMX
BFD_RELOC_TILEGX_MMSTART_X0
ENUMX
BFD_RELOC_TILEGX_MMEND_X0
ENUMX
BFD_RELOC_TILEGX_SHAMT_X0
ENUMX
BFD_RELOC_TILEGX_SHAMT_X1
ENUMX
BFD_RELOC_TILEGX_SHAMT_Y0
ENUMX
BFD_RELOC_TILEGX_SHAMT_Y1
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW0
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW0
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW1
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW1
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW2
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW2
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW3
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW3
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE
ENUMX
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE
ENUMX
BFD_RELOC_TILEGX_TLS_DTPMOD64
ENUMX
BFD_RELOC_TILEGX_TLS_DTPOFF64
ENUMX
BFD_RELOC_TILEGX_TLS_TPOFF64
ENUMX
BFD_RELOC_TILEGX_TLS_DTPMOD32
ENUMX
BFD_RELOC_TILEGX_TLS_DTPOFF32
ENUMX
BFD_RELOC_TILEGX_TLS_TPOFF32
ENUMDOC
Tilera TILE-Gx Relocations.
ENDSENUM
BFD_RELOC_UNUSED

6
bfd/targets.c
View File

@ -692,6 +692,8 @@ extern const bfd_target bfd_elf32_tic6x_elf_be_vec;
extern const bfd_target bfd_elf32_tic6x_elf_le_vec;
extern const bfd_target bfd_elf32_tic6x_linux_be_vec;
extern const bfd_target bfd_elf32_tic6x_linux_le_vec;
extern const bfd_target bfd_elf32_tilegx_vec;
extern const bfd_target bfd_elf32_tilepro_vec;
extern const bfd_target bfd_elf32_tradbigmips_vec;
extern const bfd_target bfd_elf32_tradlittlemips_vec;
extern const bfd_target bfd_elf32_tradbigmips_freebsd_vec;
@ -728,6 +730,7 @@ extern const bfd_target bfd_elf64_sh64nbsd_vec;
extern const bfd_target bfd_elf64_sparc_vec;
extern const bfd_target bfd_elf64_sparc_freebsd_vec;
extern const bfd_target bfd_elf64_sparc_sol2_vec;
extern const bfd_target bfd_elf64_tilegx_vec;
extern const bfd_target bfd_elf64_tradbigmips_vec;
extern const bfd_target bfd_elf64_tradlittlemips_vec;
extern const bfd_target bfd_elf64_tradbigmips_freebsd_vec;
@ -1051,6 +1054,8 @@ static const bfd_target * const _bfd_target_vector[] =
&bfd_elf32_spu_vec,
&bfd_elf32_tic6x_be_vec,
&bfd_elf32_tic6x_le_vec,
&bfd_elf32_tilegx_vec,
&bfd_elf32_tilepro_vec,
&bfd_elf32_tradbigmips_vec,
&bfd_elf32_tradlittlemips_vec,
&bfd_elf32_tradbigmips_freebsd_vec,
@ -1088,6 +1093,7 @@ static const bfd_target * const _bfd_target_vector[] =
&bfd_elf64_sparc_vec,
&bfd_elf64_sparc_freebsd_vec,
&bfd_elf64_sparc_sol2_vec,
&bfd_elf64_tilegx_vec,
&bfd_elf64_tradbigmips_vec,
&bfd_elf64_tradlittlemips_vec,
&bfd_elf64_tradbigmips_freebsd_vec,

11
binutils/ChangeLog
View File

@ -1,3 +1,14 @@
2011-06-13 Walter Lee <walt@tilera.com>
* readelf.c: Include tilepro.h and tilegx.h.
(guess_is_rela): Handle EM_TILEGX and EM_TILEPRO.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcerel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
2011-06-09 Tristan Gingold <gingold@adacore.com>
* od-xcoff.c (xcoff32_read_symbols): Allow missing string table

45
binutils/readelf.c
View File

@ -140,6 +140,8 @@
#include "elf/sparc.h"
#include "elf/spu.h"
#include "elf/tic6x.h"
#include "elf/tilegx.h"
#include "elf/tilepro.h"
#include "elf/v850.h"
#include "elf/vax.h"
#include "elf/x86-64.h"
@ -598,6 +600,8 @@ guess_is_rela (unsigned int e_machine)
case EM_SPARCV9:
case EM_SPU:
case EM_TI_C6000:
case EM_TILEGX:
case EM_TILEPRO:
case EM_V850:
case EM_CYGNUS_V850:
case EM_VAX:
@ -1219,6 +1223,14 @@ dump_relocations (FILE * file,
case EM_TI_C6000:
rtype = elf_tic6x_reloc_type (type);
break;
case EM_TILEGX:
rtype = elf_tilegx_reloc_type (type);
break;
case EM_TILEPRO:
rtype = elf_tilepro_reloc_type (type);
break;
}
if (rtype == NULL)
@ -1965,6 +1977,7 @@ get_machine_name (unsigned e_machine)
case EM_STM8: return "STMicroeletronics STM8 8-bit microcontroller";
case EM_TILE64: return "Tilera TILE64 multicore architecture family";
case EM_TILEPRO: return "Tilera TILEPro multicore architecture family";
case EM_TILEGX: return "Tilera TILE-Gx multicore architecture family";
case EM_CUDA: return "NVIDIA CUDA architecture";
default:
snprintf (buff, sizeof (buff), _("<unknown>: 0x%x"), e_machine);
@ -9731,6 +9744,10 @@ is_32bit_abs_reloc (unsigned int reloc_type)
return reloc_type == 6; /* R_SPU_ADDR32 */
case EM_TI_C6000:
return reloc_type == 1; /* R_C6000_ABS32. */
case EM_TILEGX:
return reloc_type == 2; /* R_TILEGX_32. */
case EM_TILEPRO:
return reloc_type == 1; /* R_TILEPRO_32. */
case EM_CYGNUS_V850:
case EM_V850:
return reloc_type == 6; /* R_V850_ABS32. */
@ -9790,6 +9807,10 @@ is_32bit_pcrel_reloc (unsigned int reloc_type)
return reloc_type == 6; /* R_SPARC_DISP32. */
case EM_SPU:
return reloc_type == 13; /* R_SPU_REL32. */
case EM_TILEGX:
return reloc_type == 6; /* R_TILEGX_32_PCREL. */
case EM_TILEPRO:
return reloc_type == 4; /* R_TILEPRO_32_PCREL. */
case EM_X86_64:
case EM_L1OM:
return reloc_type == 2; /* R_X86_64_PC32. */
@ -9831,9 +9852,11 @@ is_64bit_abs_reloc (unsigned int reloc_type)
return reloc_type == 1; /* R_X86_64_64. */
case EM_S390_OLD:
case EM_S390:
return reloc_type == 22; /* R_S390_64 */
return reloc_type == 22; /* R_S390_64. */
case EM_TILEGX:
return reloc_type == 1; /* R_TILEGX_64. */
case EM_MIPS:
return reloc_type == 18; /* R_MIPS_64 */
return reloc_type == 18; /* R_MIPS_64. */
default:
return FALSE;
}
@ -9848,23 +9871,25 @@ is_64bit_pcrel_reloc (unsigned int reloc_type)
switch (elf_header.e_machine)
{
case EM_ALPHA:
return reloc_type == 11; /* R_ALPHA_SREL64 */
return reloc_type == 11; /* R_ALPHA_SREL64. */
case EM_IA_64:
return reloc_type == 0x4f; /* R_IA64_PCREL64LSB */
return reloc_type == 0x4f; /* R_IA64_PCREL64LSB. */
case EM_PARISC:
return reloc_type == 72; /* R_PARISC_PCREL64 */
return reloc_type == 72; /* R_PARISC_PCREL64. */
case EM_PPC64:
return reloc_type == 44; /* R_PPC64_REL64 */
return reloc_type == 44; /* R_PPC64_REL64. */
case EM_SPARC32PLUS:
case EM_SPARCV9:
case EM_SPARC:
return reloc_type == 46; /* R_SPARC_DISP64 */
return reloc_type == 46; /* R_SPARC_DISP64. */
case EM_X86_64:
case EM_L1OM:
return reloc_type == 24; /* R_X86_64_PC64 */
return reloc_type == 24; /* R_X86_64_PC64. */
case EM_S390_OLD:
case EM_S390:
return reloc_type == 23; /* R_S390_PC64 */
return reloc_type == 23; /* R_S390_PC64. */
case EM_TILEGX:
return reloc_type == 5; /* R_TILEGX_64_PCREL. */
default:
return FALSE;
}
@ -9956,6 +9981,8 @@ is_none_reloc (unsigned int reloc_type)
case EM_MOXIE: /* R_MOXIE_NONE. */
case EM_M32R: /* R_M32R_NONE. */
case EM_TI_C6000:/* R_C6000_NONE. */
case EM_TILEGX: /* R_TILEGX_NONE. */
case EM_TILEPRO: /* R_TILEPRO_NONE. */
case EM_XC16X:
case EM_C166: /* R_XC16X_NONE. */
return reloc_type == 0;

23
gas/ChangeLog
View File

@ -1,3 +1,26 @@
2011-06-13 Walter Lee <walt@tilera.com>
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
2011-06-13 Nick Clifton <nickc@redhat.com>
PR gas/12854

4
gas/Makefile.am
View File

@ -161,6 +161,8 @@ TARGET_CPU_CFILES = \
config/tc-tic4x.c \
config/tc-tic54x.c \
config/tc-tic6x.c \
config/tc-tilegx.c \
config/tc-tilepro.c \
config/tc-vax.c \
config/tc-v850.c \
config/tc-xstormy16.c \
@ -224,6 +226,8 @@ TARGET_CPU_HFILES = \
config/tc-tic4x.h \
config/tc-tic54x.h \
config/tc-tic6x.h \
config/tc-tilegx.h \
config/tc-tilepro.h \
config/tc-vax.h \
config/tc-v850.h \
config/tc-xstormy16.h \

34
gas/Makefile.in
View File

@ -428,6 +428,8 @@ TARGET_CPU_CFILES = \
config/tc-tic4x.c \
config/tc-tic54x.c \
config/tc-tic6x.c \
config/tc-tilegx.c \
config/tc-tilepro.c \
config/tc-vax.c \
config/tc-v850.c \
config/tc-xstormy16.c \
@ -491,6 +493,8 @@ TARGET_CPU_HFILES = \
config/tc-tic4x.h \
config/tc-tic54x.h \
config/tc-tic6x.h \
config/tc-tilegx.h \
config/tc-tilepro.h \
config/tc-vax.h \
config/tc-v850.h \
config/tc-xstormy16.h \
@ -835,6 +839,8 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tic4x.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tic54x.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tic6x.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tilegx.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tilepro.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-v850.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-vax.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-xc16x.Po@am__quote@
@ -1623,6 +1629,34 @@ tc-tic6x.obj: config/tc-tic6x.c
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tic6x.obj `if test -f 'config/tc-tic6x.c'; then $(CYGPATH_W) 'config/tc-tic6x.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tic6x.c'; fi`
tc-tilegx.o: config/tc-tilegx.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-tilegx.o -MD -MP -MF $(DEPDIR)/tc-tilegx.Tpo -c -o tc-tilegx.o `test -f 'config/tc-tilegx.c' || echo '$(srcdir)/'`config/tc-tilegx.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-tilegx.Tpo $(DEPDIR)/tc-tilegx.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-tilegx.c' object='tc-tilegx.o' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tilegx.o `test -f 'config/tc-tilegx.c' || echo '$(srcdir)/'`config/tc-tilegx.c
tc-tilegx.obj: config/tc-tilegx.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-tilegx.obj -MD -MP -MF $(DEPDIR)/tc-tilegx.Tpo -c -o tc-tilegx.obj `if test -f 'config/tc-tilegx.c'; then $(CYGPATH_W) 'config/tc-tilegx.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tilegx.c'; fi`
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-tilegx.Tpo $(DEPDIR)/tc-tilegx.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-tilegx.c' object='tc-tilegx.obj' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tilegx.obj `if test -f 'config/tc-tilegx.c'; then $(CYGPATH_W) 'config/tc-tilegx.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tilegx.c'; fi`
tc-tilepro.o: config/tc-tilepro.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-tilepro.o -MD -MP -MF $(DEPDIR)/tc-tilepro.Tpo -c -o tc-tilepro.o `test -f 'config/tc-tilepro.c' || echo '$(srcdir)/'`config/tc-tilepro.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-tilepro.Tpo $(DEPDIR)/tc-tilepro.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-tilepro.c' object='tc-tilepro.o' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tilepro.o `test -f 'config/tc-tilepro.c' || echo '$(srcdir)/'`config/tc-tilepro.c
tc-tilepro.obj: config/tc-tilepro.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-tilepro.obj -MD -MP -MF $(DEPDIR)/tc-tilepro.Tpo -c -o tc-tilepro.obj `if test -f 'config/tc-tilepro.c'; then $(CYGPATH_W) 'config/tc-tilepro.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tilepro.c'; fi`
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-tilepro.Tpo $(DEPDIR)/tc-tilepro.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-tilepro.c' object='tc-tilepro.obj' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tilepro.obj `if test -f 'config/tc-tilepro.c'; then $(CYGPATH_W) 'config/tc-tilepro.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tilepro.c'; fi`
tc-vax.o: config/tc-vax.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-vax.o -MD -MP -MF $(DEPDIR)/tc-vax.Tpo -c -o tc-vax.o `test -f 'config/tc-vax.c' || echo '$(srcdir)/'`config/tc-vax.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-vax.Tpo $(DEPDIR)/tc-vax.Po

1844
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93
gas/config/tc-tilegx.h Normal file
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@ -0,0 +1,93 @@
/* tc-tilegx.h - Macros and type defines for a TILE-Gx chip.
Copyright 2011 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#ifndef TC_TILEGX
#include "opcode/tilegx.h"
#define TC_TILEGX
#define TARGET_BYTES_BIG_ENDIAN 0
#define WORKING_DOT_WORD
#define TARGET_ARCH bfd_arch_tilegx
extern const char * tilegx_target_format (void);
#define TARGET_FORMAT tilegx_target_format ()
#define DWARF2_LINE_MIN_INSN_LENGTH 8
#define md_number_to_chars number_to_chars_littleendian
#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
#define HANDLE_ALIGN(fragp) tilegx_handle_align (fragp)
extern void tilegx_handle_align (struct frag *);
#define MAX_MEM_FOR_RS_ALIGN_CODE (7 + 8)
struct tilegx_operand;
#define TC_FIX_TYPE const struct tilegx_operand *
/* Initialize the TC_FIX_TYPE field. */
#define TC_INIT_FIX_DATA(FIX) \
FIX->tc_fix_data = 0
extern void tilegx_cons_fix_new (struct frag *, int,
int, struct expressionS *);
#define TC_CONS_FIX_NEW(FRAG, WHERE, NBYTES, EXP) \
tilegx_cons_fix_new (FRAG, WHERE, NBYTES, EXP)
extern int tilegx_parse_name (char *, expressionS *, char *);
#define md_parse_name(name, e, m, nextP) tilegx_parse_name (name, e, nextP)
extern int tilegx_fix_adjustable (struct fix *);
#define tc_fix_adjustable(FIX) tilegx_fix_adjustable (FIX)
extern int tilegx_unrecognized_line (int);
#define tc_unrecognized_line(ch) tilegx_unrecognized_line (ch)
/* Values passed to md_apply_fix3 don't include the symbol value. */
#define MD_APPLY_SYM_VALUE(FIX) 0
#define md_convert_frag(b,s,f) \
as_fatal ("tilegx convert_frag called")
#define md_estimate_size_before_relax(f,s) \
(as_fatal ("tilegx estimate_size_before_relax called"),1)
#define md_operand(x)
#define md_section_align(seg,size) (size)
/* We want .cfi_* pseudo-ops for generating unwind info. */
#define TARGET_USE_CFIPOP 1
#define tc_cfi_frame_initial_instructions tilegx_cfi_frame_initial_instructions
extern void tilegx_cfi_frame_initial_instructions (void);
#define tc_regname_to_dw2regnum tc_tilegx_regname_to_dw2regnum
extern int tc_tilegx_regname_to_dw2regnum (char *);
extern int tilegx_cie_data_alignment;
#define DWARF2_DEFAULT_RETURN_COLUMN 55
#define DWARF2_CIE_DATA_ALIGNMENT tilegx_cie_data_alignment
#endif /* TC_TILEGX */

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93
gas/config/tc-tilepro.h Normal file
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@ -0,0 +1,93 @@
/* tc-tile.h - Macros and type defines for a TILEPro chip.
Copyright 2011 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#ifndef TC_TILEPRO
#include "opcode/tilepro.h"
#define TC_TILEPRO
#define TARGET_BYTES_BIG_ENDIAN 0
#define WORKING_DOT_WORD
#define TARGET_ARCH bfd_arch_tilepro
#define TARGET_FORMAT "elf32-tilepro"
#define DWARF2_LINE_MIN_INSN_LENGTH 8
#define md_number_to_chars number_to_chars_littleendian
#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
#define HANDLE_ALIGN(fragp) tilepro_handle_align (fragp)
extern void tilepro_handle_align (struct frag *);
#define MAX_MEM_FOR_RS_ALIGN_CODE (7 + 8)
struct tilepro_operand;
#define TC_FIX_TYPE const struct tilepro_operand *
/* Initialize the TC_FIX_TYPE field. */
#define TC_INIT_FIX_DATA(FIX) \
FIX->tc_fix_data = 0
extern void tilepro_cons_fix_new (struct frag *, int,
int, struct expressionS *);
#define TC_CONS_FIX_NEW(FRAG, WHERE, NBYTES, EXP) \
tilepro_cons_fix_new (FRAG, WHERE, NBYTES, EXP)
extern int tilepro_parse_name (char *, expressionS *, char *);
#define md_parse_name(name, e, m, nextP) tilepro_parse_name (name, e, nextP)
extern int tilepro_fix_adjustable (struct fix *);
#define tc_fix_adjustable(FIX) tilepro_fix_adjustable (FIX)
extern int tilepro_unrecognized_line (int);
#define tc_unrecognized_line(ch) tilepro_unrecognized_line (ch)
/* Values passed to md_apply_fix3 don't include the symbol value. */
#define MD_APPLY_SYM_VALUE(FIX) 0
#define md_convert_frag(b,s,f) \
as_fatal ("tilepro convert_frag called")
#define md_estimate_size_before_relax(f,s) \
(as_fatal ("tilepro estimate_size_before_relax called"),1)
#define md_operand(x)
#define md_section_align(seg,size) (size)
/* We want .cfi_* pseudo-ops for generating unwind info. */
#define TARGET_USE_CFIPOP 1
#define tc_cfi_frame_initial_instructions \
tilepro_cfi_frame_initial_instructions
extern void tilepro_cfi_frame_initial_instructions (void);
#define tc_regname_to_dw2regnum tc_tilepro_regname_to_dw2regnum
extern int tc_tilepro_regname_to_dw2regnum (char *);
#define DWARF2_DEFAULT_RETURN_COLUMN 55
#define DWARF2_CIE_DATA_ALIGNMENT (-4)
#endif /* TC_TILEPRO */

2
gas/configure.tgt
View File

@ -399,6 +399,8 @@ case ${generic_target} in
tic54x-*-* | c54x*-*-*) fmt=coff bfd_gas=yes need_libm=yes;;
tic6x-*-*) fmt=elf ;;
tilepro-*-* | tilegx-*-*) fmt=elf ;;
v850*-*-*) fmt=elf ;;
vax-*-netbsdelf*) fmt=elf em=nbsd ;;

2
gas/doc/Makefile.am
View File

@ -66,6 +66,8 @@ CPU_DOCS = \
c-sparc.texi \
c-tic54x.texi \
c-tic6x.texi \
c-tilegx.texi \
c-tilepro.texi \
c-vax.texi \
c-v850.texi \
c-xtensa.texi \

2
gas/doc/Makefile.in
View File

@ -306,6 +306,8 @@ CPU_DOCS = \
c-sparc.texi \
c-tic54x.texi \
c-tic6x.texi \
c-tilegx.texi \
c-tilepro.texi \
c-vax.texi \
c-v850.texi \
c-xtensa.texi \

2
gas/doc/all.texi
View File

@ -66,6 +66,8 @@
@set SPARC
@set TIC54X
@set TIC6X
@set TILEGX
@set TILEPRO
@set V850
@set VAX
@set XTENSA

41
gas/doc/as.texinfo
View File

@ -487,6 +487,14 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
[@b{-mdsbt}|@b{-mno-dsbt}] [@b{-mpid=no}|@b{-mpid=near}|@b{-mpid=far}]
[@b{-mpic}|@b{-mno-pic}]
@end ifset
@ifset TILEGX
@emph{Target TILE-Gx options:}
[@b{-m32}|@b{-m64}]
@end ifset
@ifset TILEPRO
@c TILEPro has no machine-dependent assembler options
@end ifset
@ifset XTENSA
@ -1364,6 +1372,25 @@ TMS320C6000 processor.
@end ifset
@ifset TILEGX
@ifclear man
@xref{TILE-Gx Options}, for the options available when @value{AS} is configured
for a TILE-Gx processor.
@end ifclear
@ifset man
@c man begin OPTIONS
The following options are available when @value{AS} is configured for a TILE-Gx
processor.
@c man end
@c man begin INCLUDE
@include c-tilegx.texi
@c ended inside the included file
@end ifset
@end ifset
@ifset XTENSA
@ifclear man
@ -6881,6 +6908,12 @@ subject, see the hardware manufacturer's manual.
@ifset TIC6X
* TIC6X-Dependent :: TI TMS320C6x Dependent Features
@end ifset
@ifset TILEGX
* TILE-Gx-Dependent :: Tilera TILE-Gx Dependent Features
@end ifset
@ifset TILEPRO
* TILEPro-Dependent :: Tilera TILEPro Dependent Features
@end ifset
@ifset V850
* V850-Dependent:: V850 Dependent Features
@end ifset
@ -7076,6 +7109,14 @@ family.
@include c-tic6x.texi
@end ifset
@ifset TILEGX
@include c-tilegx.texi
@end ifset
@ifset TILEPRO
@include c-tilepro.texi
@end ifset
@ifset Z80
@include c-z80.texi
@end ifset

369
gas/doc/c-tilegx.texi Normal file
View File

@ -0,0 +1,369 @@
@c Copyright 2011
@c Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@c man end
@ifset GENERIC
@page
@node TILE-Gx-Dependent
@chapter TILE-Gx Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter TILE-Gx Dependent Features
@end ifclear
@cindex TILE-Gx support
@menu
* TILE-Gx Options:: TILE-Gx Options
* TILE-Gx Syntax:: TILE-Gx Syntax
* TILE-Gx Directives:: TILE-Gx Directives
@end menu
@node TILE-Gx Options
@section Options
The following table lists all available TILE-Gx specific options:
@c man begin OPTIONS
@table @gcctabopt
@cindex @samp{-m32} option, TILE-Gx
@cindex @samp{-m64} option, TILE-Gx
@item -m32 | -m64
Select the word size, either 32 bits or 64 bits.
@end table
@c man end
@node TILE-Gx Syntax
@section Syntax
@cindex TILE-Gx syntax
@cindex syntax, TILE-Gx
Block comments are delimited by @samp{/*} and @samp{*/}. End of line
comments may be introduced by @samp{#}.
Instructions consist of a leading opcode or macro name followed by
whitespace and an optional comma-separated list of operands:
@smallexample
@var{opcode} [@var{operand}, @dots{}]
@end smallexample
Instructions must be separated by a newline or semicolon.
There are two ways to write code: either write naked instructions,
which the assembler is free to combine into VLIW bundles, or specify
the VLIW bundles explicitly.
Bundles are specified using curly braces:
@smallexample
@{ @var{add} r3,r4,r5 ; @var{add} r7,r8,r9 ; @var{lw} r10,r11 @}
@end smallexample
A bundle can span multiple lines. If you want to put multiple
instructions on a line, whether in a bundle or not, you need to
separate them with semicolons as in this example.
A bundle may contain one or more instructions, up to the limit
specified by the ISA (currently three). If fewer instructions are
specified than the hardware supports in a bundle, the assembler
inserts @code{fnop} instructions automatically.
The assembler will prefer to preserve the ordering of instructions
within the bundle, putting the first instruction in a lower-numbered
pipeline than the next one, etc. This fact, combined with the
optional use of explicit @code{fnop} or @code{nop} instructions,
allows precise control over which pipeline executes each instruction.
If the instructions cannot be bundled in the listed order, the
assembler will automatically try to find a valid pipeline
assignment. If there is no way to bundle the instructions together,
the assembler reports an error.
The assembler does not yet auto-bundle (automatically combine multiple
instructions into one bundle), but it reserves the right to do so in
the future. If you want to force an instruction to run by itself, put
it in a bundle explicitly with curly braces and use @code{nop}
instructions (not @code{fnop}) to fill the remaining pipeline slots in
that bundle.
@menu
* TILE-Gx Opcodes:: Opcode Naming Conventions.
* TILE-Gx Registers:: Register Naming.
* TILE-Gx Modifiers:: Symbolic Operand Modifiers.
@end menu
@node TILE-Gx Opcodes
@subsection Opcode Names
@cindex TILE-Gx opcode names
@cindex opcode names, TILE-Gx
For a complete list of opcodes and descriptions of their semantics,
see @cite{TILE-Gx Instruction Set Architecture}, available upon
request at www.tilera.com.
@node TILE-Gx Registers
@subsection Register Names
@cindex TILE-Gx register names
@cindex register names, TILE-Gx
General-purpose registers are represented by predefined symbols of the
form @samp{r@var{N}}, where @var{N} represents a number between
@code{0} and @code{63}. However, the following registers have
canonical names that must be used instead:
@table @code
@item r54
sp
@item r55
lr
@item r56
sn
@item r57
idn0
@item r58
idn1
@item r59
udn0
@item r60
udn1
@item r61
udn2
@item r62
udn3
@item r63
zero
@end table
The assembler will emit a warning if a numeric name is used instead of
the non-numeric name. The @code{.no_require_canonical_reg_names}
assembler pseudo-op turns off this
warning. @code{.require_canonical_reg_names} turns it back on.
@node TILE-Gx Modifiers
@subsection Symbolic Operand Modifiers
@cindex TILE-Gx modifiers
@cindex symbol modifiers, TILE-Gx
The assembler supports several modifiers when using symbol addresses
in TILE-Gx instruction operands. The general syntax is the following:
@smallexample
modifier(symbol)
@end smallexample
The following modifiers are supported:
@table @code
@item hw0
This modifier is used to load bits 0-15 of the symbol's address.
@item hw1
This modifier is used to load bits 16-31 of the symbol's address.
@item hw2
This modifier is used to load bits 32-47 of the symbol's address.
@item hw3
This modifier is used to load bits 48-63 of the symbol's address.
@item hw0_last
This modifier yields the same value as @code{hw0}, but it also checks
that the value does not overflow.
@item hw1_last
This modifier yields the same value as @code{hw1}, but it also checks
that the value does not overflow.
@item hw2_last
This modifier yields the same value as @code{hw2}, but it also checks
that the value does not overflow.
A 48-bit symbolic value is constructed by using the following idiom:
@smallexample
moveli r0, hw2_last(sym)
shl16insli r0, r0, hw1(sym)
shl16insli r0, r0, hw0(sym)
@end smallexample
@item hw0_got
This modifier is used to load bits 0-15 of the symbol's offset in the
GOT entry corresponding to the symbol.
@item hw1_got
This modifier is used to load bits 16-31 of the symbol's offset in the
GOT entry corresponding to the symbol.
@item hw2_got
This modifier is used to load bits 32-47 of the symbol's offset in the
GOT entry corresponding to the symbol.
@item hw3_got
This modifier is used to load bits 48-63 of the symbol's offset in the
GOT entry corresponding to the symbol.
@item hw0_last_got
This modifier yields the same value as @code{hw0_got}, but it also
checks that the value does not overflow.
@item hw1_last_got
This modifier yields the same value as @code{hw1_got}, but it also
checks that the value does not overflow.
@item hw2_last_got
This modifier yields the same value as @code{hw2_got}, but it also
checks that the value does not overflow.
@item plt
This modifier is used for function symbols. It causes a
@emph{procedure linkage table}, an array of code stubs, to be created
at the time the shared object is created or linked against, together
with a global offset table entry. The value is a pc-relative offset
to the corresponding stub code in the procedure linkage table. This
arrangement causes the run-time symbol resolver to be called to look
up and set the value of the symbol the first time the function is
called (at latest; depending environment variables). It is only safe
to leave the symbol unresolved this way if all references are function
calls.
@item hw0_tls_gd
This modifier is used to load bits 0-15 of the offset of the GOT entry
of the symbol's TLS descriptor, to be used for general-dynamic TLS
accesses.
@item hw1_tls_gd
This modifier is used to load bits 16-31 of the offset of the GOT
entry of the symbol's TLS descriptor, to be used for general-dynamic
TLS accesses.
@item hw2_tls_gd
This modifier is used to load bits 32-47 of the offset of the GOT
entry of the symbol's TLS descriptor, to be used for general-dynamic
TLS accesses.
@item hw3_tls_gd
This modifier is used to load bits 48-63 of the offset of the GOT
entry of the symbol's TLS descriptor, to be used for general-dynamic
TLS accesses.
@item hw0_last_tls_gd
This modifier yields the same value as @code{hw0_tls_gd}, but it also
checks that the value does not overflow.
@item hw1_last_tls_gd
This modifier yields the same value as @code{hw1_tls_gd}, but it also
checks that the value does not overflow.
@item hw2_last_tls_gd
This modifier yields the same value as @code{hw2_tls_gd}, but it also
checks that the value does not overflow.
@item hw0_tls_ie
This modifier is used to load bits 0-15 of the offset of the GOT entry
containing the offset of the symbol's address from the TCB, to be used
for initial-exec TLS accesses.
@item hw1_tls_ie
This modifier is used to load bits 16-31 of the offset of the GOT
entry containing the offset of the symbol's address from the TCB, to
be used for initial-exec TLS accesses.
@item hw2_tls_ie
This modifier is used to load bits 32-47 of the offset of the GOT entry
containing the offset of the symbol's address from the TCB, to be used
for initial-exec TLS accesses.
@item hw3_tls_ie
This modifier is used to load bits 48-63 of the offset of the GOT
entry containing the offset of the symbol's address from the TCB, to
be used for initial-exec TLS accesses.
@item hw0_last_tls_ie
This modifier yields the same value as @code{hw0_tls_ie}, but it also
checks that the value does not overflow.
@item hw1_last_tls_ie
This modifier yields the same value as @code{hw1_tls_ie}, but it also
checks that the value does not overflow.
@item hw2_last_tls_ie
This modifier yields the same value as @code{hw2_tls_ie}, but it also
checks that the value does not overflow.
@end table
@node TILE-Gx Directives
@section TILE-Gx Directives
@cindex machine directives, TILE-Gx
@cindex TILE-Gx machine directives
@table @code
@cindex @code{.align} directive, TILE-Gx
@item .align @var{expression} [, @var{expression}]
This is the generic @var{.align} directive. The first argument is the
requested alignment in bytes.
@cindex @code{.allow_suspicious_bundles} directive, TILE-Gx
@item .allow_suspicious_bundles
Turns on error checking for combinations of instructions in a bundle
that probably indicate a programming error. This is on by default.
@item .no_allow_suspicious_bundles
Turns off error checking for combinations of instructions in a bundle
that probably indicate a programming error.
@cindex @code{.require_canonical_reg_names} directive, TILE-Gx
@item .require_canonical_reg_names
Require that canonical register names be used, and emit a warning if
the numeric names are used. This is on by default.
@item .no_require_canonical_reg_names
Permit the use of numeric names for registers that have canonical
names.
@end table

297
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@c Copyright 2011
@c Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@node TILEPro-Dependent
@chapter TILEPro Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter TILEPro Dependent Features
@end ifclear
@cindex TILEPro support
@menu
* TILEPro Options:: TILEPro Options
* TILEPro Syntax:: TILEPro Syntax
* TILEPro Directives:: TILEPro Directives
@end menu
@node TILEPro Options
@section Options
@code{@value{AS}} has no machine-dependent command-line options for
TILEPro.
@node TILEPro Syntax
@section Syntax
@cindex TILEPro syntax
@cindex syntax, TILEPro
Block comments are delimited by @samp{/*} and @samp{*/}. End of line
comments may be introduced by @samp{#}.
Instructions consist of a leading opcode or macro name followed by
whitespace and an optional comma-separated list of operands:
@smallexample
@var{opcode} [@var{operand}, @dots{}]
@end smallexample
Instructions must be separated by a newline or semicolon.
There are two ways to write code: either write naked instructions,
which the assembler is free to combine into VLIW bundles, or specify
the VLIW bundles explicitly.
Bundles are specified using curly braces:
@smallexample
@{ @var{add} r3,r4,r5 ; @var{add} r7,r8,r9 ; @var{lw} r10,r11 @}
@end smallexample
A bundle can span multiple lines. If you want to put multiple
instructions on a line, whether in a bundle or not, you need to
separate them with semicolons as in this example.
A bundle may contain one or more instructions, up to the limit
specified by the ISA (currently three). If fewer instructions are
specified than the hardware supports in a bundle, the assembler
inserts @code{fnop} instructions automatically.
The assembler will prefer to preserve the ordering of instructions
within the bundle, putting the first instruction in a lower-numbered
pipeline than the next one, etc. This fact, combined with the
optional use of explicit @code{fnop} or @code{nop} instructions,
allows precise control over which pipeline executes each instruction.
If the instructions cannot be bundled in the listed order, the
assembler will automatically try to find a valid pipeline
assignment. If there is no way to bundle the instructions together,
the assembler reports an error.
The assembler does not yet auto-bundle (automatically combine multiple
instructions into one bundle), but it reserves the right to do so in
the future. If you want to force an instruction to run by itself, put
it in a bundle explicitly with curly braces and use @code{nop}
instructions (not @code{fnop}) to fill the remaining pipeline slots in
that bundle.
@menu
* TILEPro Opcodes:: Opcode Naming Conventions.
* TILEPro Registers:: Register Naming.
* TILEPro Modifiers:: Symbolic Operand Modifiers.
@end menu
@node TILEPro Opcodes
@subsection Opcode Names
@cindex TILEPro opcode names
@cindex opcode names, TILEPro
For a complete list of opcodes and descriptions of their semantics,
see @cite{TILE Processor User Architecture Manual}, available upon
request at www.tilera.com.
@node TILEPro Registers
@subsection Register Names
@cindex TILEPro register names
@cindex register names, TILEPro
General-purpose registers are represented by predefined symbols of the
form @samp{r@var{N}}, where @var{N} represents a number between
@code{0} and @code{63}. However, the following registers have
canonical names that must be used instead:
@table @code
@item r54
sp
@item r55
lr
@item r56
sn
@item r57
idn0
@item r58
idn1
@item r59
udn0
@item r60
udn1
@item r61
udn2
@item r62
udn3
@item r63
zero
@end table
The assembler will emit a warning if a numeric name is used instead of
the canonical name. The @code{.no_require_canonical_reg_names}
assembler pseudo-op turns off this
warning. @code{.require_canonical_reg_names} turns it back on.
@node TILEPro Modifiers
@subsection Symbolic Operand Modifiers
@cindex TILEPro modifiers
@cindex symbol modifiers, TILEPro
The assembler supports several modifiers when using symbol addresses
in TILEPro instruction operands. The general syntax is the following:
@smallexample
modifier(symbol)
@end smallexample
The following modifiers are supported:
@table @code
@item lo16
This modifier is used to load the low 16 bits of the symbol's address,
sign-extended to a 32-bit value (sign-extension allows it to be
range-checked against signed 16 bit immediate operands without
complaint).
@item hi16
This modifier is used to load the high 16 bits of the symbol's
address, also sign-extended to a 32-bit value.
@item ha16
@code{ha16(N)} is identical to @code{hi16(N)}, except if
@code{lo16(N)} is negative it adds one to the @code{hi16(N)}
value. This way @code{lo16} and @code{ha16} can be added to create any
32-bit value using @code{auli}. For example, here is how you move an
arbitrary 32-bit address into r3:
@smallexample
moveli r3, lo16(sym)
auli r3, r3, ha16(sym)
@end smallexample
@item got
This modifier is used to load the offset of the GOT entry
corresponding to the symbol.
@item got_lo16
This modifier is used to load the sign-extended low 16 bits of the
offset of the GOT entry corresponding to the symbol.
@item got_hi16
This modifier is used to load the sign-extended high 16 bits of the
offset of the GOT entry corresponding to the symbol.
@item got_ha16
This modifier is like @code{got_hi16}, but it adds one if
@code{got_lo16} of the input value is negative.
@item plt
This modifier is used for function symbols. It causes a
@emph{procedure linkage table}, an array of code stubs, to be created
at the time the shared object is created or linked against, together
with a global offset table entry. The value is a pc-relative offset
to the corresponding stub code in the procedure linkage table. This
arrangement causes the run-time symbol resolver to be called to look
up and set the value of the symbol the first time the function is
called (at latest; depending environment variables). It is only safe
to leave the symbol unresolved this way if all references are function
calls.
@item tls_gd
This modifier is used to load the offset of the GOT entry of the
symbol's TLS descriptor, to be used for general-dynamic TLS accesses.
@item tls_gd_lo16
This modifier is used to load the sign-extended low 16 bits of the
offset of the GOT entry of the symbol's TLS descriptor, to be used for
general dynamic TLS accesses.
@item tls_gd_hi16
This modifier is used to load the sign-extended high 16 bits of the
offset of the GOT entry of the symbol's TLS descriptor, to be used for
general dynamic TLS accesses.
@item tls_gd_ha16
This modifier is like @code{tls_gd_hi16}, but it adds one to the value
if @code{tls_gd_lo16} of the input value is negative.
@item tls_ie
This modifier is used to load the offset of the GOT entry containing
the offset of the symbol's address from the TCB, to be used for
initial-exec TLS accesses.
@item tls_ie_lo16
This modifier is used to load the low 16 bits of the offset of the GOT
entry containing the offset of the symbol's address from the TCB, to
be used for initial-exec TLS accesses.
@item tls_ie_hi16
This modifier is used to load the high 16 bits of the offset of the
GOT entry containing the offset of the symbol's address from the TCB,
to be used for initial-exec TLS accesses.
@item tls_ie_ha16
This modifier is like @code{tls_ie_hi16}, but it adds one to the value
if @code{tls_ie_lo16} of the input value is negative.
@end table
@node TILEPro Directives
@section TILEPro Directives
@cindex machine directives, TILEPro
@cindex TILEPro machine directives
@table @code
@cindex @code{.align} directive, TILEPro
@item .align @var{expression} [, @var{expression}]
This is the generic @var{.align} directive. The first argument is the
requested alignment in bytes.
@cindex @code{.allow_suspicious_bundles} directive, TILEPro
@item .allow_suspicious_bundles
Turns on error checking for combinations of instructions in a bundle
that probably indicate a programming error. This is on by default.
@item .no_allow_suspicious_bundles
Turns off error checking for combinations of instructions in a bundle
that probably indicate a programming error.
@cindex @code{.require_canonical_reg_names} directive, TILEPro
@item .require_canonical_reg_names
Require that canonical register names be used, and emit a warning if
the numeric names are used. This is on by default.
@item .no_require_canonical_reg_names
Permit the use of numeric names for registers that have canonical
names.
@end table

11
gas/testsuite/ChangeLog
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@ -1,3 +1,14 @@
2011-06-13 Walter Lee <walt@tilera.com>
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
2011-06-13 Nick Clifton <nickc@redhat.com>
PR gas/12854

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23
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@ -0,0 +1,23 @@
# Expect script for TILE-Gx assembler tests.
# Copyright 2011 Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
if [istarget tilegx-*-*] {
run_dump_test "t_insns"
}

262
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@ -0,0 +1,262 @@
#as:
#objdump: --section .data -w -s -z
.*: file format .*
Contents of section .data:
0000 37000000 00000000 3839c600 00010203 .*
0010 04050607 08090a0b 0c0d0e0f 10111213 .*
0020 14151617 18191a1b 1c1d1e1f 20212223 .*
0030 24252627 28292a2b 2c2d2e2f 30313233 .*
0040 34353637 38393a3b 3c3d3e3f 40414243 .*
0050 44454647 48494a4b 4c4d4e4f 50515253 .*
0060 54555657 58595a5b 5c5d5e5f 60616263 .*
0070 64656667 68696a6b 6c6d6e6f 70717273 .*
0080 74757677 78797a7b 7c7d7e7f 80818283 .*
0090 84858687 88898a8b 8c8d8e8f 90919293 .*
00a0 94959697 98999a9b 9c9d9e9f a0a1a2a3 .*
00b0 a4a5a6a7 a8a9aaab acadaeaf b0b1b2b3 .*
00c0 b4b5b6b7 b8b9babb bcbdbebf c0c1c2c3 .*
00d0 c4c5c6c7 c8c9cacb cccdcecf d0d1d2d3 .*
00e0 d4d5d6d7 d8d9dadb dcdddedf e0e1e2e3 .*
00f0 e4e5e6e7 e8e9eaeb ecedeeef f0f1f2f3 .*
0100 f4f5f6f7 f8f9fafb fcfdfeff 00001100 .*
0110 22003300 44005500 ed07fe07 0f082008 .*
0120 31084208 da0feb0f fc0f0d10 1e102f10 .*
0130 c717d817 e917fa17 0b181c18 b41fc51f .*
0140 d61fe71f f81f0920 a127b227 c327d427 .*
0150 e527f627 8e2f9f2f b02fc12f d22fe32f .*
0160 7b378c37 9d37ae37 bf37d037 683f793f .*
0170 8a3f9b3f ac3fbd3f 55476647 77478847 .*
0180 9947aa47 424f534f 644f754f 864f974f .*
0190 2f574057 51576257 73578457 1c5f2d5f .*
01a0 3e5f4f5f 605f715f 09671a67 2b673c67 .*
01b0 4d675e67 f66e076f 186f296f 3a6f4b6f .*
01c0 e376f476 05771677 27773877 d07ee17e .*
01d0 f27e037f 147f257f bd86ce86 df86f086 .*
01e0 01871287 aa8ebb8e cc8edd8e ee8eff8e .*
01f0 9796a896 b996ca96 db96ec96 849e959e .*
0200 a69eb79e c89ed99e 71a682a6 93a6a4a6 .*
0210 b5a6c6a6 5eae6fae 80ae91ae a2aeb3ae .*
0220 4bb65cb6 6db67eb6 8fb6a0b6 38be49be .*
0230 5abe6bbe 7cbe8dbe 25c636c6 47c658c6 .*
0240 69c67ac6 12ce23ce 34ce45ce 56ce67ce .*
0250 ffd510d6 21d632d6 43d654d6 ecddfddd .*
0260 0ede1fde 30de41de d9e5eae5 fbe50ce6 .*
0270 1de62ee6 c6edd7ed e8edf9ed 0aee1bee .*
0280 b3f5c4f5 d5f5e6f5 f7f508f6 78563412 .*
0290 5d2e2612 42061812 27de0912 3bf85f19 .*
02a0 c8d45119 55b14319 e28d3519 fe998b20 .*
02b0 337b7d20 685c6f20 9d3d6120 c13bb727 .*
02c0 9e21a927 7b079b27 58ed8c27 84dde22e .*
02d0 09c8d42e 8eb2c62e 139db82e 477f0e36 .*
02e0 746e0036 a15df235 ce4ce435 0a213a3d .*
02f0 df142c3d b4081e3d 89fc0f3d cdc26544 .*
0300 4abb5744 c7b34944 44ac3b44 9064914b .*
0310 b561834b da5e754b ff5b674b 5306bd52 .*
0320 2008af52 ed09a152 ba0b9352 16a8e859 .*
0330 8baeda59 00b5cc59 75bbbe59 d9491461 .*
0340 f6540661 1360f860 306bea60 9ceb3f68 .*
0350 61fb3168 260b2468 eb1a1668 5f8d6b6f .*
0360 cca15d6f 39b64f6f a6ca416f 222f9776 .*
0370 37488976 4c617b76 617a6d76 e5d0c27d .*
0380 a2eeb47d 5f0ca77d 1c2a997d a872ee84 .*
0390 0d95e084 72b7d284 d7d9c484 6b141a8c .*
03a0 783b0c8c 8562fe8b 9289f08b 2eb64593 .*
03b0 e3e13793 980d2a93 4d391c93 f157719a .*
03c0 4e88639a abb8559a 08e9479a b4f99ca1 .*
03d0 b92e8fa1 be6381a1 c39873a1 779bc8a8 .*
03e0 24d5baa8 d10eada8 7e489fa8 3a3df4af .*
03f0 8f7be6af e4b9d8af 39f8caaf fdde1fb7 .*
0400 fa2112b7 f76404b7 f4a7f6b6 c0804bbe .*
0410 65c83dbe 0a1030be af5722be 832277c5 .*
0420 d06e69c5 1dbb5bc5 6a074ec5 46c4a2cc .*
0430 3b1595cc 306687cc 25b779cc 0966ced3 .*
0440 a6bbc0d3 4311b3d3 e066a5d3 cc07fada .*
0450 1162ecda 56bcdeda 9b16d1da 8fa925e2 .*
0460 7c0818e2 69670ae2 56c6fce1 524b51e9 .*
0470 e7ae43e9 7c1236e9 117628e9 15ed7cf0 .*
0480 52556ff0 8fbd61f0 cc2554f0 00010203 .*
0490 04050607 08090a0b 0c0d0e0f 10111213 .*
04a0 14151617 18191a1b 1c1d1e1f 20212223 .*
04b0 24252627 28292a2b 2c2d2e2f 30313233 .*
04c0 34353637 38393a3b 3c3d3e3f 40414243 .*
04d0 44454647 48494a4b 4c4d4e4f 50515253 .*
04e0 54555657 58595a5b 5c5d5e5f 60616263 .*
04f0 64656667 68696a6b 6c6d6e6f 70717273 .*
0500 74757677 78797a7b 7c7d7e7f 80818283 .*
0510 84858687 88898a8b 8c8d8e8f 90919293 .*
0520 94959697 98999a9b 9c9d9e9f a0a1a2a3 .*
0530 a4a5a6a7 a8a9aaab acadaeaf b0b1b2b3 .*
0540 b4b5b6b7 b8b9babb bcbdbebf c0c1c2c3 .*
0550 c4c5c6c7 c8c9cacb cccdcecf d0d1d2d3 .*
0560 d4d5d6d7 d8d9dadb dcdddedf e0e1e2e3 .*
0570 e4e5e6e7 e8e9eaeb ecedeeef f0f1f2f3 .*
0580 f4f5f6f7 f8f9fafb fcfdfeff 00001100 .*
0590 22003300 44005500 ed07fe07 0f082008 .*
05a0 31084208 da0feb0f fc0f0d10 1e102f10 .*
05b0 c717d817 e917fa17 0b181c18 b41fc51f .*
05c0 d61fe71f f81f0920 a127b227 c327d427 .*
05d0 e527f627 8e2f9f2f b02fc12f d22fe32f .*
05e0 7b378c37 9d37ae37 bf37d037 683f793f .*
05f0 8a3f9b3f ac3fbd3f 55476647 77478847 .*
0600 9947aa47 424f534f 644f754f 864f974f .*
0610 2f574057 51576257 73578457 1c5f2d5f .*
0620 3e5f4f5f 605f715f 09671a67 2b673c67 .*
0630 4d675e67 f66e076f 186f296f 3a6f4b6f .*
0640 e376f476 05771677 27773877 d07ee17e .*
0650 f27e037f 147f257f bd86ce86 df86f086 .*
0660 01871287 aa8ebb8e cc8edd8e ee8eff8e .*
0670 9796a896 b996ca96 db96ec96 849e959e .*
0680 a69eb79e c89ed99e 71a682a6 93a6a4a6 .*
0690 b5a6c6a6 5eae6fae 80ae91ae a2aeb3ae .*
06a0 4bb65cb6 6db67eb6 8fb6a0b6 38be49be .*
06b0 5abe6bbe 7cbe8dbe 25c636c6 47c658c6 .*
06c0 69c67ac6 12ce23ce 34ce45ce 56ce67ce .*
06d0 ffd510d6 21d632d6 43d654d6 ecddfddd .*
06e0 0ede1fde 30de41de d9e5eae5 fbe50ce6 .*
06f0 1de62ee6 c6edd7ed e8edf9ed 0aee1bee .*
0700 b3f5c4f5 d5f5e6f5 f7f508f6 78563412 .*
0710 5d2e2612 42061812 27de0912 eb7a223d .*
0720 554e143d bf21063d 29f5f73c 5e9f1068 .*
0730 4d6e0268 3c3df467 2b0ce667 d1c3fe92 .*
0740 458ef092 b958e292 2d23d492 44e8ecbd .*
0750 3daedebd 3674d0bd 2f3ac2bd b70cdbe8 .*
0760 35cecce8 b38fbee8 3151b0e8 2a31c913 .*
0770 2deeba13 30abac13 33689e13 9d55b73e .*
0780 250ea93e adc69a3e 357f8c3e 107aa569 .*
0790 1d2e9769 2ae28869 37967a69 839e9394 .*
07a0 154e8594 a7fd7694 39ad6894 f6c281bf .*
07b0 0d6e73bf 241965bf 3bc456bf 69e76fea .*
07c0 058e61ea a13453ea 3ddb44ea dc0b5e15 .*
07d0 fdad4f15 1e504115 3ff23215 4f304c40 .*
07e0 f5cd3d40 9b6b2f40 41092140 c2543a6b .*
07f0 eded2b6b 18871d6b 43200f6b 35792896 .*
0800 e50d1a96 95a20b96 4537fd95 a89d16c1 .*
0810 dd2d08c1 12bef9c0 474eebc0 1bc204ec .*
0820 d54df6eb 8fd9e7eb 4965d9eb 8ee6f216 .*
0830 cd6de416 0cf5d516 4b7cc716 010be141 .*
0840 c58dd241 8910c441 4d93b541 742fcf6c .*
0850 bdadc06c 062cb26c 4faaa36c e753bd97 .*
0860 b5cdae97 8347a097 51c19197 5a78abc2 .*
0870 aded9cc2 00638ec2 53d87fc2 cd9c99ed .*
0880 a50d8bed 7d7e7ced 55ef6ded 40c18718 .*
0890 9d2d7918 fa996a18 57065c18 b3e57543 .*
08a0 954d6743 77b55843 591d4a43 260a646e .*
08b0 8d6d556e f4d0466e 5b34386e 992e5299 .*
08c0 858d4399 71ec3499 5d4b2699 0c5340c4 .*
08d0 7dad31c4 ee0723c4 5f6214c4 7f772eef .*
08e0 75cd1fef 6b2311ef 617902ef f29b1c1a .*
08f0 6ded0d1a e83eff19 6390f019 65c00a45 .*
0900 650dfc44 655aed44 65a7de44 2241fc05 .*
0910 d0f22bfa d0f22bfa 761afb05 6da739d4 .*
0920 6da739d4 caf3f905 0a5c47ae 0a5c47ae .*
0930 1ecdf805 a7105588 a7105588 52fe700c .*
0940 bbafcef4 bbafcef4 82b1110c fd3ea6ce .*
0950 fd3ea6ce b264b20b 3fce7da8 3fce7da8 .*
0960 e217530b 815d5582 815d5582 82bbe512 .*
0970 a66c71ef a66c71ef 8e482812 8dd612c9 .*
0980 8dd612c9 9ad56a11 7440b4a2 7440b4a2 .*
0990 a662ad10 5baa557c 5baa557c b2785a19 .*
09a0 912914ea 912914ea 9adf3e18 1d6e7fc3 .*
09b0 1d6e7fc3 82462317 a9b2ea9c a9b2ea9c .*
09c0 6aad0716 35f75576 35f75576 e235cf1f .*
09d0 7ce6b6e4 7ce6b6e4 a676551e ad05ecbd .*
09e0 ad05ecbd 6ab7db1c de242197 de242197 .*
09f0 2ef8611b 0f445670 0f445670 12f34326 .*
0a00 67a359df 67a359df b20d6c24 3d9d58b8 .*
0a10 3d9d58b8 52289422 13975791 13975791 .*
0a20 f242bc20 e990566a e990566a 42b0b82c .*
0a30 5260fcd9 5260fcd9 bea4822a cd34c5b2 .*
0a40 cd34c5b2 3a994c28 48098e8b 48098e8b .*
0a50 b68d1626 c3dd5664 c3dd5664 726d2d33 .*
0a60 3d1d9fd4 3d1d9fd4 ca3b9930 5dcc31ad .*
0a70 5dcc31ad 220a052e 7d7bc485 7d7bc485 .*
0a80 7ad8702b 9d2a575e 9d2a575e a22aa239 .*
0a90 28da41cf 28da41cf d6d2af36 ed639ea7 .*
0aa0 ed639ea7 0a7bbd33 b2edfa7f b2edfa7f .*
0ab0 3e23cb30 77775758 77775758 d2e71640 .*
0ac0 1397e4c9 1397e4c9 e269c63c 7dfb0aa2 .*
0ad0 7dfb0aa2 f2eb7539 e75f317a e75f317a .*
0ae0 026e2536 51c45752 51c45752 02a58b46 .*
0af0 fe5387c4 fe5387c4 ee00dd42 0d93779c .*
0b00 0d93779c da5c2e3f 1cd26774 1cd26774 .*
0b10 c6b87f3b 2b11584c 2b11584c 3262004d .*
0b20 e9102abf e9102abf fa97f348 9d2ae496 .*
0b30 9d2ae496 c2cde644 51449e6e 51449e6e .*
0b40 8a03da40 055e5846 055e5846 621f7553 .*
0b50 d4cdccb9 d4cdccb9 062f0a4f 2dc25091 .*
0b60 2dc25091 aa3e9f4a 86b6d468 86b6d468 .*
0b70 4e4e3446 dfaa5840 dfaa5840 92dce959 .*
0b80 bf8a6fb4 bf8a6fb4 12c62055 bd59bd8b .*
0b90 bd59bd8b 92af5750 bb280b63 bb280b63 .*
0ba0 12998e4b b9f7583a b9f7583a c2995e60 .*
0bb0 aa4712af aa4712af 1e5d375b 4df12986 .*
0bc0 4df12986 7a201056 f09a415d f09a415d .*
0bd0 d6e3e850 93445934 93445934 f256d366 .*
0be0 9504b5a9 9504b5a9 2af44d61 dd889680 .*
0bf0 dd889680 6291c85b 250d7857 250d7857 .*
0c00 9a2e4356 6d91592e 6d91592e 2214486d .*
0c10 80c157a4 80c157a4 368b6467 6d20037b .*
0c20 6d20037b 4a028161 5a7fae51 5a7fae51 .*
0c30 5e799d5b 47de5928 47de5928 52d1bc73 .*
0c40 6b7efa9e 6b7efa9e 42227b6d fdb76f75 .*
0c50 fdb76f75 32733967 8ff1e44b 8ff1e44b .*
0c60 22c4f760 212b5a22 212b5a22 828e317a .*
0c70 563b9d99 563b9d99 4eb99173 8d4fdc6f .*
0c80 8d4fdc6f 1ae4f16c c4631b46 c4631b46 .*
0c90 e60e5266 fb775a1c fb775a1c b24ba680 .*
0ca0 41f83f94 41f83f94 5a50a879 1de7486a .*
0cb0 1de7486a 0255aa72 f9d55140 f9d55140 .*
0cc0 aa59ac6b d5c45a16 d5c45a16 e2081b87 .*
0cd0 2cb5e28e 2cb5e28e 66e7be7f ad7eb564 .*
0ce0 ad7eb564 eac56278 2e48883a 2e48883a .*
0cf0 6ea40671 af115b10 af115b10 12c68f8d .*
0d00 17728589 17728589 727ed585 3d16225f .*
0d10 3d16225f d2361b7e 63babe34 63babe34 .*
0d20 32ef6076 895e5b0a 895e5b0a 42830494 .*
0d30 022f2884 022f2884 7e15ec8b cdad8e59 .*
0d40 cdad8e59 baa7d383 982cf52e 982cf52e .*
0d50 f639bb7b 63ab5b04 63ab5b04 7240799a .*
0d60 edebca7e edebca7e 8aac0292 5d45fb53 .*
0d70 5d45fb53 a2188c89 cd9e2b29 cd9e2b29 .*
0d80 ba841581 3df85bfe 3df85bfe a2fdeda0 .*
0d90 d8a86d79 d8a86d79 96431998 eddc674e .*
0da0 eddc674e 8a89448f 02116223 02116223 .*
0db0 7ecf6f86 17455cf8 17455cf8 d2ba62a7 .*
0dc0 c3651074 c3651074 a2da2f9e 7d74d448 .*
0dd0 7d74d448 72fafc94 3783981d 3783981d .*
0de0 421aca8b f1915cf2 f1915cf2 0278d7ad .*
0df0 ae22b36e ae22b36e ae7146a4 0d0c4143 .*
0e00 0d0c4143 5a6bb59a 6cf5ce17 6cf5ce17 .*
0e10 06652491 cbde5cec cbde5cec 32354cb4 .*
0e20 99df5569 99df5569 ba085daa 9da3ad3d .*
0e30 9da3ad3d 42dc6da0 a1670512 a1670512 .*
0e40 caaf7e96 a52b5de6 a52b5de6 62f2c0ba .*
0e50 849cf863 849cf863 c69f73b0 2d3b1a38 .*
0e60 2d3b1a38 2a4d26a6 d6d93b0c d6d93b0c .*
0e70 8efad89b 7f785de0 7f785de0 92af35c1 .*
0e80 6f599b5e 6f599b5e d2368ab6 bdd28632 .*
0e90 bdd28632 12bedeab 0b4c7206 0b4c7206 .*
0ea0 524533a1 59c55dda 59c55dda c26caac7 .*
0eb0 5a163e59 5a163e59 decda0bc 4d6af32c .*
0ec0 4d6af32c fa2e97b1 40bea800 40bea800 .*
0ed0 16908da6 33125ed4 33125ed4 f2291fce .*
0ee0 45d3e053 45d3e053 ea64b7c2 dd016027 .*
0ef0 dd016027 e29f4fb7 7530dffa 7530dffa .*
0f00 dadae7ab 0d5f5ece 0d5f5ece 00000000 .*
0f10 00000000 00000000 00000000 00000000 .*
0f20 00000000 00000000 00000000 00000000 .*
0f30 00000000 00000000 00000000 00000000 .*
0f40 00000000 00000000 00000000 00000000 .*
0f50 00000000 00000000 00000000 00000000 .*
0f60 00000000 00000000 00000000 00000000 .*
0f70 00000000 00000000 00000000 00000000 .*
0f80 00000000 00000000 00000000 00000000 .*
0f90 00000000 00000000 00000000 00000000 .*
0fa0 00000000 00000000 00000000 00000000 .*
0fb0 00000000 00000000 00000000 00000000 .*
0fc0 00000000 00000000 00000000 00000000 .*
0fd0 00000000 00000000 00000000 00000000 .*
0fe0 00000000 00000000 00000000 00000000 .*
0ff0 00000000 00000000 00000000 00000000 .*

639
gas/testsuite/gas/tilepro/t_constants.s Normal file
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.text
.global _start
_start:
.data
.align 1024
label_1:
.byte 0x37
.align 8
.byte 0x38
.byte 0x39
.byte -0x3A
.align 4
label_2:
.byte 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
.byte 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F
.byte 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17
.byte 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F
.byte 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27
.byte 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F
.byte 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37
.byte 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F
.byte 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47
.byte 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F
.byte 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57
.byte 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F
.byte 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67
.byte 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F
.byte 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77
.byte 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F
.byte 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87
.byte 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F
.byte 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97
.byte 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F
.byte 0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7
.byte 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF
.byte 0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7
.byte 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF
.byte 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7
.byte 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF
.byte 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7
.byte 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF
.byte 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7
.byte 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF
.byte 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7
.byte 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
.short 0x0000, 0x0011, 0x0022, 0x0033, 0x0044, 0x0055
.short 0x07ED, 0x07FE, 0x080F, 0x0820, 0x0831, 0x0842
.short 0x0FDA, 0x0FEB, 0x0FFC, 0x100D, 0x101E, 0x102F
.short 0x17C7, 0x17D8, 0x17E9, 0x17FA, 0x180B, 0x181C
.short 0x1FB4, 0x1FC5, 0x1FD6, 0x1FE7, 0x1FF8, 0x2009
.short 0x27A1, 0x27B2, 0x27C3, 0x27D4, 0x27E5, 0x27F6
.short 0x2F8E, 0x2F9F, 0x2FB0, 0x2FC1, 0x2FD2, 0x2FE3
.short 0x377B, 0x378C, 0x379D, 0x37AE, 0x37BF, 0x37D0
.short 0x3F68, 0x3F79, 0x3F8A, 0x3F9B, 0x3FAC, 0x3FBD
.short 0x4755, 0x4766, 0x4777, 0x4788, 0x4799, 0x47AA
.short 0x4F42, 0x4F53, 0x4F64, 0x4F75, 0x4F86, 0x4F97
.short 0x572F, 0x5740, 0x5751, 0x5762, 0x5773, 0x5784
.short 0x5F1C, 0x5F2D, 0x5F3E, 0x5F4F, 0x5F60, 0x5F71
.short 0x6709, 0x671A, 0x672B, 0x673C, 0x674D, 0x675E
.short 0x6EF6, 0x6F07, 0x6F18, 0x6F29, 0x6F3A, 0x6F4B
.short 0x76E3, 0x76F4, 0x7705, 0x7716, 0x7727, 0x7738
.short 0x7ED0, 0x7EE1, 0x7EF2, 0x7F03, 0x7F14, 0x7F25
.short 0x86BD, 0x86CE, 0x86DF, 0x86F0, 0x8701, 0x8712
.short 0x8EAA, 0x8EBB, 0x8ECC, 0x8EDD, 0x8EEE, 0x8EFF
.short 0x9697, 0x96A8, 0x96B9, 0x96CA, 0x96DB, 0x96EC
.short 0x9E84, 0x9E95, 0x9EA6, 0x9EB7, 0x9EC8, 0x9ED9
.short 0xA671, 0xA682, 0xA693, 0xA6A4, 0xA6B5, 0xA6C6
.short 0xAE5E, 0xAE6F, 0xAE80, 0xAE91, 0xAEA2, 0xAEB3
.short 0xB64B, 0xB65C, 0xB66D, 0xB67E, 0xB68F, 0xB6A0
.short 0xBE38, 0xBE49, 0xBE5A, 0xBE6B, 0xBE7C, 0xBE8D
.short 0xC625, 0xC636, 0xC647, 0xC658, 0xC669, 0xC67A
.short 0xCE12, 0xCE23, 0xCE34, 0xCE45, 0xCE56, 0xCE67
.short 0xD5FF, 0xD610, 0xD621, 0xD632, 0xD643, 0xD654
.short 0xDDEC, 0xDDFD, 0xDE0E, 0xDE1F, 0xDE30, 0xDE41
.short 0xE5D9, 0xE5EA, 0xE5FB, 0xE60C, 0xE61D, 0xE62E
.short 0xEDC6, 0xEDD7, 0xEDE8, 0xEDF9, 0xEE0A, 0xEE1B
.short 0xF5B3, 0xF5C4, 0xF5D5, 0xF5E6, 0xF5F7, 0xF608
.word 0x12345678, 0x12262E5D, 0x12180642, 0x1209DE27
.word 0x195FF83B, 0x1951D4C8, 0x1943B155, 0x19358DE2
.word 0x208B99FE, 0x207D7B33, 0x206F5C68, 0x20613D9D
.word 0x27B73BC1, 0x27A9219E, 0x279B077B, 0x278CED58
.word 0x2EE2DD84, 0x2ED4C809, 0x2EC6B28E, 0x2EB89D13
.word 0x360E7F47, 0x36006E74, 0x35F25DA1, 0x35E44CCE
.word 0x3D3A210A, 0x3D2C14DF, 0x3D1E08B4, 0x3D0FFC89
.word 0x4465C2CD, 0x4457BB4A, 0x4449B3C7, 0x443BAC44
.word 0x4B916490, 0x4B8361B5, 0x4B755EDA, 0x4B675BFF
.word 0x52BD0653, 0x52AF0820, 0x52A109ED, 0x52930BBA
.word 0x59E8A816, 0x59DAAE8B, 0x59CCB500, 0x59BEBB75
.word 0x611449D9, 0x610654F6, 0x60F86013, 0x60EA6B30
.word 0x683FEB9C, 0x6831FB61, 0x68240B26, 0x68161AEB
.word 0x6F6B8D5F, 0x6F5DA1CC, 0x6F4FB639, 0x6F41CAA6
.word 0x76972F22, 0x76894837, 0x767B614C, 0x766D7A61
.word 0x7DC2D0E5, 0x7DB4EEA2, 0x7DA70C5F, 0x7D992A1C
.word 0x84EE72A8, 0x84E0950D, 0x84D2B772, 0x84C4D9D7
.word 0x8C1A146B, 0x8C0C3B78, 0x8BFE6285, 0x8BF08992
.word 0x9345B62E, 0x9337E1E3, 0x932A0D98, 0x931C394D
.word 0x9A7157F1, 0x9A63884E, 0x9A55B8AB, 0x9A47E908
.word 0xA19CF9B4, 0xA18F2EB9, 0xA18163BE, 0xA17398C3
.word 0xA8C89B77, 0xA8BAD524, 0xA8AD0ED1, 0xA89F487E
.word 0xAFF43D3A, 0xAFE67B8F, 0xAFD8B9E4, 0xAFCAF839
.word 0xB71FDEFD, 0xB71221FA, 0xB70464F7, 0xB6F6A7F4
.word 0xBE4B80C0, 0xBE3DC865, 0xBE30100A, 0xBE2257AF
.word 0xC5772283, 0xC5696ED0, 0xC55BBB1D, 0xC54E076A
.word 0xCCA2C446, 0xCC95153B, 0xCC876630, 0xCC79B725
.word 0xD3CE6609, 0xD3C0BBA6, 0xD3B31143, 0xD3A566E0
.word 0xDAFA07CC, 0xDAEC6211, 0xDADEBC56, 0xDAD1169B
.word 0xE225A98F, 0xE218087C, 0xE20A6769, 0xE1FCC656
.word 0xE9514B52, 0xE943AEE7, 0xE936127C, 0xE9287611
.word 0xF07CED15, 0xF06F5552, 0xF061BD8F, 0xF05425CC
.byte 0, 1, 2, 3, 4, 5, 6, 7
.byte 8, 9, 10, 11, 12, 13, 14, 15
.byte 16, 17, 18, 19, 20, 21, 22, 23
.byte 24, 25, 26, 27, 28, 29, 30, 31
.byte 32, 33, 34, 35, 36, 37, 38, 39
.byte 40, 41, 42, 43, 44, 45, 46, 47
.byte 48, 49, 50, 51, 52, 53, 54, 55
.byte 56, 57, 58, 59, 60, 61, 62, 63
.byte 64, 65, 66, 67, 68, 69, 70, 71
.byte 72, 73, 74, 75, 76, 77, 78, 79
.byte 80, 81, 82, 83, 84, 85, 86, 87
.byte 88, 89, 90, 91, 92, 93, 94, 95
.byte 96, 97, 98, 99, 100, 101, 102, 103
.byte 104, 105, 106, 107, 108, 109, 110, 111
.byte 112, 113, 114, 115, 116, 117, 118, 119
.byte 120, 121, 122, 123, 124, 125, 126, 127
.byte -128, -127, -126, -125, -124, -123, -122, -121
.byte -120, -119, -118, -117, -116, -115, -114, -113
.byte -112, -111, -110, -109, -108, -107, -106, -105
.byte -104, -103, -102, -101, -100, -99, -98, -97
.byte -96, -95, -94, -93, -92, -91, -90, -89
.byte -88, -87, -86, -85, -84, -83, -82, -81
.byte -80, -79, -78, -77, -76, -75, -74, -73
.byte -72, -71, -70, -69, -68, -67, -66, -65
.byte -64, -63, -62, -61, -60, -59, -58, -57
.byte -56, -55, -54, -53, -52, -51, -50, -49
.byte -48, -47, -46, -45, -44, -43, -42, -41
.byte -40, -39, -38, -37, -36, -35, -34, -33
.byte -32, -31, -30, -29, -28, -27, -26, -25
.byte -24, -23, -22, -21, -20, -19, -18, -17
.byte -16, -15, -14, -13, -12, -11, -10, -9
.byte -8, -7, -6, -5, -4, -3, -2, -1
.short 0, 17, 34, 51, 68, 85
.short 2029, 2046, 2063, 2080, 2097, 2114
.short 4058, 4075, 4092, 4109, 4126, 4143
.short 6087, 6104, 6121, 6138, 6155, 6172
.short 8116, 8133, 8150, 8167, 8184, 8201
.short 10145, 10162, 10179, 10196, 10213, 10230
.short 12174, 12191, 12208, 12225, 12242, 12259
.short 14203, 14220, 14237, 14254, 14271, 14288
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.short ha16(0x8000)
.short ha16(0x7230000)
.short ha16(0x723FFFF)
label_3:

8177
gas/testsuite/gas/tilepro/t_insns.d Normal file
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File diff suppressed because it is too large Load Diff

8202
gas/testsuite/gas/tilepro/t_insns.s Normal file
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File diff suppressed because it is too large Load Diff

24
gas/testsuite/gas/tilepro/tilepro.exp Normal file
View File

@ -0,0 +1,24 @@
# Expect script for TILEPro assembler tests.
# Copyright 2011 Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
if [istarget tilepro-*-*] {
run_dump_test "t_insns"
run_dump_test "t_constants"
}

19
include/ChangeLog
View File

@ -1,11 +1,7 @@
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
2011-06-13 Walter Lee <walt@tilera.com>
* opcode/s390.h: Replace S390_OPERAND_REG_EVEN with
S390_OPERAND_REG_PAIR.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Add S390_OPCODE_REG_EVEN flag.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
2011-05-17 Alan Modra <amodra@gmail.com>
@ -96,20 +92,11 @@
* dwarf2.h: Update value for DW_AT_hi_user.
2010-11-25 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_MAXCPU.
2010-11-16 Ian Lance Taylor <iant@google.com>
* simple-object.h (simple_object_attributes_merge): Declare,
replacing simple_object_attributes_compare.
2010-11-16 Jie Zhang <jie.zhang@analog.com>
* elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
(EF_BFIN_DATA_IN_L1): Define.
2010-11-04 Ian Lance Taylor <iant@google.com>
* dwarf2.h (enum dwarf_source_language): Add DW_LANG_Go.

6
include/dis-asm.h
View File

@ -1,7 +1,7 @@
/* Interface between the opcode library and its callers.
Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009, 2010
Free Software Foundation, Inc.
Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009, 2010,
2011 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -286,6 +286,8 @@ extern int print_insn_tic4x (bfd_vma, disassemble_info *);
extern int print_insn_tic54x (bfd_vma, disassemble_info *);
extern int print_insn_tic6x (bfd_vma, disassemble_info *);
extern int print_insn_tic80 (bfd_vma, disassemble_info *);
extern int print_insn_tilegx (bfd_vma, disassemble_info *);
extern int print_insn_tilepro (bfd_vma, disassemble_info *);
extern int print_insn_v850 (bfd_vma, disassemble_info *);
extern int print_insn_vax (bfd_vma, disassemble_info *);
extern int print_insn_w65 (bfd_vma, disassemble_info *);

11
include/elf/ChangeLog
View File

@ -1,3 +1,9 @@
2011-06-13 Walter Lee <walt@tilera.com>
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
2011-06-09 Tristan Gingold <gingold@adacore.com>
* ia64.h (Elf64_External_VMS_ORIG_DYN_Note): New struct.
@ -56,6 +62,11 @@
R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New
relocations.
2010-11-16 Jie Zhang <jie.zhang@analog.com>
* bfin.h (EF_BFIN_CODE_IN_L1): Define.
(EF_BFIN_DATA_IN_L1): Define.
2010-11-11 Mingming Sun <mingm.sun@gmail.com>
* mips.h (E_MIPS_MACH_LS3A): Defined.

1
include/elf/common.h
View File

@ -295,6 +295,7 @@
#define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */
#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
#define EM_CUDA 190 /* NVIDIA CUDA architecture */
#define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision

162
include/elf/tilegx.h Normal file
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@ -0,0 +1,162 @@
/* TILE-Gx ELF support for BFD.
Copyright 2011 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#ifndef _ELF_TILEGX_H
#define _ELF_TILEGX_H
#include "elf/reloc-macros.h"
/* Relocations. */
START_RELOC_NUMBERS (elf_tilegx_reloc_type)
RELOC_NUMBER (R_TILEGX_NONE, 0)
/* Standard relocations */
RELOC_NUMBER (R_TILEGX_64, 1)
RELOC_NUMBER (R_TILEGX_32, 2)
RELOC_NUMBER (R_TILEGX_16, 3)
RELOC_NUMBER (R_TILEGX_8, 4)
RELOC_NUMBER (R_TILEGX_64_PCREL, 5)
RELOC_NUMBER (R_TILEGX_32_PCREL, 6)
RELOC_NUMBER (R_TILEGX_16_PCREL, 7)
RELOC_NUMBER (R_TILEGX_8_PCREL, 8)
/* Custom relocations */
RELOC_NUMBER (R_TILEGX_HW0, 9)
RELOC_NUMBER (R_TILEGX_HW1, 10)
RELOC_NUMBER (R_TILEGX_HW2, 11)
RELOC_NUMBER (R_TILEGX_HW3, 12)
RELOC_NUMBER (R_TILEGX_HW0_LAST, 13)
RELOC_NUMBER (R_TILEGX_HW1_LAST, 14)
RELOC_NUMBER (R_TILEGX_HW2_LAST, 15)
RELOC_NUMBER (R_TILEGX_COPY, 16)
RELOC_NUMBER (R_TILEGX_GLOB_DAT, 17)
RELOC_NUMBER (R_TILEGX_JMP_SLOT, 18)
RELOC_NUMBER (R_TILEGX_RELATIVE, 19)
/* Branch/jump offsets */
RELOC_NUMBER (R_TILEGX_BROFF_X1, 20)
RELOC_NUMBER (R_TILEGX_JUMPOFF_X1, 21)
RELOC_NUMBER (R_TILEGX_JUMPOFF_X1_PLT, 22)
/* Immediate operands. */
RELOC_NUMBER (R_TILEGX_IMM8_X0, 23)
RELOC_NUMBER (R_TILEGX_IMM8_Y0, 24)
RELOC_NUMBER (R_TILEGX_IMM8_X1, 25)
RELOC_NUMBER (R_TILEGX_IMM8_Y1, 26)
RELOC_NUMBER (R_TILEGX_DEST_IMM8_X1, 27)
RELOC_NUMBER (R_TILEGX_MT_IMM14_X1, 28)
RELOC_NUMBER (R_TILEGX_MF_IMM14_X1, 29)
RELOC_NUMBER (R_TILEGX_MMSTART_X0, 30)
RELOC_NUMBER (R_TILEGX_MMEND_X0, 31)
RELOC_NUMBER (R_TILEGX_SHAMT_X0, 32)
RELOC_NUMBER (R_TILEGX_SHAMT_X1, 33)
RELOC_NUMBER (R_TILEGX_SHAMT_Y0, 34)
RELOC_NUMBER (R_TILEGX_SHAMT_Y1, 35)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0, 36)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0, 37)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1, 38)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1, 39)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2, 40)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2, 41)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW3, 42)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW3, 43)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_LAST, 44)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_LAST, 45)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_LAST, 46)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_LAST, 47)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_LAST, 48)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_LAST, 49)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_PCREL, 50)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_PCREL, 51)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_PCREL, 52)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_PCREL, 53)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_PCREL, 54)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_PCREL, 55)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW3_PCREL, 56)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW3_PCREL, 57)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_LAST_PCREL, 58)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_LAST_PCREL, 59)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_LAST_PCREL, 60)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_LAST_PCREL, 61)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_LAST_PCREL, 62)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_LAST_PCREL, 63)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_GOT, 64)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_GOT, 65)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_GOT, 66)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_GOT, 67)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_GOT, 68)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_GOT, 69)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW3_GOT, 70)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW3_GOT, 71)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_LAST_GOT, 72)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_LAST_GOT, 73)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_LAST_GOT, 74)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_LAST_GOT, 75)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_LAST_GOT, 76)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_LAST_GOT, 77)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_TLS_GD, 78)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_TLS_GD, 79)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_TLS_GD, 80)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_TLS_GD, 81)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_TLS_GD, 82)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_TLS_GD, 83)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW3_TLS_GD, 84)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW3_TLS_GD, 85)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD, 86)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD, 87)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD, 88)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD, 89)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD, 90)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD, 91)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_TLS_IE, 92)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_TLS_IE, 93)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_TLS_IE, 94)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_TLS_IE, 95)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_TLS_IE, 96)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_TLS_IE, 97)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW3_TLS_IE, 98)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW3_TLS_IE, 99)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE, 100)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE, 101)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE, 102)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE, 103)
RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE, 104)
RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE, 105)
RELOC_NUMBER (R_TILEGX_TLS_DTPMOD64, 106)
RELOC_NUMBER (R_TILEGX_TLS_DTPOFF64, 107)
RELOC_NUMBER (R_TILEGX_TLS_TPOFF64, 108)
RELOC_NUMBER (R_TILEGX_TLS_DTPMOD32, 109)
RELOC_NUMBER (R_TILEGX_TLS_DTPOFF32, 110)
RELOC_NUMBER (R_TILEGX_TLS_TPOFF32, 111)
/* These are GNU extensions to enable C++ vtable garbage collection. */
RELOC_NUMBER (R_TILEGX_GNU_VTINHERIT, 128)
RELOC_NUMBER (R_TILEGX_GNU_VTENTRY, 129)
END_RELOC_NUMBERS (R_TILEGX_max)
#endif /* _ELF_TILEGX_H */

128
include/elf/tilepro.h Normal file
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@ -0,0 +1,128 @@
/* TILEPro ELF support for BFD.
Copyright 2011 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#ifndef _ELF_TILEPRO_H
#define _ELF_TILEPRO_H
#include "elf/reloc-macros.h"
/* Relocations. */
START_RELOC_NUMBERS (elf_tilepro_reloc_type)
RELOC_NUMBER (R_TILEPRO_NONE, 0)
/* Standard relocations */
RELOC_NUMBER (R_TILEPRO_32, 1)
RELOC_NUMBER (R_TILEPRO_16, 2)
RELOC_NUMBER (R_TILEPRO_8, 3)
RELOC_NUMBER (R_TILEPRO_32_PCREL, 4)
RELOC_NUMBER (R_TILEPRO_16_PCREL, 5)
RELOC_NUMBER (R_TILEPRO_8_PCREL, 6)
RELOC_NUMBER (R_TILEPRO_LO16, 7)
RELOC_NUMBER (R_TILEPRO_HI16, 8)
RELOC_NUMBER (R_TILEPRO_HA16, 9)
RELOC_NUMBER (R_TILEPRO_COPY, 10)
RELOC_NUMBER (R_TILEPRO_GLOB_DAT, 11)
RELOC_NUMBER (R_TILEPRO_JMP_SLOT, 12)
RELOC_NUMBER (R_TILEPRO_RELATIVE, 13)
/* Branch/jump offsets */
RELOC_NUMBER (R_TILEPRO_BROFF_X1, 14)
RELOC_NUMBER (R_TILEPRO_JOFFLONG_X1, 15)
RELOC_NUMBER (R_TILEPRO_JOFFLONG_X1_PLT, 16)
/* Immediate operands. */
RELOC_NUMBER (R_TILEPRO_IMM8_X0, 17)
RELOC_NUMBER (R_TILEPRO_IMM8_Y0, 18)
RELOC_NUMBER (R_TILEPRO_IMM8_X1, 19)
RELOC_NUMBER (R_TILEPRO_IMM8_Y1, 20)
RELOC_NUMBER (R_TILEPRO_MT_IMM15_X1, 21)
RELOC_NUMBER (R_TILEPRO_MF_IMM15_X1, 22)
RELOC_NUMBER (R_TILEPRO_IMM16_X0, 23)
RELOC_NUMBER (R_TILEPRO_IMM16_X1, 24)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_LO, 25)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_LO, 26)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_HI, 27)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_HI, 28)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_HA, 29)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_HA, 30)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_PCREL, 31)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_PCREL, 32)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_LO_PCREL, 33)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_LO_PCREL, 34)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_HI_PCREL, 35)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_HI_PCREL, 36)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_HA_PCREL, 37)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_HA_PCREL, 38)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_GOT, 39)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_GOT, 40)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_GOT_LO, 41)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_GOT_LO, 42)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_GOT_HI, 43)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_GOT_HI, 44)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_GOT_HA, 45)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_GOT_HA, 46)
RELOC_NUMBER (R_TILEPRO_MMSTART_X0, 47)
RELOC_NUMBER (R_TILEPRO_MMEND_X0, 48)
RELOC_NUMBER (R_TILEPRO_MMSTART_X1, 49)
RELOC_NUMBER (R_TILEPRO_MMEND_X1, 50)
RELOC_NUMBER (R_TILEPRO_SHAMT_X0, 51)
RELOC_NUMBER (R_TILEPRO_SHAMT_X1, 52)
RELOC_NUMBER (R_TILEPRO_SHAMT_Y0, 53)
RELOC_NUMBER (R_TILEPRO_SHAMT_Y1, 54)
RELOC_NUMBER (R_TILEPRO_DEST_IMM8_X1, 55)
/* Relocs 56-65 are currently not defined. */
RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_GD, 66)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_GD, 67)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_GD_LO, 68)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_GD_LO, 69)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_GD_HI, 70)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_GD_HI, 71)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_GD_HA, 72)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_GD_HA, 73)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_IE, 74)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_IE, 75)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_IE_LO, 76)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_IE_LO, 77)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_IE_HI, 78)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_IE_HI, 79)
RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_IE_HA, 80)
RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_IE_HA, 81)
RELOC_NUMBER (R_TILEPRO_TLS_DTPMOD32, 82)
RELOC_NUMBER (R_TILEPRO_TLS_DTPOFF32, 83)
RELOC_NUMBER (R_TILEPRO_TLS_TPOFF32, 84)
/* These are GNU extensions to enable C++ vtable garbage collection. */
RELOC_NUMBER (R_TILEPRO_GNU_VTINHERIT, 128)
RELOC_NUMBER (R_TILEPRO_GNU_VTENTRY, 129)
END_RELOC_NUMBERS (R_TILEPRO_max)
#endif /* _ELF_TILEPRO_H */

20
include/opcode/ChangeLog
View File

@ -1,6 +1,20 @@
2011-06-13 Walter Lee <walt@tilera.com>
* tilegx.h: New file.
* tilepro.h: New file.
2011-05-31 Paul Brook <paul@codesourcery.com>
* opcode/arm.h (ARM_ARCH_V7R_IDIV): Define.
* arm.h (ARM_ARCH_V7R_IDIV): Define.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h: Replace S390_OPERAND_REG_EVEN with
S390_OPERAND_REG_PAIR.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h: Add S390_OPCODE_REG_EVEN flag.
2011-04-18 Julian Brown <julian@codesourcery.com>
@ -57,6 +71,10 @@
(OP_*_RZ, OP_*_FZ, INSN2_M_FP_D, INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z)
(INSN2_READ_GPR_Z, INSN2_READ_FPR_Z, INSN2_READ_GPR_D): Define.
2010-11-25 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_MAXCPU.
2010-11-23 Richard Sandiford <rdsandiford@googlemail.com>
* mips.h: Fix previous commit.

1302
include/opcode/tilegx.h Normal file
View File

File diff suppressed because it is too large Load Diff

1636
include/opcode/tilepro.h Normal file
View File

File diff suppressed because it is too large Load Diff

14
ld/ChangeLog
View File

@ -1,3 +1,17 @@
2011-06-13 Walter Lee <walt@tilera.com>
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
2011-06-13 Alan Modra <amodra@gmail.com>
* ldlang.c (sort_def_symbol, lang_one_common): Don't handle

15
ld/Makefile.am
View File

@ -247,6 +247,8 @@ ALL_EMULATION_SOURCES = \
eelf32ppcvxworks.c \
eelf32ppcwindiss.c \
eelf32rx.c \
eelf32tilegx.c \
eelf32tilepro.c \
eelf32vax.c \
eelf32xc16x.c \
eelf32xc16xl.c \
@ -476,6 +478,7 @@ ALL_64_EMULATION_SOURCES = \
eelf64ltsmip_fbsd.c \
eelf64mmix.c \
eelf64ppc.c \
eelf64tilegx.c \
eelf_l1om.c \
eelf_l1om_fbsd.c \
eelf_x86_64.c \
@ -909,6 +912,14 @@ eelf32_tic6x_elf_le.c: $(srcdir)/emulparams/elf32_tic6x_elf_le.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \
${GEN_DEPENDS}
${GENSCRIPTS} elf32_tic6x_elf_le "$(tdir_elf32_tic6x_elf_le)"
eelf32tilegx.c: $(srcdir)/emulparams/elf32tilegx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32tilegx "$(tdir_tilegx)"
eelf32tilepro.c: $(srcdir)/emulparams/elf32tilepro.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32tilepro "$(tdir_tilepro)"
eelf32am33lin.c: $(srcdir)/emulparams/elf32am33lin.sh \
$(srcdir)/emulparams/elf32am33lin.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@ -1959,6 +1970,10 @@ eelf64ppc.c: $(srcdir)/emulparams/elf64ppc.sh $(srcdir)/emultempl/ppc64elf.em \
ldemul-list.h \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf64ppc "$(tdir_elf64ppc)"
eelf64tilegx.c: $(srcdir)/emulparams/elf64tilegx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf64tilegx "$(tdir_tilegx)"
eelf_l1om.c: $(srcdir)/emulparams/elf_l1om.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf_l1om "$(tdir_elf_l1om)"

15
ld/Makefile.in
View File

@ -553,6 +553,8 @@ ALL_EMULATION_SOURCES = \
eelf32ppcvxworks.c \
eelf32ppcwindiss.c \
eelf32rx.c \
eelf32tilegx.c \
eelf32tilepro.c \
eelf32vax.c \
eelf32xc16x.c \
eelf32xc16xl.c \
@ -781,6 +783,7 @@ ALL_64_EMULATION_SOURCES = \
eelf64ltsmip_fbsd.c \
eelf64mmix.c \
eelf64ppc.c \
eelf64tilegx.c \
eelf_l1om.c \
eelf_l1om_fbsd.c \
eelf_x86_64.c \
@ -2582,6 +2585,14 @@ eelf32ppcwindiss.c: $(srcdir)/emulparams/elf32ppcwindiss.sh \
eelf32rx.c: $(srcdir)/emulparams/elf32rx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32rx "$(tdir_elf32rx)"
eelf32tilegx.c: $(srcdir)/emulparams/elf32tilegx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32tilegx "$(tdir_tilegx)"
eelf32tilepro.c: $(srcdir)/emulparams/elf32tilepro.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32tilepro "$(tdir_tilepro)"
eelf32vax.c: $(srcdir)/emulparams/elf32vax.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32vax "$(tdir_elf32vax)"
@ -3389,6 +3400,10 @@ eelf64lppc.c: $(srcdir)/emulparams/elf64lppc.sh \
ldemul-list.h \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf64lppc "$(tdir_elf64lppc)"
eelf64tilegx.c: $(srcdir)/emulparams/elf64tilegx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf64tilegx "$(tdir_tilegx)"
eelf64ltsmip.c: $(srcdir)/emulparams/elf64ltsmip.sh \
$(srcdir)/emulparams/elf64btsmip.sh $(srcdir)/emulparams/elf64bmip-defs.sh \
$(srcdir)/emulparams/elf32bmipn32-defs.sh $(ELF_DEPS) \

4
ld/configure.tgt
View File

@ -643,6 +643,10 @@ tic6x-*-uclinux) targ_emul=elf32_tic6x_linux_le
;;
tic80-*-*) targ_emul=tic80coff
;;
tilegx-*-*) targ_emul=elf64tilegx
targ_extra_emuls="elf32tilegx"
targ_extra_libpath=$targ_extra_emuls ;;
tilepro-*-*) targ_emul=elf32tilepro ;;
v850*-*-*) targ_emul=v850
;;
vax-dec-ultrix* | vax-dec-bsd*) targ_emul=vax ;;

26
ld/emulparams/elf32tilegx.sh Normal file
View File

@ -0,0 +1,26 @@
SCRIPT_NAME=elf
OUTPUT_FORMAT="elf32-tilegx"
TEXT_START_ADDR=0x10000
NO_REL_RELOCS=yes
MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
# See also `include/elf/tilegx.h'
ARCH=tilegx
ALIGNMENT=64
MACHINE=
NOP=0
TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
GENERATE_COMBRELOC_SCRIPT=yes
GENERATE_PIE_SCRIPT=yes
NO_SMALL_DATA=yes
SEPARATE_GOTPLT=8
# Look for 32 bit target libraries in /lib32, /usr/lib32 etc., first.
LIBPATH_SUFFIX=32
OTHER_SECTIONS="
/* TILE architecture interrupt vector areas */
.intrpt0 0xfc000000 : { KEEP(*(.intrpt0)) }
.intrpt1 0xfd000000 : { KEEP(*(.intrpt1)) }
.intrpt2 0xfe000000 : { KEEP(*(.intrpt2)) }
.intrpt3 0xff000000 : { KEEP(*(.intrpt3)) }
"

27
ld/emulparams/elf32tilepro.sh Normal file
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@ -0,0 +1,27 @@
SCRIPT_NAME=elf
if [ -z "$OUTPUT_FORMAT" ]; then
# Allow overriding externally to "elf32-tile64" if desired
OUTPUT_FORMAT=elf32-tilepro
fi
TEXT_START_ADDR=0x10000
NO_REL_RELOCS=yes
MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
# See also `include/elf/tilepro.h'
ARCH=tilepro
ALIGNMENT=64
MACHINE=
NOP=0
TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
GENERATE_COMBRELOC_SCRIPT=yes
GENERATE_PIE_SCRIPT=yes
NO_SMALL_DATA=yes
SEPARATE_GOTPLT=8
OTHER_SECTIONS="
/* TILEPRO architecture interrupt vector areas */
.intrpt0 0xfc000000 : { KEEP(*(.intrpt0)) }
.intrpt1 0xfd000000 : { KEEP(*(.intrpt1)) }
.intrpt2 0xfe000000 : { KEEP(*(.intrpt2)) }
.intrpt3 0xff000000 : { KEEP(*(.intrpt3)) }
"

25
ld/emulparams/elf64tilegx.sh Normal file
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@ -0,0 +1,25 @@
SCRIPT_NAME=elf
OUTPUT_FORMAT="elf64-tilegx"
TEXT_START_ADDR=0x10000
NO_REL_RELOCS=yes
MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
# See also `include/elf/tilegx.h'
ARCH=tilegx
ALIGNMENT=64
MACHINE=
NOP=0
# Note that "elf32.em" actually handles elf64 also.
TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
GENERATE_COMBRELOC_SCRIPT=yes
GENERATE_PIE_SCRIPT=yes
NO_SMALL_DATA=yes
SEPARATE_GOTPLT=16
OTHER_SECTIONS="
/* TILE architecture interrupt vector areas */
.intrpt0 0xfffffffffc000000 : { KEEP(*(.intrpt0)) }
.intrpt1 0xfffffffffd000000 : { KEEP(*(.intrpt1)) }
.intrpt2 0xfffffffffe000000 : { KEEP(*(.intrpt2)) }
.intrpt3 0xffffffffff000000 : { KEEP(*(.intrpt3)) }
"

13
ld/testsuite/ChangeLog
View File

@ -1,3 +1,16 @@
2011-06-13 Walter Lee <walt@tilera.com>
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
2011-06-10 Nick Clifton <nickc@redhat.com>
* ld-elf/elf.exp: Add test for linking a shared library with a

2
ld/testsuite/ld-elf/eh5.d
View File

@ -4,7 +4,7 @@
#ld:
#readelf: -wf
#target: cfi
#notarget: alpha* hppa64*
#notarget: alpha* hppa64* tile*
Contents of the .eh_frame section:

8
ld/testsuite/ld-srec/srec.exp
View File

@ -364,6 +364,13 @@ setup_xfail "score-*-*"
# The S-record linker doesn't support Blackfin ELF FDPIC ABI.
setup_xfail "bfin-*-linux-uclibc"
# On tile, we appear to be getting some random-seeming zeroing or 24-bit
# rightshifts (!) in the output when directly generating S-records from
# the linker. Not clear what could be causing this but we don't
# anticipate creating s-records (and could always use objcopy to
# generate the format if need be).
setup_xfail "tile*-*-*"
run_srec_test $test1 "tmpdir/sr1.o tmpdir/sr2.o"
# Now try linking a C++ program with global constructors and
@ -393,5 +400,6 @@ setup_xfail "ia64-*-*"
setup_xfail "*-*-cygwin*" "*-*-mingw*" "*-*-pe*" "*-*-winnt*"
setup_xfail "score-*-*"
setup_xfail "bfin-*-linux-uclibc"
setup_xfail "tile*-*-*"
run_srec_test $test2 "tmpdir/sr3.o"

43
ld/testsuite/ld-tilegx/external.s Normal file
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@ -0,0 +1,43 @@
.text
.global external1
external1:
j external1
.global external2
external2:
j external1
.global external_5a
external_5a = 19
.global external_5b
external_5b = 31
.global external_8a
external_8a = 17
.global external_8b
external_8b = 119
.global external_16a
external_16a = -32134
.global external_16b
external_16b = 19300
.global external_32a
external_32a = 0x12345678
.global external_32b
external_32b = -0x76543210
.global external_48a
external_48a = 0x123456789abc
.global external_48b
external_48b = 0x76543210fedc
.global external_64a
external_64a = 0x123456789abcdef0
.global external_64b
external_64b = 0xfedcba9876543210
.data
.global external_data1
external_data1:

70
ld/testsuite/ld-tilegx/reloc.d Normal file
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@ -0,0 +1,70 @@
.*: file format elf64-tilegx.*
Contents of section .text:
100b0 .*
100c0 .*
100d0 .*
100e0 .*
100f0 .*
10100 .*
10110 .*
10120 .*
10130 .*
10140 .*
10150 .*
10160 .*
10170 .*
10180 .*
10190 .*
101a0 .*
101b0 .*
101c0 .*
Contents of section .data:
201e0 b8010100 c0010100 7a82644b 11773200 .*
201f0 00002e00 2c7a8234 12785634 127856bc .*
20200 9a341278 56bc9af0 de000000 00000000 .*
20210 00000000 00000000 00000000 00000000 .*
Disassembly of section .text:
00000000000100b0 <_start>:
100b0: [0-9a-f]* { add r2, zero, zero }
100b8: [0-9a-f]* { j 101b8 <external1> }
100c0: [0-9a-f]* { add r3, r2, r2 }
100c8: [0-9a-f]* { beqzt zero, 101c0 <external2> }
100d0: [0-9a-f]* { movei r2, 17 ; movei r3, 119 }
100d8: [0-9a-f]* { movei r2, 17 ; movei r3, 119 ; ld zero, zero }
100e0: [0-9a-f]* { mtspr 17, zero }
100e8: [0-9a-f]* { mfspr zero, 17 }
100f0: [0-9a-f]* { moveli r2, -32134 ; moveli r3, 19300 }
100f8: [0-9a-f]* { moveli r2, 4660 ; moveli r3, -30293 }
10100: [0-9a-f]* { shl16insli r2, r2, 22136 ; shl16insli r3, r3, -12816 }
10108: [0-9a-f]* { moveli r2, 4660 ; moveli r3, 30292 }
10110: [0-9a-f]* { shl16insli r2, r2, 22136 ; shl16insli r3, r3, 12816 }
10118: [0-9a-f]* { shl16insli r2, r2, -25924 ; shl16insli r3, r3, -292 }
10120: [0-9a-f]* { moveli r2, 4660 ; moveli r3, -292 }
10128: [0-9a-f]* { shl16insli r2, r2, 22136 ; shl16insli r3, r3, -17768 }
10130: [0-9a-f]* { shl16insli r2, r2, -25924 ; shl16insli r3, r3, 30292 }
10138: [0-9a-f]* { shl16insli r2, r2, -8464 ; shl16insli r3, r3, 12816 }
10140: [0-9a-f]* { ld_add r0, r0, 17 }
10148: [0-9a-f]* { st_add r0, r0, 17 }
10150: [0-9a-f]* { mm r2, r3, 19, 31 }
10158: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 }
10160: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 ; ld zero, zero }
10168: [0-9a-f]* { moveli r0, 80 ; moveli r1, 80 }
10170: [0-9a-f]* { moveli r0, 1 ; moveli r1, 1 }
10178: [0-9a-f]* { moveli r0, 168 ; moveli r1, 168 }
10180: [0-9a-f]* { moveli r0, 4096 ; moveli r1, 4096 }
10188: [0-9a-f]* { moveli r0, 1 ; moveli r1, 1 }
10190: [0-9a-f]* { moveli r0, 144 ; moveli r1, 144 }
10198: [0-9a-f]* { moveli r0, 4096 ; moveli r1, 4096 }
101a0: [0-9a-f]* { moveli r0, 0 ; moveli r1, 0 }
101a8: [0-9a-f]* { moveli r0, 1 ; moveli r1, 1 }
101b0: [0-9a-f]* { moveli r0, 112 ; moveli r1, 112 }
00000000000101b8 <external1>:
101b8: [0-9a-f]* { j 101b8 <external1> }
00000000000101c0 <external2>:
101c0: [0-9a-f]* { j 101b8 <external1> }

77
ld/testsuite/ld-tilegx/reloc.s Normal file
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@ -0,0 +1,77 @@
.text
.global _start
_start:
add r2,zero,zero
j external1
add r3,r2,r2
beqzt zero,external2
{ movei r2,external_8a; movei r3,external_8b }
{ movei r2,external_8a; movei r3,external_8b; ld zero,zero }
{ mtspr external_8a,zero }
{ mfspr zero,external_8a }
{ moveli r2,external_16a; moveli r3,external_16b }
{ moveli r2,hw1_last(external_32a); moveli r3,hw1_last(external_32b) }
{ shl16insli r2,r2,hw0(external_32a); shl16insli r3,r3,hw0(external_32b) }
{ moveli r2,hw2_last(external_48a); moveli r3,hw2_last(external_48b) }
{ shl16insli r2,r2,hw1(external_48a); shl16insli r3,r3,hw1(external_48b) }
{ shl16insli r2,r2,hw0(external_48a); shl16insli r3,r3,hw0(external_48b) }
{ moveli r2,hw3_last(external_64a); moveli r3,hw3_last(external_64b) }
{ shl16insli r2,r2,hw2(external_64a); shl16insli r3,r3,hw2(external_64b) }
{ shl16insli r2,r2,hw1(external_64a); shl16insli r3,r3,hw1(external_64b) }
{ shl16insli r2,r2,hw0(external_64a); shl16insli r3,r3,hw0(external_64b) }
{ ld_add r0,r0,external_8a }
{ st_add r0,r0,external_8a }
{ mm r2,r3,external_5a,external_5b }
{ shli r2,r3,external_5a; shli r4,r5,external_5b }
{ shli r2,r3,external_5a; shli r4,r5,external_5b; ld zero,zero }
{ moveli r0, external1 - .; moveli r1, external1 - . }
{ moveli r0, hw1_last(external_data1 - .)
moveli r1, hw1_last(external_data1 - .) }
{ moveli r0, hw0(external_data1 - .)
moveli r1, hw0(external_data1 - .) }
{ moveli r0, hw2_last(external_data1 - . + 0x100000000000)
moveli r1, hw2_last(external_data1 - . + 0x100000000000) }
{ moveli r0, hw1(external_data1 - . + 0x100000000000)
moveli r1, hw1(external_data1 - . + 0x100000000000) }
{ moveli r0, hw0(external_data1 - . + 0x100000000000)
moveli r1, hw0(external_data1 - . + 0x100000000000) }
{ moveli r0, hw3_last(external_data1 - . + 0x1000000000000000)
moveli r1, hw3_last(external_data1 - . + 0x1000000000000000) }
{ moveli r0, hw2(external_data1 - . + 0x1000000000000000)
moveli r1, hw2(external_data1 - . + 0x1000000000000000) }
{ moveli r0, hw1(external_data1 - . + 0x1000000000000000)
moveli r1, hw1(external_data1 - . + 0x1000000000000000) }
{ moveli r0, hw0(external_data1 - . + 0x1000000000000000)
moveli r1, hw0(external_data1 - . + 0x1000000000000000) }
.data
.align 0x20
.int external1
.int external2
.short external_16a, external_16b
.byte external_8a, external_8b
.int (external_data1-.)
.short (external_data1-.)
.byte (external_data1-.)
.short hw0_last(external_16a)
.short hw1_last(external_32a)
.short hw0(external_32a)
.short hw2_last(external_48a)
.short hw1(external_48a)
.short hw0(external_48a)
.short hw3(external_64a)
.short hw2(external_64a)
.short hw1(external_64a)
.short hw0(external_64a)

37
ld/testsuite/ld-tilegx/tilegx.exp Normal file
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@ -0,0 +1,37 @@
# Expect script for TILE-Gx linker tests.
# Copyright 2011 Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
if {!([istarget "tilegx-*-*"]) } {
return
}
# Set up a list as described in ld-lib.exp
set tilepro_tests {
{ "tilegx relocation resolution linker test"
""
""
{ "reloc.s" "external.s" }
{ {objdump -ds reloc.d} }
"reloc"
}
}
run_ld_link_tests $tilepro_tests

33
ld/testsuite/ld-tilepro/external.s Normal file
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@ -0,0 +1,33 @@
.text
.global external1
external1:
j external1
.global external2
external2:
j external1
.global external_5a
external_5a = 19
.global external_5b
external_5b = 31
.global external_8a
external_8a = 17
.global external_8b
external_8b = 119
.global external_16a
external_16a = -32134
.global external_16b
external_16b = 19300
.global external_32a
external_32a = 0x87654321
.global external_32b
external_32b = 0xfedcba98
.data
.global external_data1
external_data1:

52
ld/testsuite/ld-tilepro/reloc.d Normal file
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@ -0,0 +1,52 @@
.*: file format elf32-tilepro.*
Contents of section .text:
10078 .*
10088 .*
10098 .*
100a8 .*
100b8 .*
100c8 .*
100d8 .*
100e8 .*
100f8 .*
10108 .*
10118 .*
10128 .*
Contents of section .data:
20140 20010100 28010100 7a82644b 11773200 .*
20150 00002e00 2c214398 ba6587dc fe6587dd .*
20160 fe000000 00000000 00000000 00000000 .*
20170 00000000 00000000 00000000 00000000 .*
Disassembly of section .text:
00010078 <_start>:
10078: [0-9a-f]* { add r2, zero, zero }
10080: [0-9a-f]* { j 10120 <external1> }
10088: [0-9a-f]* { add r3, r2, r2 }
10090: [0-9a-f]* { bzt zero, 10128 <external2> }
10098: [0-9a-f]* { movei r2, 17 ; movei r3, 119 }
100a0: [0-9a-f]* { movei r2, 17 ; movei r3, 119 ; lw zero, zero }
100a8: [0-9a-f]* { mtspr 17, zero }
100b0: [0-9a-f]* { mfspr zero, 17 }
100b8: [0-9a-f]* { moveli r2, -32134 ; moveli r3, 19300 }
100c0: [0-9a-f]* { moveli r2, 17185 ; moveli r3, -17768 }
100c8: [0-9a-f]* { addli r2, r2, -30875 ; addli r3, r3, -292 }
100d0: [0-9a-f]* { auli r2, r2, -30875 ; auli r3, r3, -291 }
100d8: [0-9a-f]* { swadd r0, r0, 17 }
100e0: [0-9a-f]* { mm r2, r3, r4, 19, 31 }
100e8: [0-9a-f]* { nop ; mm r5, r6, r7, 19, 31 }
100f0: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 }
100f8: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 ; lw zero, zero }
10100: [0-9a-f]* { moveli r0, 32 }
10108: [0-9a-f]* { moveli r0, 120 }
10110: [0-9a-f]* { moveli r0, 1 }
10118: [0-9a-f]* { moveli r0, 1 }
00010120 <external1>:
10120: [0-9a-f]* { j 10120 <external1> }
00010128 <external2>:
10128: [0-9a-f]* { j 10120 <external1> }

47
ld/testsuite/ld-tilepro/reloc.s Normal file
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@ -0,0 +1,47 @@
.text
.global _start
_start:
add r2,zero,zero
j external1
add r3,r2,r2
bzt zero,external2
{ movei r2,external_8a; movei r3,external_8b }
{ movei r2,external_8a; movei r3,external_8b; lw zero,zero }
{ mtspr external_8a,zero }
{ mfspr zero,external_8a }
{ moveli r2,external_16a; moveli r3,external_16b }
{ moveli r2,lo16(external_32a); moveli r3,lo16(external_32b) }
{ addli r2,r2,hi16(external_32a); addli r3,r3,hi16(external_32b) }
{ auli r2,r2,ha16(external_32a); auli r3,r3,ha16(external_32b) }
{ swadd r0,r0,external_8a }
{ mm r2,r3,r4,external_5a,external_5b }
{ nop; mm r5,r6,r7,external_5a,external_5b }
{ shli r2,r3,external_5a; shli r4,r5,external_5b }
{ shli r2,r3,external_5a; shli r4,r5,external_5b; lw zero,zero }
moveli r0, external1 - .
moveli r0, lo16(external_data1 - .)
moveli r0, hi16(external_data1 - . + 30000)
moveli r0, ha16(external_data1 - . + 30000)
.data
.align 0x20
.int external1
.int external2
.short external_16a, external_16b
.byte external_8a, external_8b
.int (external_data1-.)
.short (external_data1-.)
.byte (external_data1-.)
.short lo16(external_32a)
.short lo16(external_32b)
.short hi16(external_32a)
.short hi16(external_32b)
.short ha16(external_32a)
.short ha16(external_32b)

37
ld/testsuite/ld-tilepro/tilepro.exp Normal file
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@ -0,0 +1,37 @@
# Expect script for TILEPro linker tests.
# Copyright 2011 Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
if {!([istarget "tilepro-*-*"]) } {
return
}
# Set up a list as described in ld-lib.exp
set tilepro_tests {
{ "tilepro relocation resolution linker test"
""
""
{ "reloc.s" "external.s" }
{ {objdump -ds reloc.d} }
"reloc"
}
}
run_ld_link_tests $tilepro_tests

14
opcodes/ChangeLog
View File

@ -1,3 +1,17 @@
2011-06-13 Walter Lee <walt@tilera.com>
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)

4
opcodes/Makefile.am
View File

@ -206,6 +206,10 @@ TARGET_LIBOPCODES_CFILES = \
tic6x-dis.c \
tic80-dis.c \
tic80-opc.c \
tilegx-dis.c \
tilegx-opc.c \
tilepro-dis.c \
tilepro-opc.c \
v850-dis.c \
v850-opc.c \
vax-dis.c \

6
opcodes/Makefile.in
View File

@ -476,6 +476,10 @@ TARGET_LIBOPCODES_CFILES = \
tic6x-dis.c \
tic80-dis.c \
tic80-opc.c \
tilegx-dis.c \
tilegx-opc.c \
tilepro-dis.c \
tilepro-opc.c \
v850-dis.c \
v850-opc.c \
vax-dis.c \
@ -847,6 +851,8 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tic6x-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tic80-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tic80-opc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tilegx-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tilepro-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/v850-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/v850-opc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vax-dis.Plo@am__quote@

2
opcodes/configure vendored
View File

@ -12482,6 +12482,8 @@ if test x${all_targets} = xfalse ; then
bfd_tic54x_arch) ta="$ta tic54x-dis.lo tic54x-opc.lo" ;;
bfd_tic6x_arch) ta="$ta tic6x-dis.lo" ;;
bfd_tic80_arch) ta="$ta tic80-dis.lo tic80-opc.lo" ;;
bfd_tilegx_arch) ta="$ta tilegx-dis.lo tilegx-opc.lo" ;;
bfd_tilepro_arch) ta="$ta tilepro-dis.lo tilepro-opc.lo" ;;
bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;;
bfd_v850e_arch) ta="$ta v850-opc.lo v850-dis.lo" ;;
bfd_v850ea_arch) ta="$ta v850-opc.lo v850-dis.lo" ;;

2
opcodes/configure.in
View File

@ -296,6 +296,8 @@ if test x${all_targets} = xfalse ; then
bfd_tic54x_arch) ta="$ta tic54x-dis.lo tic54x-opc.lo" ;;
bfd_tic6x_arch) ta="$ta tic6x-dis.lo" ;;
bfd_tic80_arch) ta="$ta tic80-dis.lo tic80-opc.lo" ;;
bfd_tilegx_arch) ta="$ta tilegx-dis.lo tilegx-opc.lo" ;;
bfd_tilepro_arch) ta="$ta tilepro-dis.lo tilepro-opc.lo" ;;
bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;;
bfd_v850e_arch) ta="$ta v850-opc.lo v850-dis.lo" ;;
bfd_v850ea_arch) ta="$ta v850-opc.lo v850-dis.lo" ;;

14
opcodes/disassemble.c
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@ -1,6 +1,6 @@
/* Select disassembly routine for specified architecture.
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@ -81,6 +81,8 @@
#define ARCH_tic54x
#define ARCH_tic6x
#define ARCH_tic80
#define ARCH_tilegx
#define ARCH_tilepro
#define ARCH_v850
#define ARCH_vax
#define ARCH_w65
@ -466,6 +468,16 @@ disassembler (abfd)
case bfd_arch_m32c:
disassemble = print_insn_m32c;
break;
#endif
#ifdef ARCH_tilegx
case bfd_arch_tilegx:
disassemble = print_insn_tilegx;
break;
#endif
#ifdef ARCH_tilepro
case bfd_arch_tilepro:
disassemble = print_insn_tilepro;
break;
#endif
default:
return 0;

4
opcodes/po/POTFILES.in
View File

@ -177,6 +177,10 @@ tic54x-opc.c
tic6x-dis.c
tic80-dis.c
tic80-opc.c
tilegx-dis.c
tilegx-opc.c
tilepro-dis.c
tilepro-opc.c
v850-dis.c
v850-opc.c
vax-dis.c

135
opcodes/tilegx-dis.c Normal file
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@ -0,0 +1,135 @@
/* tilegx-dis.c. Disassembly routines for the TILE-Gx architecture.
Copyright 2011 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include <stddef.h>
#include <assert.h>
#include "bfd.h"
#include "elf/tilegx.h"
#include "elf-bfd.h"
#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/tilegx.h"
int
print_insn_tilegx (bfd_vma memaddr, disassemble_info *info)
{
struct tilegx_decoded_instruction
decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
bfd_byte opbuf[TILEGX_BUNDLE_SIZE_IN_BYTES];
int status, i, num_instructions, num_printed;
tilegx_mnemonic padding_mnemonic;
status = (*info->read_memory_func) (memaddr, opbuf,
TILEGX_BUNDLE_SIZE_IN_BYTES, info);
if (status != 0)
{
(*info->memory_error_func) (status, memaddr, info);
return -1;
}
info->bytes_per_line = TILEGX_BUNDLE_SIZE_IN_BYTES;
info->bytes_per_chunk = TILEGX_BUNDLE_SIZE_IN_BYTES;
info->octets_per_byte = 1;
info->display_endian = BFD_ENDIAN_LITTLE;
/* Parse the instructions in the bundle. */
num_instructions =
parse_insn_tilegx (bfd_getl64 (opbuf), memaddr, decoded);
/* Print the instructions in the bundle. */
info->fprintf_func (info->stream, "{ ");
num_printed = 0;
/* Determine which nop opcode is used for padding and should be skipped. */
padding_mnemonic = TILEGX_OPC_FNOP;
for (i = 0; i < num_instructions; i++)
{
if (!decoded[i].opcode->can_bundle)
{
/* Instructions that cannot be bundled are padded out with nops,
rather than fnops. Displaying them is always clutter. */
padding_mnemonic = TILEGX_OPC_NOP;
break;
}
}
for (i = 0; i < num_instructions; i++)
{
const struct tilegx_opcode *opcode = decoded[i].opcode;
const char *name;
int j;
/* Do not print out fnops, unless everything is an fnop, in
which case we will print out just the last one. */
if (opcode->mnemonic == padding_mnemonic
&& (num_printed > 0 || i + 1 < num_instructions))
continue;
if (num_printed > 0)
info->fprintf_func (info->stream, " ; ");
++num_printed;
name = opcode->name;
if (name == NULL)
name = "<invalid>";
info->fprintf_func (info->stream, "%s", name);
for (j = 0; j < opcode->num_operands; j++)
{
bfd_vma num;
const struct tilegx_operand *op;
const char *spr_name;
if (j > 0)
info->fprintf_func (info->stream, ",");
info->fprintf_func (info->stream, " ");
num = decoded[i].operand_values[j];
op = decoded[i].operands[j];
switch (op->type)
{
case TILEGX_OP_TYPE_REGISTER:
info->fprintf_func (info->stream, "%s",
tilegx_register_names[(int) num]);
break;
case TILEGX_OP_TYPE_SPR:
spr_name = get_tilegx_spr_name (num);
if (spr_name != NULL)
info->fprintf_func (info->stream, "%s", spr_name);
else
info->fprintf_func (info->stream, "%d", (int)num);
break;
case TILEGX_OP_TYPE_IMMEDIATE:
info->fprintf_func (info->stream, "%d", (int)num);
break;
case TILEGX_OP_TYPE_ADDRESS:
info->print_address_func (num, info);
break;
default:
abort ();
}
}
}
info->fprintf_func (info->stream, " }");
return TILEGX_BUNDLE_SIZE_IN_BYTES;
}

8055
opcodes/tilegx-opc.c Normal file
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232
opcodes/tilepro-dis.c Normal file
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@ -0,0 +1,232 @@
/* tilepro-dis.c. Disassembly routines for the TILEPro architecture.
Copyright 2011 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include <stddef.h>
#include <assert.h>
#include "bfd.h"
#include "elf/tilepro.h"
#include "elf-bfd.h"
#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/tilepro.h"
#define TREG_ZERO 63
static int
contains_insn (tilepro_mnemonic expected_mnemonic,
int expected_first_operand,
int expected_second_operand,
bfd_vma memaddr,
int *last_operand_ret,
disassemble_info *info)
{
struct tilepro_decoded_instruction
decoded[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE];
bfd_byte opbuf[TILEPRO_BUNDLE_SIZE_IN_BYTES];
int i, num_instructions;
if ((*info->read_memory_func) (memaddr, opbuf,
TILEPRO_BUNDLE_SIZE_IN_BYTES, info) != 0)
/* If we cannot even read the memory, it obviously does not have the
instruction for which we are looking. */
return 0;
/* Parse the instructions in the bundle. */
num_instructions = parse_insn_tilepro (bfd_getl64 (opbuf), memaddr, decoded);
for (i = 0; i < num_instructions; i++)
{
const struct tilepro_opcode *opcode = decoded[i].opcode;
if (opcode->mnemonic != expected_mnemonic)
continue;
if (expected_first_operand != -1
&& decoded[i].operand_values[0] != expected_first_operand)
continue;
if (expected_second_operand != -1
&& decoded[i].operand_values[1] != expected_second_operand)
continue;
*last_operand_ret = decoded[i].operand_values[opcode->num_operands - 1];
return 1;
}
/* No match. */
return 0;
}
int
print_insn_tilepro (bfd_vma memaddr, disassemble_info *info)
{
struct tilepro_decoded_instruction
decoded[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE];
bfd_byte opbuf[TILEPRO_BUNDLE_SIZE_IN_BYTES];
int status, i, num_instructions, num_printed;
tilepro_mnemonic padding_mnemonic;
status = (*info->read_memory_func) (memaddr, opbuf,
TILEPRO_BUNDLE_SIZE_IN_BYTES, info);
if (status != 0)
{
(*info->memory_error_func) (status, memaddr, info);
return -1;
}
info->bytes_per_line = TILEPRO_BUNDLE_SIZE_IN_BYTES;
info->bytes_per_chunk = TILEPRO_BUNDLE_SIZE_IN_BYTES;
info->octets_per_byte = 1;
info->display_endian = BFD_ENDIAN_LITTLE;
/* Parse the instructions in the bundle. */
num_instructions = parse_insn_tilepro (bfd_getl64 (opbuf), memaddr, decoded);
/* Print the instructions in the bundle. */
info->fprintf_func (info->stream, "{ ");
num_printed = 0;
/* Determine which nop opcode is used for padding and should be skipped. */
padding_mnemonic = TILEPRO_OPC_FNOP;
for (i = 0; i < num_instructions; i++)
{
if (!decoded[i].opcode->can_bundle)
{
/* Instructions that cannot be bundled are padded out with nops,
rather than fnops. Displaying them is always clutter. */
padding_mnemonic = TILEPRO_OPC_NOP;
break;
}
}
for (i = 0; i < num_instructions; i++)
{
const struct tilepro_opcode *opcode = decoded[i].opcode;
const char *name;
int j;
/* Do not print out fnops, unless everything is an fnop, in
which case we will print out just the last one. */
if (opcode->mnemonic == padding_mnemonic
&& (num_printed > 0 || i + 1 < num_instructions))
continue;
if (num_printed > 0)
info->fprintf_func (info->stream, " ; ");
++num_printed;
name = opcode->name;
if (name == NULL)
name = "<invalid>";
info->fprintf_func (info->stream, "%s", name);
for (j = 0; j < opcode->num_operands; j++)
{
int num;
const struct tilepro_operand *op;
const char *spr_name;
if (j > 0)
info->fprintf_func (info->stream, ",");
info->fprintf_func (info->stream, " ");
num = decoded[i].operand_values[j];
op = decoded[i].operands[j];
switch (op->type)
{
case TILEPRO_OP_TYPE_REGISTER:
info->fprintf_func (info->stream, "%s",
tilepro_register_names[num]);
break;
case TILEPRO_OP_TYPE_SPR:
spr_name = get_tilepro_spr_name(num);
if (spr_name != NULL)
info->fprintf_func (info->stream, "%s", spr_name);
else
info->fprintf_func (info->stream, "%d", num);
break;
case TILEPRO_OP_TYPE_IMMEDIATE:
{
bfd_vma addr = 0;
int found_addr = 0;
int addr_piece;
switch (opcode->mnemonic)
{
case TILEPRO_OPC_ADDLI:
if (contains_insn (TILEPRO_OPC_AULI,
decoded[i].operand_values[1],
TREG_ZERO,
memaddr - TILEPRO_BUNDLE_SIZE_IN_BYTES,
&addr_piece,
info))
{
addr = num + (addr_piece << 16);
found_addr = 1;
}
break;
case TILEPRO_OPC_AULI:
if (contains_insn (TILEPRO_OPC_MOVELI,
decoded[i].operand_values[1],
-1,
memaddr - TILEPRO_BUNDLE_SIZE_IN_BYTES,
&addr_piece,
info))
{
addr = (num << 16) + addr_piece;
found_addr = 1;
}
break;
default:
/* Operand does not look like a constructed address. */
break;
}
info->fprintf_func (info->stream, "%d", num);
if (found_addr)
{
info->fprintf_func (info->stream, " /* ");
info->print_address_func (addr, info);
info->fprintf_func (info->stream, " */");
}
}
break;
case TILEPRO_OP_TYPE_ADDRESS:
info->print_address_func ((bfd_vma)(unsigned int) num, info);
break;
default:
abort ();
}
}
}
info->fprintf_func (info->stream, " }");
return TILEPRO_BUNDLE_SIZE_IN_BYTES;
}

10183
opcodes/tilepro-opc.c Normal file
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