added two h8300 tests

This commit is contained in:
Ken Raeburn 1995-01-27 19:06:56 +00:00
parent e29b45a853
commit abd77746de
3 changed files with 69 additions and 0 deletions

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# 1 "libgcc1.S"
;; libgcc1 routines for the Hitachi h8/300 cpu.
;; Contributed by Steve Chamberlain.
;; sac@cygnus.com
.section .text
.align 2
.global ___cmpsi2
___cmpsi2:
cmp.w r2 ,r0
bne .L2
cmp.w r3 ,r1
bne .L2
mov.w #1,r0
rts
.L2:
cmp.w r0 ,r2
bgt .L4
bne .L3
cmp.w r1 ,r3
bls .L3
.L4:
sub.w r0 ,r0
rts
.L3:
mov.w #2,r0
.L5:
rts
.end

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#objdump: -dr
#name: FFxx1
# Test for FFxx:8 addressing.
.*: file format .*h8300.*
Disassembly of section .text:
...
RELOC: 0+0000 16 main
0+0400 <main> f8 7f mov.b #0x7f,r0l
0+0402 <main[+]2> 28 bb mov.b @0xbb:8,r0l
0+0404 <main[+]4> 6a 88 ff b9 mov.b r0l,@0xffb9:16
0+0408 <main[+]8> f8 01 mov.b #0x1,r0l
0+040a <loop> 6a 88 ff bb mov.b r0l,@0xffbb:16
0+040e <delay> 79 01 00 00 mov.w #0x0,r1
0+0412 <deloop> 0b 01 adds #0x1,er1
0+0414 <deloop[+]2> 46 00 bne .0 \(416\)
RELOC: 0+0415 DISP8 deloop[+]0xffff+
0+0416 <deloop[+]4> 12 88 rotl r0l
0+0418 <deloop[+]6> 40 00 bra .0 \(41a\)
RELOC: 0+0419 DISP8 loop[+]0xffff+

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.equ p6ddr, 0xffb9 ;0x7f for output
.equ p6dr, 0xffbb
.equ seed, 0x01
.text
.org 0
reset: .word main ;reset vector
;
.org 0x400
main: mov.b #0x7f,r0l ;port 6 ddr = 7F
mov.b @0xffbb:8,r0l ;***test***
mov.b r0l,@p6ddr:16
;
mov.b #seed,r0l ;start with 0000001
loop: mov.b r0l,@p6dr:16 ;output to port 6
delay: mov.w #0x0000,r1
deloop: adds.w #1,r1
bne deloop:8 ;not = 0
rotl r0l
bra loop:8