Fix test for StoreDouble Instruction.
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@ -1,3 +1,8 @@
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2000-12-18 Nick Clifton <nickc@redhat.com>
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* armemu.c (ARMul_Emulate26): Fix test for StoreDouble
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instruction.
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2000-12-10 Nick Clifton <nickc@redhat.com>
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* armos.c (ARMul_OSHandleSWI): Add 0x91 as an FPE SWI.
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@ -617,7 +617,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -785,7 +785,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -873,7 +873,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -1007,7 +1007,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -1176,7 +1176,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -1330,7 +1330,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -1494,7 +1494,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -1649,7 +1649,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -1721,7 +1721,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -1759,7 +1759,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -1795,7 +1795,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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else if (BITS (4, 7) == 0xE)
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else if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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@ -1833,7 +1833,7 @@ ARMul_Emulate26 (register ARMul_State * state)
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Handle_Load_Double (state, instr);
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break;
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}
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if (BITS (4, 7) == 0xE)
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if (BITS (4, 7) == 0xF)
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{
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Handle_Store_Double (state, instr);
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break;
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