i386: Break i386-dis-evex.h into small files

Break i386-dis-evex.h into small files such that each file is included
just once.

	* i386-dis-evex.h: Break into ...
	* i386-dis-evex-len.h: New file.
	* i386-dis-evex-mod.h: Likewise.
	* i386-dis-evex-prefix.h: Likewise.
	* i386-dis-evex-reg.h: Likewise.
	* i386-dis-evex-w.h: Likewise.
	* i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h,
	i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and
	i386-dis-evex-mod.h.
This commit is contained in:
H.J. Lu 2019-06-21 13:18:41 -07:00
parent fd5866f6aa
commit ad692897c1
8 changed files with 3472 additions and 3486 deletions

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@ -1,3 +1,15 @@
2019-06-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis-evex.h: Break into ...
* i386-dis-evex-len.h: New file.
* i386-dis-evex-mod.h: Likewise.
* i386-dis-evex-prefix.h: Likewise.
* i386-dis-evex-reg.h: Likewise.
* i386-dis-evex-w.h: Likewise.
* i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h,
i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and
i386-dis-evex-mod.h.
2019-06-19 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/24700

231
opcodes/i386-dis-evex-len.h Normal file
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@ -0,0 +1,231 @@
static const struct dis386 evex_len_table[][3] = {
/* EVEX_LEN_0F6E_P_2 */
{
{ "vmovK", { XMScalar, Edq }, 0 },
},
/* EVEX_LEN_0F7E_P_1 */
{
{ VEX_W_TABLE (EVEX_W_0F7E_P_1) },
},
/* EVEX_LEN_0F7E_P_2 */
{
{ "vmovK", { Edq, XMScalar }, 0 },
},
/* EVEX_LEN_0FD6_P_2 */
{
{ VEX_W_TABLE (EVEX_W_0FD6_P_2) },
},
/* EVEX_LEN_0F3819_P_2_W_0 */
{
{ Bad_Opcode },
{ "vbroadcastf32x2", { XM, EXxmm_mq }, 0 },
{ "vbroadcastf32x2", { XM, EXxmm_mq }, 0 },
},
/* EVEX_LEN_0F3819_P_2_W_1 */
{
{ Bad_Opcode },
{ "vbroadcastsd", { XM, EXxmm_mq }, 0 },
{ "vbroadcastsd", { XM, EXxmm_mq }, 0 },
},
/* EVEX_LEN_0F381A_P_2_W_0 */
{
{ Bad_Opcode },
{ "vbroadcastf32x4", { XM, EXxmm }, 0 },
{ "vbroadcastf32x4", { XM, EXxmm }, 0 },
},
/* EVEX_LEN_0F381A_P_2_W_1 */
{
{ Bad_Opcode },
{ "vbroadcastf64x2", { XM, EXxmm }, 0 },
{ "vbroadcastf64x2", { XM, EXxmm }, 0 },
},
/* EVEX_LEN_0F381B_P_2_W_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ "vbroadcastf32x8", { XM, EXxmmq }, 0 },
},
/* EVEX_LEN_0F381B_P_2_W_1 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ "vbroadcastf64x4", { XM, EXymm }, 0 },
},
/* EVEX_LEN_0F385A_P_2_W_0 */
{
{ Bad_Opcode },
{ "vbroadcasti32x4", { XM, EXxmm }, 0 },
{ "vbroadcasti32x4", { XM, EXxmm }, 0 },
},
/* EVEX_LEN_0F385A_P_2_W_1 */
{
{ Bad_Opcode },
{ "vbroadcasti64x2", { XM, EXxmm }, 0 },
{ "vbroadcasti64x2", { XM, EXxmm }, 0 },
},
/* EVEX_LEN_0F385B_P_2_W_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ "vbroadcasti32x8", { XM, EXxmmq }, 0 },
},
/* EVEX_LEN_0F385B_P_2_W_1 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ "vbroadcasti64x4", { XM, EXymm }, 0 },
},
/* EVEX_LEN_0F3A18_P_2_W_0 */
{
{ Bad_Opcode },
{ "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 },
{ "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 },
},
/* EVEX_LEN_0F3A18_P_2_W_1 */
{
{ Bad_Opcode },
{ "vinsertf64x2", { XM, Vex, EXxmm, Ib }, 0 },
{ "vinsertf64x2", { XM, Vex, EXxmm, Ib }, 0 },
},
/* EVEX_LEN_0F3A19_P_2_W_0 */
{
{ Bad_Opcode },
{ "vextractf32x4", { EXxmm, XM, Ib }, 0 },
{ "vextractf32x4", { EXxmm, XM, Ib }, 0 },
},
/* EVEX_LEN_0F3A19_P_2_W_1 */
{
{ Bad_Opcode },
{ "vextractf64x2", { EXxmm, XM, Ib }, 0 },
{ "vextractf64x2", { EXxmm, XM, Ib }, 0 },
},
/* EVEX_LEN_0F3A1A_P_2_W_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ "vinsertf32x8", { XM, Vex, EXxmmq, Ib }, 0 },
},
/* EVEX_LEN_0F3A1A_P_2_W_1 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ "vinsertf64x4", { XM, Vex, EXxmmq, Ib }, 0 },
},
/* EVEX_LEN_0F3A1B_P_2_W_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ "vextractf32x8", { EXxmmq, XM, Ib }, 0 },
},
/* EVEX_LEN_0F3A1B_P_2_W_1 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ "vextractf64x4", { EXxmmq, XM, Ib }, 0 },
},
/* EVEX_LEN_0F3A23_P_2_W_0 */
{
{ Bad_Opcode },
{ "vshuff32x4", { XM, Vex, EXx, Ib }, 0 },
{ "vshuff32x4", { XM, Vex, EXx, Ib }, 0 },
},
/* EVEX_LEN_0F3A23_P_2_W_1 */
{
{ Bad_Opcode },
{ "vshuff64x2", { XM, Vex, EXx, Ib }, 0 },
{ "vshuff64x2", { XM, Vex, EXx, Ib }, 0 },
},
/* EVEX_LEN_0F3A38_P_2_W_0 */
{
{ Bad_Opcode },
{ "vinserti32x4", { XM, Vex, EXxmm, Ib }, 0 },
{ "vinserti32x4", { XM, Vex, EXxmm, Ib }, 0 },
},
/* EVEX_LEN_0F3A38_P_2_W_1 */
{
{ Bad_Opcode },
{ "vinserti64x2", { XM, Vex, EXxmm, Ib }, 0 },
{ "vinserti64x2", { XM, Vex, EXxmm, Ib }, 0 },
},
/* EVEX_LEN_0F3A39_P_2_W_0 */
{
{ Bad_Opcode },
{ "vextracti32x4", { EXxmm, XM, Ib }, 0 },
{ "vextracti32x4", { EXxmm, XM, Ib }, 0 },
},
/* EVEX_LEN_0F3A39_P_2_W_1 */
{
{ Bad_Opcode },
{ "vextracti64x2", { EXxmm, XM, Ib }, 0 },
{ "vextracti64x2", { EXxmm, XM, Ib }, 0 },
},
/* EVEX_LEN_0F3A3A_P_2_W_0 */
{
{ Bad_Opcode },
{ "vinserti32x8", { XM, Vex, EXxmmq, Ib }, 0 },
{ "vinserti32x8", { XM, Vex, EXxmmq, Ib }, 0 },
},
/* EVEX_LEN_0F3A3A_P_2_W_1 */
{
{ Bad_Opcode },
{ "vinserti64x4", { XM, Vex, EXxmmq, Ib }, 0 },
{ "vinserti64x4", { XM, Vex, EXxmmq, Ib }, 0 },
},
/* EVEX_LEN_0F3A3B_P_2_W_0 */
{
{ Bad_Opcode },
{ "vextracti32x8", { EXxmmq, XM, Ib }, 0 },
{ "vextracti32x8", { EXxmmq, XM, Ib }, 0 },
},
/* EVEX_LEN_0F3A3B_P_2_W_1 */
{
{ Bad_Opcode },
{ "vextracti64x4", { EXxmmq, XM, Ib }, 0 },
{ "vextracti64x4", { EXxmmq, XM, Ib }, 0 },
},
/* EVEX_LEN_0F3A43_P_2_W_0 */
{
{ Bad_Opcode },
{ "vshufi32x4", { XM, Vex, EXx, Ib }, 0 },
{ "vshufi32x4", { XM, Vex, EXx, Ib }, 0 },
},
/* EVEX_LEN_0F3A43_P_2_W_1 */
{
{ Bad_Opcode },
{ "vshufi64x2", { XM, Vex, EXx, Ib }, 0 },
{ "vshufi64x2", { XM, Vex, EXx, Ib }, 0 },
},
};

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@ -0,0 +1,62 @@
{
/* MOD_EVEX_0F10_PREFIX_1 */
{ VEX_W_TABLE (EVEX_W_0F10_P_1_M_0) },
{ VEX_W_TABLE (EVEX_W_0F10_P_1_M_1) },
},
{
/* MOD_EVEX_0F10_PREFIX_3 */
{ VEX_W_TABLE (EVEX_W_0F10_P_3_M_0) },
{ VEX_W_TABLE (EVEX_W_0F10_P_3_M_1) },
},
{
/* MOD_EVEX_0F11_PREFIX_1 */
{ VEX_W_TABLE (EVEX_W_0F11_P_1_M_0) },
{ VEX_W_TABLE (EVEX_W_0F11_P_1_M_1) },
},
{
/* MOD_EVEX_0F11_PREFIX_3 */
{ VEX_W_TABLE (EVEX_W_0F11_P_3_M_0) },
{ VEX_W_TABLE (EVEX_W_0F11_P_3_M_1) },
},
{
/* MOD_EVEX_0F12_PREFIX_0 */
{ VEX_W_TABLE (EVEX_W_0F12_P_0_M_0) },
{ VEX_W_TABLE (EVEX_W_0F12_P_0_M_1) },
},
{
/* MOD_EVEX_0F16_PREFIX_0 */
{ VEX_W_TABLE (EVEX_W_0F16_P_0_M_0) },
{ VEX_W_TABLE (EVEX_W_0F16_P_0_M_1) },
},
{
/* MOD_EVEX_0F38C6_REG_1 */
{ PREFIX_TABLE (PREFIX_EVEX_0F38C6_REG_1) },
},
{
/* MOD_EVEX_0F38C6_REG_2 */
{ PREFIX_TABLE (PREFIX_EVEX_0F38C6_REG_2) },
},
{
/* MOD_EVEX_0F38C6_REG_5 */
{ PREFIX_TABLE (PREFIX_EVEX_0F38C6_REG_5) },
},
{
/* MOD_EVEX_0F38C6_REG_6 */
{ PREFIX_TABLE (PREFIX_EVEX_0F38C6_REG_6) },
},
{
/* MOD_EVEX_0F38C7_REG_1 */
{ PREFIX_TABLE (PREFIX_EVEX_0F38C7_REG_1) },
},
{
/* MOD_EVEX_0F38C7_REG_2 */
{ PREFIX_TABLE (PREFIX_EVEX_0F38C7_REG_2) },
},
{
/* MOD_EVEX_0F38C7_REG_5 */
{ PREFIX_TABLE (PREFIX_EVEX_0F38C7_REG_5) },
},
{
/* MOD_EVEX_0F38C7_REG_6 */
{ PREFIX_TABLE (PREFIX_EVEX_0F38C7_REG_6) },
},

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,51 @@
/* REG_EVEX_0F71 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_EVEX_0F71_REG_2) },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_EVEX_0F71_REG_4) },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_EVEX_0F71_REG_6) },
},
/* REG_EVEX_0F72 */
{
{ PREFIX_TABLE (PREFIX_EVEX_0F72_REG_0) },
{ PREFIX_TABLE (PREFIX_EVEX_0F72_REG_1) },
{ PREFIX_TABLE (PREFIX_EVEX_0F72_REG_2) },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_EVEX_0F72_REG_4) },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_EVEX_0F72_REG_6) },
},
/* REG_EVEX_0F73 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_EVEX_0F73_REG_2) },
{ PREFIX_TABLE (PREFIX_EVEX_0F73_REG_3) },
{ Bad_Opcode },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_EVEX_0F73_REG_6) },
{ PREFIX_TABLE (PREFIX_EVEX_0F73_REG_7) },
},
/* REG_EVEX_0F38C6 */
{
{ Bad_Opcode },
{ MOD_TABLE (MOD_EVEX_0F38C6_REG_1) },
{ MOD_TABLE (MOD_EVEX_0F38C6_REG_2) },
{ Bad_Opcode },
{ Bad_Opcode },
{ MOD_TABLE (MOD_EVEX_0F38C6_REG_5) },
{ MOD_TABLE (MOD_EVEX_0F38C6_REG_6) },
},
/* REG_EVEX_0F38C7 */
{
{ Bad_Opcode },
{ MOD_TABLE (MOD_EVEX_0F38C7_REG_1) },
{ MOD_TABLE (MOD_EVEX_0F38C7_REG_2) },
{ Bad_Opcode },
{ Bad_Opcode },
{ MOD_TABLE (MOD_EVEX_0F38C7_REG_5) },
{ MOD_TABLE (MOD_EVEX_0F38C7_REG_6) },
},

1138
opcodes/i386-dis-evex-w.h Normal file

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -3625,9 +3625,8 @@ static const struct dis386 reg_table[][8] = {
{ Bad_Opcode },
{ "blci", { { OP_LWP_E, 0 }, Ev }, 0 },
},
#define NEED_REG_TABLE
#include "i386-dis-evex.h"
#undef NEED_REG_TABLE
#include "i386-dis-evex-reg.h"
};
static const struct dis386 prefix_table[][4] = {
@ -6793,9 +6792,7 @@ static const struct dis386 prefix_table[][4] = {
{ VEX_LEN_TABLE (VEX_LEN_0F3AF0_P_3) },
},
#define NEED_PREFIX_TABLE
#include "i386-dis-evex.h"
#undef NEED_PREFIX_TABLE
#include "i386-dis-evex-prefix.h"
};
static const struct dis386 x86_64_table[][2] = {
@ -9306,9 +9303,8 @@ static const struct dis386 vex_table[][256] = {
},
};
#define NEED_OPCODE_TABLE
#include "i386-dis-evex.h"
#undef NEED_OPCODE_TABLE
static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_0F12_P_0_M_0 */
{
@ -9917,11 +9913,7 @@ static const struct dis386 vex_len_table[][2] = {
},
};
static const struct dis386 evex_len_table[][3] = {
#define NEED_EVEX_LEN_TABLE
#include "i386-dis-evex.h"
#undef NEED_EVEX_LEN_TABLE
};
#include "i386-dis-evex-len.h"
static const struct dis386 vex_w_table[][2] = {
{
@ -10237,9 +10229,8 @@ static const struct dis386 vex_w_table[][2] = {
{ Bad_Opcode },
{ "vgf2p8affineinvqb", { XM, Vex, EXx, Ib }, 0 },
},
#define NEED_VEX_W_TABLE
#include "i386-dis-evex.h"
#undef NEED_VEX_W_TABLE
#include "i386-dis-evex-w.h"
};
static const struct dis386 mod_table[][2] = {
@ -11004,9 +10995,8 @@ static const struct dis386 mod_table[][2] = {
{ Bad_Opcode },
{ "kshiftlq", { MaskG, MaskR, Ib }, 0 },
},
#define NEED_MOD_TABLE
#include "i386-dis-evex.h"
#undef NEED_MOD_TABLE
#include "i386-dis-evex-mod.h"
};
static const struct dis386 rm_table[][8] = {