Cosmetic changes to tc-i386.[ch] + extend x86 gas testsuite jmp and

call tests + tweak intel mode far call and jmp.
This commit is contained in:
Alan Modra 2000-01-15 12:06:03 +00:00
parent a8de59980c
commit add0c67765
8 changed files with 230 additions and 64 deletions

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@ -1,3 +1,14 @@
2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
* config/tc-i386.h (DWORD_MNEM_SUFFIX): Delete.
* config/tc-i386.c (DWORD_MNEM_SUFFIX): Rename all occurrences to
LONG_MNEM_SUFFIX.
* config/tc-i386.h (INTEL_DWORD_MNEM_SUFFIX): Rename to
DWORD_MNEM_SUFFIX.
* config/tc-i386.c (INTEL_DWORD_MNEM_SUFFIX): Here too. Fix some
comments.
2000-01-13 Clinton Popetz <cpopetz@cygnus.com>
* config/tc-mips.c (mips_do_align): New function.

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@ -232,7 +232,8 @@ static int allow_naked_reg = 0; /* 1 if register prefix % not required */
static char stackop_size = '\0'; /* Used in 16 bit gcc mode to add an l
suffix to call, ret, enter, leave, push,
and pop instructions. */
and pop instructions so that gcc has the
same stack frame as in 32 bit mode. */
/* Interface to relax_segment.
There are 2 relax states for 386 jump insns: one for conditional &
@ -1093,20 +1094,17 @@ md_assemble (line)
/* See if we can get a match by trimming off a suffix. */
switch (mnem_p[-1])
{
case DWORD_MNEM_SUFFIX:
case WORD_MNEM_SUFFIX:
case BYTE_MNEM_SUFFIX:
case SHORT_MNEM_SUFFIX:
#if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
case LONG_MNEM_SUFFIX:
#endif
i.suffix = mnem_p[-1];
mnem_p[-1] = '\0';
current_templates = hash_find (op_hash, mnemonic);
break;
/* Intel Syntax */
case INTEL_DWORD_MNEM_SUFFIX:
case DWORD_MNEM_SUFFIX:
if (intel_syntax)
{
i.suffix = mnem_p[-1];
@ -1359,7 +1357,7 @@ md_assemble (line)
? No_sSuf
: (i.suffix == LONG_MNEM_SUFFIX
? No_lSuf
: (i.suffix == INTEL_DWORD_MNEM_SUFFIX
: (i.suffix == DWORD_MNEM_SUFFIX
? No_dSuf
: (i.suffix == LONG_DOUBLE_MNEM_SUFFIX ? No_xSuf : 0))))));
@ -1518,7 +1516,7 @@ md_assemble (line)
if (i.tm.opcode_modifier & Size16)
i.suffix = WORD_MNEM_SUFFIX;
else
i.suffix = DWORD_MNEM_SUFFIX;
i.suffix = LONG_MNEM_SUFFIX;
}
else if (i.reg_operands)
{
@ -1535,7 +1533,7 @@ md_assemble (line)
{
i.suffix = ((i.types[op] & Reg8) ? BYTE_MNEM_SUFFIX :
(i.types[op] & Reg16) ? WORD_MNEM_SUFFIX :
DWORD_MNEM_SUFFIX);
LONG_MNEM_SUFFIX);
break;
}
}
@ -1590,7 +1588,7 @@ md_assemble (line)
}
}
}
else if (i.suffix == DWORD_MNEM_SUFFIX)
else if (i.suffix == LONG_MNEM_SUFFIX)
{
int op;
for (op = i.operands; --op >= 0; )
@ -1744,8 +1742,7 @@ md_assemble (line)
/* Now select between word & dword operations via the operand
size prefix, except for instructions that will ignore this
prefix anyway. */
if (((intel_syntax && (i.suffix == INTEL_DWORD_MNEM_SUFFIX))
|| i.suffix == DWORD_MNEM_SUFFIX
if (((intel_syntax && (i.suffix == DWORD_MNEM_SUFFIX))
|| i.suffix == LONG_MNEM_SUFFIX) == flag_16bit_code
&& !(i.tm.opcode_modifier & IgnoreSize))
{
@ -1758,7 +1755,7 @@ md_assemble (line)
}
/* Size floating point instruction. */
if (i.suffix == LONG_MNEM_SUFFIX
|| (intel_syntax && i.suffix == INTEL_DWORD_MNEM_SUFFIX))
|| (intel_syntax && i.suffix == DWORD_MNEM_SUFFIX))
{
if (i.tm.opcode_modifier & FloatMF)
i.tm.base_opcode ^= 4;
@ -2578,7 +2575,7 @@ i386_immediate (imm_start)
i.types[this_operand] |=
(bigimm | smallest_imm_type ((long) exp->X_add_number));
/* If a suffix is given, this operand may be shortended. */
/* If a suffix is given, this operand may be shortened. */
switch (i.suffix)
{
case WORD_MNEM_SUFFIX:
@ -2863,14 +2860,14 @@ i386_operand_modifier (op_string, got_a_float)
if (got_a_float)
i.suffix = SHORT_MNEM_SUFFIX;
else
i.suffix = DWORD_MNEM_SUFFIX;
i.suffix = LONG_MNEM_SUFFIX;
*op_string += 9;
return DWORD_PTR;
}
else if (!strncasecmp (*op_string, "QWORD PTR", 9))
{
i.suffix = INTEL_DWORD_MNEM_SUFFIX;
i.suffix = DWORD_MNEM_SUFFIX;
*op_string += 9;
return QWORD_PTR;
}

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@ -216,7 +216,6 @@ extern const char extra_symbol_chars[];
#define NO_BASE_REGISTER_16 6
/* these are the instruction mnemonic suffixes. */
#define DWORD_MNEM_SUFFIX 'l'
#define WORD_MNEM_SUFFIX 'w'
#define BYTE_MNEM_SUFFIX 'b'
#define SHORT_MNEM_SUFFIX 's'
@ -224,7 +223,7 @@ extern const char extra_symbol_chars[];
/* Intel Syntax */
#define LONG_DOUBLE_MNEM_SUFFIX 'x'
/* Intel Syntax */
#define INTEL_DWORD_MNEM_SUFFIX 'd'
#define DWORD_MNEM_SUFFIX 'd'
/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */

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@ -1,6 +1,7 @@
2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
* gas/i386/general.{s,l}: Add jmp and call tests.
* gas/i386/general.{s,l}: Add jmp and call tests for .code16gcc,
.code16, and .code32 modes.
Tue Nov 30 23:02:01 1999 Jeffrey A Law (law@cygnus.com)

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@ -25,16 +25,36 @@
.*:100: Warning:.*
.*:101: Warning:.*
.*:135: Warning:.*
.*:163: Warning:.*
.*:165: Warning:.*
.*:167: Warning:.*
.*:169: Warning:.*
.*:171: Warning:.*
.*:177: Warning:.*
.*:179: Warning:.*
.*:181: Warning:.*
.*:183: Warning:.*
.*:185: Warning:.*
.*:162: Warning:.*
.*:164: Warning:.*
.*:166: Warning:.*
.*:168: Warning:.*
.*:170: Warning:.*
.*:176: Warning:.*
.*:178: Warning:.*
.*:180: Warning:.*
.*:182: Warning:.*
.*:184: Warning:.*
.*:191: Warning:.*
.*:193: Warning:.*
.*:195: Warning:.*
.*:197: Warning:.*
.*:199: Warning:.*
.*:205: Warning:.*
.*:207: Warning:.*
.*:209: Warning:.*
.*:211: Warning:.*
.*:213: Warning:.*
.*:220: Warning:.*
.*:222: Warning:.*
.*:224: Warning:.*
.*:226: Warning:.*
.*:228: Warning:.*
.*:234: Warning:.*
.*:236: Warning:.*
.*:238: Warning:.*
.*:240: Warning:.*
.*:242: Warning:.*
1 .psize 0
2 .text
3 # test various segment reg insns
@ -219,46 +239,123 @@
156 0160 67668984 248C0000 movl %eax,140\(%esp\)
156 00
157
158 .code32
159 .extern xxx
160 0169 EB98 jmp 1b
161 016b E9FCFFFF FF jmp xxx
162 0170 FF250000 0000 jmp \*xxx
163 0176 FF250000 0000 jmp xxx\(,1\)
158 .extern xxx
159 0169 EB98 jmp 1b
160 016b E9FEFF jmp xxx
161 016e FF260000 jmp \*xxx
162 0172 FF260000 jmp xxx\(,1\)
.*Warning:.*
164 017c FFE7 jmp \*%edi
165 017e FFE7 jmp %edi
163 0176 66FFE7 jmp \*%edi
164 0179 66FFE7 jmp %edi
.*Warning:.*
166 0180 FF27 jmp \*\(%edi\)
167 0182 FF27 jmp \(%edi\)
165 017c 67FF27 jmp \*\(%edi\)
166 017f 67FF27 jmp \(%edi\)
.*Warning:.*
168 0184 FF2CBD00 000000 ljmp \*xxx\(,%edi,4\)
169 018b FF2CBD00 000000 ljmp xxx\(,%edi,4\)
167 0182 67FFAF00 000000 ljmp \*xxx\(%edi\)
168 0189 67FFAF00 000000 ljmp xxx\(%edi\)
.*Warning:.*
170 0192 FF2D0000 0000 ljmp \*xxx
171 0198 FF2D0000 0000 ljmp xxx\(,1\)
169 0190 FF2E0000 ljmp \*xxx
170 0194 FF2E0000 ljmp xxx\(,1\)
.*Warning:.*
172 019e EA000000 003412 ljmp \$0x1234,\$xxx
173
174 01a5 E859FFFF FF call 1b
175 01aa E8FCFFFF FF call xxx
176 01af FF150000 0000 call \*xxx
177 01b5 FF150000 0000 call xxx\(,1\)
171 0198 EA000034 12 ljmp \$0x1234,\$xxx
172
173 019d 66E860FF FFFF call 1b
174 01a3 66E8FCFF FFFF call xxx
175 01a9 66FF1600 00 call \*xxx
176 01ae 66FF1600 00 call xxx\(,1\)
.*Warning:.*
178 01bb FFD7 call \*%edi
179 01bd FFD7 call %edi
177 01b3 66FFD7 call \*%edi
178 01b6 66FFD7 call %edi
.*Warning:.*
180 01bf FF17 call \*\(%edi\)
181 01c1 FF17 call \(%edi\)
179 01b9 6766FF17 call \*\(%edi\)
180 01bd 6766FF17 call \(%edi\)
.*Warning:.*
182 01c3 FF1CBD00 000000 lcall \*xxx\(,%edi,4\)
183 01ca FF1CBD00 000000 lcall xxx\(,%edi,4\)
181 01c1 6766FF9F 00000000 lcall \*xxx\(%edi\)
182 01c9 6766FF9F 00000000 lcall xxx\(%edi\)
.*Warning:.*
184 01d1 FF1D0000 0000 lcall \*xxx
185 01d7 FF1D0000 0000 lcall xxx\(,1\)
183 01d1 66FF1E00 00 lcall \*xxx
184 01d6 66FF1E00 00 lcall xxx\(,1\)
.*Warning:.*
186 01dd 9A000000 003412 lcall \$0x1234,\$xxx
187
188 # Force a good alignment.
189 01e4 00000000 00000000 .p2align 4,0
189 00000000
185 01db 669A0000 00003412 lcall \$0x1234,\$xxx
186
187 .code16
188 01e3 E91DFF jmp 1b
189 01e6 E9FEFF jmp xxx
190 01e9 FF260000 jmp \*xxx
191 01ed FF260000 jmp xxx\(,1\)
.*Warning:.*
192 01f1 FFE7 jmp \*%di
193 01f3 FFE7 jmp %di
.*Warning:.*
194 01f5 FF25 jmp \*\(%di\)
195 01f7 FF25 jmp \(%di\)
.*Warning:.*
196 01f9 FFAD0000 ljmp \*xxx\(%di\)
197 01fd FFAD0000 ljmp xxx\(%di\)
.*Warning:.*
198 0201 FF2E0000 ljmp \*xxx
199 0205 FF2E0000 ljmp xxx\(,1\)
.*Warning:.*
200 0209 EA000034 12 ljmp \$0x1234,\$xxx
201
202 020e E8F2FE call 1b
203 0211 E8FEFF call xxx
204 0214 FF160000 call \*xxx
205 0218 FF160000 call xxx\(,1\)
.*Warning:.*
206 021c FFD7 call \*%di
207 021e FFD7 call %di
.*Warning:.*
208 0220 FF15 call \*\(%di\)
209 0222 FF15 call \(%di\)
.*Warning:.*
210 0224 FF9D0000 lcall \*xxx\(%di\)
211 0228 FF9D0000 lcall xxx\(%di\)
.*Warning:.*
212 022c FF1E0000 lcall \*xxx
213 0230 FF1E0000 lcall xxx\(,1\)
.*Warning:.*
214 0234 9A000034 12 lcall \$0x1234,\$xxx
215
216 .code32
217 0239 E9C5FEFF FF jmp 1b
218 023e E9FCFFFF FF jmp xxx
219 0243 FF250000 0000 jmp \*xxx
220 0249 FF250000 0000 jmp xxx\(,1\)
.*Warning:.*
221 024f FFE7 jmp \*%edi
222 0251 FFE7 jmp %edi
.*Warning:.*
223 0253 FF27 jmp \*\(%edi\)
224 0255 FF27 jmp \(%edi\)
.*Warning:.*
225 0257 FF2CBD00 000000 ljmp \*xxx\(,%edi,4\)
226 025e FF2CBD00 000000 ljmp xxx\(,%edi,4\)
.*Warning:.*
227 0265 FF2D0000 0000 ljmp \*xxx
228 026b FF2D0000 0000 ljmp xxx\(,1\)
.*Warning:.*
229 0271 EA000000 003412 ljmp \$0x1234,\$xxx
230
231 0278 E886FEFF FF call 1b
232 027d E8FCFFFF FF call xxx
233 0282 FF150000 0000 call \*xxx
234 0288 FF150000 0000 call xxx\(,1\)
.*Warning:.*
235 028e FFD7 call \*%edi
236 0290 FFD7 call %edi
.*Warning:.*
237 0292 FF17 call \*\(%edi\)
238 0294 FF17 call \(%edi\)
.*Warning:.*
239 0296 FF1CBD00 000000 lcall \*xxx\(,%edi,4\)
240 029d FF1CBD00 000000 lcall xxx\(,%edi,4\)
.*Warning:.*
241 02a4 FF1D0000 0000 lcall \*xxx
242 02aa FF1D0000 0000 lcall xxx\(,1\)
.*Warning:.*
243 02b0 9A000000 003412 lcall \$0x1234,\$xxx
244
245 # Force a good alignment.
246 02b7 00000000 00000000 .p2align 4,0
246 00

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@ -155,8 +155,65 @@
leal -1760(%ebp),%ebx
movl %eax,140(%esp)
.code32
.extern xxx
jmp 1b
jmp xxx
jmp *xxx
jmp xxx(,1)
jmp *%edi
jmp %edi
jmp *(%edi)
jmp (%edi)
ljmp *xxx(%edi)
ljmp xxx(%edi)
ljmp *xxx
ljmp xxx(,1)
ljmp $0x1234,$xxx
call 1b
call xxx
call *xxx
call xxx(,1)
call *%edi
call %edi
call *(%edi)
call (%edi)
lcall *xxx(%edi)
lcall xxx(%edi)
lcall *xxx
lcall xxx(,1)
lcall $0x1234,$xxx
.code16
jmp 1b
jmp xxx
jmp *xxx
jmp xxx(,1)
jmp *%di
jmp %di
jmp *(%di)
jmp (%di)
ljmp *xxx(%di)
ljmp xxx(%di)
ljmp *xxx
ljmp xxx(,1)
ljmp $0x1234,$xxx
call 1b
call xxx
call *xxx
call xxx(,1)
call *%di
call %di
call *(%di)
call (%di)
lcall *xxx(%di)
lcall xxx(%di)
lcall *xxx
lcall xxx(,1)
lcall $0x1234,$xxx
.code32
jmp 1b
jmp xxx
jmp *xxx

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@ -1,3 +1,7 @@
2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
* i386.h: Qualify intel mode far call and jmp with x_Suf.
1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
* i386.h: Add JumpAbsolute qualifier to all non-intel mode

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@ -316,7 +316,7 @@ static const template i386_optab[] = {
/* Intel Syntax */
{"call", 2, 0x9a, X, wl_Suf|JumpInterSegment|DefaultSize, { Imm16, Imm16|Imm32, 0} },
/* Intel Syntax */
{"call", 1, 0xff, 3, wl_Suf|Modrm|DefaultSize, { WordMem, 0, 0} },
{"call", 1, 0xff, 3, x_Suf|Modrm|DefaultSize, { WordMem, 0, 0} },
{"lcall", 2, 0x9a, X, wl_Suf|JumpInterSegment|DefaultSize, { Imm16, Imm16|Imm32, 0} },
{"lcall", 1, 0xff, 3, wl_Suf|Modrm|DefaultSize, { WordMem|JumpAbsolute, 0, 0} },
@ -326,7 +326,7 @@ static const template i386_optab[] = {
/* Intel Syntax */
{"jmp", 2, 0xea, X, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} },
/* Intel Syntax */
{"jmp", 1, 0xff, 5, wl_Suf|Modrm, { WordMem, 0, 0} },
{"jmp", 1, 0xff, 5, x_Suf|Modrm, { WordMem, 0, 0} },
{"ljmp", 2, 0xea, X, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} },
{"ljmp", 1, 0xff, 5, wl_Suf|Modrm, { WordMem|JumpAbsolute, 0, 0} },