Cosmetic changes to tc-i386.[ch] + extend x86 gas testsuite jmp and
call tests + tweak intel mode far call and jmp.
This commit is contained in:
Alan Modra
parent
a8de59980c
commit
add0c67765
@ -1,3 +1,14 @@
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2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
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* config/tc-i386.h (DWORD_MNEM_SUFFIX): Delete.
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* config/tc-i386.c (DWORD_MNEM_SUFFIX): Rename all occurrences to
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LONG_MNEM_SUFFIX.
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* config/tc-i386.h (INTEL_DWORD_MNEM_SUFFIX): Rename to
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DWORD_MNEM_SUFFIX.
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* config/tc-i386.c (INTEL_DWORD_MNEM_SUFFIX): Here too. Fix some
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comments.
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2000-01-13 Clinton Popetz <cpopetz@cygnus.com>
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* config/tc-mips.c (mips_do_align): New function.
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@ -232,7 +232,8 @@ static int allow_naked_reg = 0; /* 1 if register prefix % not required */
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static char stackop_size = '\0'; /* Used in 16 bit gcc mode to add an l
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suffix to call, ret, enter, leave, push,
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and pop instructions. */
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and pop instructions so that gcc has the
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same stack frame as in 32 bit mode. */
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/* Interface to relax_segment.
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There are 2 relax states for 386 jump insns: one for conditional &
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@ -1093,20 +1094,17 @@ md_assemble (line)
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/* See if we can get a match by trimming off a suffix. */
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switch (mnem_p[-1])
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{
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case DWORD_MNEM_SUFFIX:
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case WORD_MNEM_SUFFIX:
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case BYTE_MNEM_SUFFIX:
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case SHORT_MNEM_SUFFIX:
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#if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
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case LONG_MNEM_SUFFIX:
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#endif
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i.suffix = mnem_p[-1];
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mnem_p[-1] = '\0';
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current_templates = hash_find (op_hash, mnemonic);
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break;
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/* Intel Syntax */
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case INTEL_DWORD_MNEM_SUFFIX:
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case DWORD_MNEM_SUFFIX:
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if (intel_syntax)
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{
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i.suffix = mnem_p[-1];
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@ -1359,7 +1357,7 @@ md_assemble (line)
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? No_sSuf
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: (i.suffix == LONG_MNEM_SUFFIX
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? No_lSuf
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: (i.suffix == INTEL_DWORD_MNEM_SUFFIX
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: (i.suffix == DWORD_MNEM_SUFFIX
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? No_dSuf
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: (i.suffix == LONG_DOUBLE_MNEM_SUFFIX ? No_xSuf : 0))))));
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@ -1518,7 +1516,7 @@ md_assemble (line)
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if (i.tm.opcode_modifier & Size16)
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i.suffix = WORD_MNEM_SUFFIX;
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else
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i.suffix = DWORD_MNEM_SUFFIX;
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i.suffix = LONG_MNEM_SUFFIX;
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}
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else if (i.reg_operands)
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{
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@ -1535,7 +1533,7 @@ md_assemble (line)
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{
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i.suffix = ((i.types[op] & Reg8) ? BYTE_MNEM_SUFFIX :
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(i.types[op] & Reg16) ? WORD_MNEM_SUFFIX :
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DWORD_MNEM_SUFFIX);
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LONG_MNEM_SUFFIX);
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break;
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}
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}
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@ -1590,7 +1588,7 @@ md_assemble (line)
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}
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}
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}
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else if (i.suffix == DWORD_MNEM_SUFFIX)
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else if (i.suffix == LONG_MNEM_SUFFIX)
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{
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int op;
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for (op = i.operands; --op >= 0; )
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@ -1744,8 +1742,7 @@ md_assemble (line)
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/* Now select between word & dword operations via the operand
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size prefix, except for instructions that will ignore this
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prefix anyway. */
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if (((intel_syntax && (i.suffix == INTEL_DWORD_MNEM_SUFFIX))
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|| i.suffix == DWORD_MNEM_SUFFIX
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if (((intel_syntax && (i.suffix == DWORD_MNEM_SUFFIX))
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|| i.suffix == LONG_MNEM_SUFFIX) == flag_16bit_code
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&& !(i.tm.opcode_modifier & IgnoreSize))
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{
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@ -1758,7 +1755,7 @@ md_assemble (line)
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}
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/* Size floating point instruction. */
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if (i.suffix == LONG_MNEM_SUFFIX
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|| (intel_syntax && i.suffix == INTEL_DWORD_MNEM_SUFFIX))
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|| (intel_syntax && i.suffix == DWORD_MNEM_SUFFIX))
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{
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if (i.tm.opcode_modifier & FloatMF)
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i.tm.base_opcode ^= 4;
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@ -2578,7 +2575,7 @@ i386_immediate (imm_start)
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i.types[this_operand] |=
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(bigimm | smallest_imm_type ((long) exp->X_add_number));
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/* If a suffix is given, this operand may be shortended. */
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/* If a suffix is given, this operand may be shortened. */
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switch (i.suffix)
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{
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case WORD_MNEM_SUFFIX:
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@ -2863,14 +2860,14 @@ i386_operand_modifier (op_string, got_a_float)
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if (got_a_float)
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i.suffix = SHORT_MNEM_SUFFIX;
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else
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i.suffix = DWORD_MNEM_SUFFIX;
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i.suffix = LONG_MNEM_SUFFIX;
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*op_string += 9;
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return DWORD_PTR;
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}
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else if (!strncasecmp (*op_string, "QWORD PTR", 9))
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{
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i.suffix = INTEL_DWORD_MNEM_SUFFIX;
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i.suffix = DWORD_MNEM_SUFFIX;
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*op_string += 9;
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return QWORD_PTR;
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}
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@ -216,7 +216,6 @@ extern const char extra_symbol_chars[];
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#define NO_BASE_REGISTER_16 6
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/* these are the instruction mnemonic suffixes. */
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#define DWORD_MNEM_SUFFIX 'l'
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#define WORD_MNEM_SUFFIX 'w'
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#define BYTE_MNEM_SUFFIX 'b'
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#define SHORT_MNEM_SUFFIX 's'
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@ -224,7 +223,7 @@ extern const char extra_symbol_chars[];
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/* Intel Syntax */
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#define LONG_DOUBLE_MNEM_SUFFIX 'x'
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/* Intel Syntax */
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#define INTEL_DWORD_MNEM_SUFFIX 'd'
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#define DWORD_MNEM_SUFFIX 'd'
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/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
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#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
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@ -1,6 +1,7 @@
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2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
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* gas/i386/general.{s,l}: Add jmp and call tests.
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* gas/i386/general.{s,l}: Add jmp and call tests for .code16gcc,
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.code16, and .code32 modes.
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Tue Nov 30 23:02:01 1999 Jeffrey A Law (law@cygnus.com)
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@ -25,16 +25,36 @@
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.*:100: Warning:.*
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.*:101: Warning:.*
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.*:135: Warning:.*
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.*:163: Warning:.*
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.*:165: Warning:.*
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.*:167: Warning:.*
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.*:169: Warning:.*
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.*:171: Warning:.*
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.*:177: Warning:.*
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.*:179: Warning:.*
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.*:181: Warning:.*
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.*:183: Warning:.*
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.*:185: Warning:.*
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.*:162: Warning:.*
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.*:164: Warning:.*
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.*:166: Warning:.*
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.*:168: Warning:.*
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.*:170: Warning:.*
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.*:176: Warning:.*
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.*:178: Warning:.*
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.*:180: Warning:.*
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.*:182: Warning:.*
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.*:184: Warning:.*
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.*:191: Warning:.*
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.*:193: Warning:.*
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.*:195: Warning:.*
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.*:197: Warning:.*
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.*:199: Warning:.*
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.*:205: Warning:.*
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.*:207: Warning:.*
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.*:209: Warning:.*
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.*:211: Warning:.*
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.*:213: Warning:.*
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.*:220: Warning:.*
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.*:222: Warning:.*
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.*:224: Warning:.*
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.*:226: Warning:.*
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.*:228: Warning:.*
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.*:234: Warning:.*
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.*:236: Warning:.*
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.*:238: Warning:.*
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.*:240: Warning:.*
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.*:242: Warning:.*
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1 .psize 0
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2 .text
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3 # test various segment reg insns
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@ -219,46 +239,123 @@
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156 0160 67668984 248C0000 movl %eax,140\(%esp\)
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156 00
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157
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158 .code32
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159 .extern xxx
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160 0169 EB98 jmp 1b
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161 016b E9FCFFFF FF jmp xxx
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162 0170 FF250000 0000 jmp \*xxx
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163 0176 FF250000 0000 jmp xxx\(,1\)
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158 .extern xxx
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159 0169 EB98 jmp 1b
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160 016b E9FEFF jmp xxx
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161 016e FF260000 jmp \*xxx
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162 0172 FF260000 jmp xxx\(,1\)
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.*Warning:.*
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164 017c FFE7 jmp \*%edi
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165 017e FFE7 jmp %edi
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163 0176 66FFE7 jmp \*%edi
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164 0179 66FFE7 jmp %edi
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.*Warning:.*
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166 0180 FF27 jmp \*\(%edi\)
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167 0182 FF27 jmp \(%edi\)
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165 017c 67FF27 jmp \*\(%edi\)
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166 017f 67FF27 jmp \(%edi\)
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.*Warning:.*
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168 0184 FF2CBD00 000000 ljmp \*xxx\(,%edi,4\)
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169 018b FF2CBD00 000000 ljmp xxx\(,%edi,4\)
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167 0182 67FFAF00 000000 ljmp \*xxx\(%edi\)
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168 0189 67FFAF00 000000 ljmp xxx\(%edi\)
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.*Warning:.*
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170 0192 FF2D0000 0000 ljmp \*xxx
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171 0198 FF2D0000 0000 ljmp xxx\(,1\)
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169 0190 FF2E0000 ljmp \*xxx
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170 0194 FF2E0000 ljmp xxx\(,1\)
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.*Warning:.*
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172 019e EA000000 003412 ljmp \$0x1234,\$xxx
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173
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174 01a5 E859FFFF FF call 1b
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175 01aa E8FCFFFF FF call xxx
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176 01af FF150000 0000 call \*xxx
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177 01b5 FF150000 0000 call xxx\(,1\)
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171 0198 EA000034 12 ljmp \$0x1234,\$xxx
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172
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173 019d 66E860FF FFFF call 1b
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174 01a3 66E8FCFF FFFF call xxx
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175 01a9 66FF1600 00 call \*xxx
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176 01ae 66FF1600 00 call xxx\(,1\)
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.*Warning:.*
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178 01bb FFD7 call \*%edi
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179 01bd FFD7 call %edi
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177 01b3 66FFD7 call \*%edi
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178 01b6 66FFD7 call %edi
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.*Warning:.*
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180 01bf FF17 call \*\(%edi\)
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181 01c1 FF17 call \(%edi\)
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179 01b9 6766FF17 call \*\(%edi\)
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180 01bd 6766FF17 call \(%edi\)
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.*Warning:.*
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182 01c3 FF1CBD00 000000 lcall \*xxx\(,%edi,4\)
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183 01ca FF1CBD00 000000 lcall xxx\(,%edi,4\)
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181 01c1 6766FF9F 00000000 lcall \*xxx\(%edi\)
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182 01c9 6766FF9F 00000000 lcall xxx\(%edi\)
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.*Warning:.*
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184 01d1 FF1D0000 0000 lcall \*xxx
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185 01d7 FF1D0000 0000 lcall xxx\(,1\)
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183 01d1 66FF1E00 00 lcall \*xxx
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184 01d6 66FF1E00 00 lcall xxx\(,1\)
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.*Warning:.*
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186 01dd 9A000000 003412 lcall \$0x1234,\$xxx
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187
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188 # Force a good alignment.
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189 01e4 00000000 00000000 .p2align 4,0
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189 00000000
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185 01db 669A0000 00003412 lcall \$0x1234,\$xxx
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186
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187 .code16
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188 01e3 E91DFF jmp 1b
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189 01e6 E9FEFF jmp xxx
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190 01e9 FF260000 jmp \*xxx
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191 01ed FF260000 jmp xxx\(,1\)
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.*Warning:.*
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192 01f1 FFE7 jmp \*%di
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193 01f3 FFE7 jmp %di
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.*Warning:.*
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194 01f5 FF25 jmp \*\(%di\)
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195 01f7 FF25 jmp \(%di\)
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.*Warning:.*
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196 01f9 FFAD0000 ljmp \*xxx\(%di\)
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197 01fd FFAD0000 ljmp xxx\(%di\)
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.*Warning:.*
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198 0201 FF2E0000 ljmp \*xxx
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199 0205 FF2E0000 ljmp xxx\(,1\)
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.*Warning:.*
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200 0209 EA000034 12 ljmp \$0x1234,\$xxx
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201
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202 020e E8F2FE call 1b
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203 0211 E8FEFF call xxx
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204 0214 FF160000 call \*xxx
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205 0218 FF160000 call xxx\(,1\)
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.*Warning:.*
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206 021c FFD7 call \*%di
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207 021e FFD7 call %di
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.*Warning:.*
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208 0220 FF15 call \*\(%di\)
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209 0222 FF15 call \(%di\)
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.*Warning:.*
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210 0224 FF9D0000 lcall \*xxx\(%di\)
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211 0228 FF9D0000 lcall xxx\(%di\)
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.*Warning:.*
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212 022c FF1E0000 lcall \*xxx
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213 0230 FF1E0000 lcall xxx\(,1\)
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.*Warning:.*
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214 0234 9A000034 12 lcall \$0x1234,\$xxx
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215
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216 .code32
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217 0239 E9C5FEFF FF jmp 1b
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218 023e E9FCFFFF FF jmp xxx
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219 0243 FF250000 0000 jmp \*xxx
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220 0249 FF250000 0000 jmp xxx\(,1\)
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.*Warning:.*
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221 024f FFE7 jmp \*%edi
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222 0251 FFE7 jmp %edi
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.*Warning:.*
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223 0253 FF27 jmp \*\(%edi\)
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224 0255 FF27 jmp \(%edi\)
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.*Warning:.*
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225 0257 FF2CBD00 000000 ljmp \*xxx\(,%edi,4\)
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226 025e FF2CBD00 000000 ljmp xxx\(,%edi,4\)
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.*Warning:.*
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227 0265 FF2D0000 0000 ljmp \*xxx
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228 026b FF2D0000 0000 ljmp xxx\(,1\)
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.*Warning:.*
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229 0271 EA000000 003412 ljmp \$0x1234,\$xxx
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230
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231 0278 E886FEFF FF call 1b
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232 027d E8FCFFFF FF call xxx
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233 0282 FF150000 0000 call \*xxx
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234 0288 FF150000 0000 call xxx\(,1\)
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.*Warning:.*
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235 028e FFD7 call \*%edi
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236 0290 FFD7 call %edi
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.*Warning:.*
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237 0292 FF17 call \*\(%edi\)
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238 0294 FF17 call \(%edi\)
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.*Warning:.*
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239 0296 FF1CBD00 000000 lcall \*xxx\(,%edi,4\)
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240 029d FF1CBD00 000000 lcall xxx\(,%edi,4\)
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.*Warning:.*
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241 02a4 FF1D0000 0000 lcall \*xxx
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242 02aa FF1D0000 0000 lcall xxx\(,1\)
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.*Warning:.*
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243 02b0 9A000000 003412 lcall \$0x1234,\$xxx
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244
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245 # Force a good alignment.
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246 02b7 00000000 00000000 .p2align 4,0
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246 00
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@ -155,8 +155,65 @@
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leal -1760(%ebp),%ebx
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movl %eax,140(%esp)
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.code32
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.extern xxx
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jmp 1b
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jmp xxx
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jmp *xxx
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jmp xxx(,1)
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jmp *%edi
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jmp %edi
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jmp *(%edi)
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jmp (%edi)
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ljmp *xxx(%edi)
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ljmp xxx(%edi)
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ljmp *xxx
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ljmp xxx(,1)
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ljmp $0x1234,$xxx
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call 1b
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call xxx
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call *xxx
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call xxx(,1)
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call *%edi
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call %edi
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call *(%edi)
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call (%edi)
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lcall *xxx(%edi)
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lcall xxx(%edi)
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lcall *xxx
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lcall xxx(,1)
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lcall $0x1234,$xxx
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.code16
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jmp 1b
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jmp xxx
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jmp *xxx
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jmp xxx(,1)
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jmp *%di
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jmp %di
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jmp *(%di)
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jmp (%di)
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ljmp *xxx(%di)
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ljmp xxx(%di)
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ljmp *xxx
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ljmp xxx(,1)
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ljmp $0x1234,$xxx
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call 1b
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call xxx
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call *xxx
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call xxx(,1)
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call *%di
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call %di
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call *(%di)
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call (%di)
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lcall *xxx(%di)
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lcall xxx(%di)
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lcall *xxx
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lcall xxx(,1)
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lcall $0x1234,$xxx
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.code32
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jmp 1b
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jmp xxx
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jmp *xxx
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@ -1,3 +1,7 @@
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2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
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* i386.h: Qualify intel mode far call and jmp with x_Suf.
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1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
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* i386.h: Add JumpAbsolute qualifier to all non-intel mode
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@ -316,7 +316,7 @@ static const template i386_optab[] = {
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/* Intel Syntax */
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{"call", 2, 0x9a, X, wl_Suf|JumpInterSegment|DefaultSize, { Imm16, Imm16|Imm32, 0} },
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/* Intel Syntax */
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{"call", 1, 0xff, 3, wl_Suf|Modrm|DefaultSize, { WordMem, 0, 0} },
|
||||
{"call", 1, 0xff, 3, x_Suf|Modrm|DefaultSize, { WordMem, 0, 0} },
|
||||
{"lcall", 2, 0x9a, X, wl_Suf|JumpInterSegment|DefaultSize, { Imm16, Imm16|Imm32, 0} },
|
||||
{"lcall", 1, 0xff, 3, wl_Suf|Modrm|DefaultSize, { WordMem|JumpAbsolute, 0, 0} },
|
||||
|
||||
@ -326,7 +326,7 @@ static const template i386_optab[] = {
|
||||
/* Intel Syntax */
|
||||
{"jmp", 2, 0xea, X, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} },
|
||||
/* Intel Syntax */
|
||||
{"jmp", 1, 0xff, 5, wl_Suf|Modrm, { WordMem, 0, 0} },
|
||||
{"jmp", 1, 0xff, 5, x_Suf|Modrm, { WordMem, 0, 0} },
|
||||
{"ljmp", 2, 0xea, X, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} },
|
||||
{"ljmp", 1, 0xff, 5, wl_Suf|Modrm, { WordMem|JumpAbsolute, 0, 0} },
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user