diff --git a/gas/ChangeLog b/gas/ChangeLog index 5ab54b239b..19a944952f 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2000-11-26 Stephane Carrez + + * config/tc-m68hc11.c (build_indexed_byte): Print the offset in + the error message. + (get_operand): Fix analysis for movw/movb instructions. + 2000-11-24 Nick Clifton * configure.in (xscale-elf): Add target. diff --git a/gas/config/tc-m68hc11.c b/gas/config/tc-m68hc11.c index eabf8efcac..3901ad0bf8 100644 --- a/gas/config/tc-m68hc11.c +++ b/gas/config/tc-m68hc11.c @@ -1073,6 +1073,8 @@ get_operand (oper, which, opmode) if (*p == ',') { + int possible_mode = M6811_OP_NONE; + char *old_input_line; p++; /* 68HC12 pre increment or decrement. */ @@ -1080,23 +1082,37 @@ get_operand (oper, which, opmode) { if (*p == '-') { - mode = M6812_PRE_DEC; + possible_mode = M6812_PRE_DEC; p++; - if (current_architecture & cpu6811) - as_bad (_("Pre-decrement mode is not valid for 68HC11")); } else if (*p == '+') { - mode = M6812_PRE_INC; + possible_mode = M6812_PRE_INC; p++; - if (current_architecture & cpu6811) - as_bad (_("Pre-increment mode is not valid for 68HC11")); } p = skip_whites (p); } + old_input_line = input_line_pointer; input_line_pointer = p; reg = register_name (); + /* Backtrack if we have a valid constant expression and + it does not correspond to the offset of the 68HC12 indexed + addressing mode (as in N,x). */ + if (reg == REG_NONE && mode == M6811_OP_NONE + && possible_mode != M6811_OP_NONE) + { + oper->mode = M6811_OP_IND16 | M6811_OP_JUMP_REL; + input_line_pointer = skip_whites (old_input_line); + return 1; + } + + if (possible_mode != M6811_OP_NONE) + mode = possible_mode; + + if ((current_architecture & cpu6811) + && possible_mode != M6811_OP_NONE) + as_bad (_("Pre-increment mode is not valid for 68HC11")); /* Backtrack. */ if (which == 0 && opmode & M6812_OP_IDX_P2 && reg != REG_X && reg != REG_Y @@ -1700,7 +1716,8 @@ build_indexed_byte (op, format, move_insn) if (move_insn && !(val >= -16 && val <= 15)) { - as_bad (_("Offset out of 5-bit range for movw/movb insn.")); + as_bad (_("Offset out of 5-bit range for movw/movb insn: %ld."), + val); return -1; } diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index e5527d5854..4bb3eccd4d 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2000-11-26 Stephane Carrez + + * gas/m68hc11/opers12.s: New test for movw operands. + * gas/m68hc11/opers12.d: Likewise. + 2000-11-24 Nick Clifton * arm.exp: Run tests for xscale as well as arm. diff --git a/gas/testsuite/gas/m68hc11/opers12.d b/gas/testsuite/gas/m68hc11/opers12.d index fec02eb03b..2fbd3ddf07 100644 --- a/gas/testsuite/gas/m68hc11/opers12.d +++ b/gas/testsuite/gas/m68hc11/opers12.d @@ -67,4 +67,15 @@ Disassembly of section .text: 0+0b6 trap #64 0+0b8 trap #128 0+0ba trap #255 -0+0bc rts +0+0bc movw 1,X, 2,X +0+0c0 movw 0+0ffff , 0000ffff +0+0c6 movw 0+0ffff , 1,X +0+0cb movw #0+0ffff , 1,X +0+0d0 movw 0+03 , 0+08 +0+0d6 movw #0+03 , 0+03 +0+0dc movw #0+03 , 1,X +0+0e1 movw 0+03 , 1,X +0+0e6 movw 0+03 , 2,X +0+0eb movw 0+04 , -2,X +0+0f0 rts + diff --git a/gas/testsuite/gas/m68hc11/opers12.s b/gas/testsuite/gas/m68hc11/opers12.s index dcf53d1ae6..b4a9c24282 100644 --- a/gas/testsuite/gas/m68hc11/opers12.s +++ b/gas/testsuite/gas/m68hc11/opers12.s @@ -69,4 +69,14 @@ L1: ldy ,x trap #0x80 trap #255 L2: + movw 1,x,2,x + movw -1,-1 + movw -1,1,x + movw #-1,1,x + movw 3,8 + movw #3,3 + movw #3,1,x + movw 3,1,x + movw 3,+2,x + movw 4,-2,x rts