* doc/gdb.texinfo (PowerPC): Fix typo.
(PowerPC features): Fix typo.
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@ -1,3 +1,8 @@
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2008-08-19 Vladimir Prus <vladimir@codesourcery.com>
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* doc/gdb.texinfo (PowerPC): Fix typo.
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(PowerPC features): Fix typo.
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2008-08-18 Pedro Alves <pedro@codesourcery.com>
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2008-08-18 Pedro Alves <pedro@codesourcery.com>
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* observer.texi (thread_ptid_changed): New.
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* observer.texi (thread_ptid_changed): New.
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@ -16427,7 +16427,7 @@ The pseudo-registers go from @code{$dl0} through @code{$dl15}, and are formed
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by joining the even/odd register pairs @code{f0} and @code{f1} for @code{$dl0},
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by joining the even/odd register pairs @code{f0} and @code{f1} for @code{$dl0},
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@code{f2} and @code{f3} for @code{$dl1} and so on.
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@code{f2} and @code{f3} for @code{$dl1} and so on.
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For POWER7 processors, @value{GDB} provides a set of pseudo-registers, the 64-bit
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For POWER7 processors, @value{GDBN} provides a set of pseudo-registers, the 64-bit
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wide Extended Floating Point Registers (@samp{f32} through @samp{f63}).
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wide Extended Floating Point Registers (@samp{f32} through @samp{f63}).
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@ -27872,7 +27872,7 @@ The @samp{org.gnu.gdb.power.vsx} feature is optional. It should
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contain registers @samp{vs0h} through @samp{vs31h}. @value{GDBN}
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contain registers @samp{vs0h} through @samp{vs31h}. @value{GDBN}
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will combine these registers with the floating point registers
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will combine these registers with the floating point registers
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(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
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(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
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through @samp{vr31}} to present the 128-bit wide registers @samp{vs0}
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through @samp{vr31}) to present the 128-bit wide registers @samp{vs0}
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through @samp{vs63}, the set of vector registers for POWER7.
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through @samp{vs63}, the set of vector registers for POWER7.
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The @samp{org.gnu.gdb.power.spe} feature is optional. It should
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The @samp{org.gnu.gdb.power.spe} feature is optional. It should
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