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Enhance the disassembler so that it will reliably determine whether a reloc applies to the middle of the next insn. 

PR 24907
binutils* objdump.c (null_print): New function.
	(disassemble_bytes): Delete previous_octets local and replace with
	a test of the max_reloc_offset_into_insn field of the
	bfd_arch_info structure.  If a reloc is a potential match for the
	next insn, then perform a dummy disassembly in order to calculate
	its real length.

bfd	* archures.c (bfd_arch_info_type): Add max_reloc_offset_into_insn
	field.
	(bfd_default_arch_struct): Initialise the new field.
	* bfd-in2.h: Regenerate.
	* cpu-aarch64.c: Initialise the new field.
	* cpu-alpha.c: Likewise.
	* cpu-arc.c: Likewise.
	* cpu-arm.c: Likewise.
	* cpu-avr.c: Likewise.
	* cpu-bfin.c: Likewise.
	* cpu-bpf.c: Likewise.
	* cpu-cr16.c: Likewise.
	* cpu-cr16c.c: Likewise.
	* cpu-cris.c: Likewise.
	* cpu-crx.c: Likewise.
	* cpu-csky.c: Likewise.
	* cpu-d10v.c: Likewise.
	* cpu-d30v.c: Likewise.
	* cpu-dlx.c: Likewise.
	* cpu-epiphany.c: Likewise.
	* cpu-fr30.c: Likewise.
	* cpu-frv.c: Likewise.
	* cpu-ft32.c: Likewise.
	* cpu-h8300.c: Likewise.
	* cpu-hppa.c: Likewise.
	* cpu-i386.c: Likewise.
	* cpu-ia64.c: Likewise.
	* cpu-iamcu.c: Likewise.
	* cpu-ip2k.c: Likewise.
	* cpu-iq2000.c: Likewise.
	* cpu-k1om.c: Likewise.
	* cpu-l1om.c: Likewise.
	* cpu-lm32.c: Likewise.
	* cpu-m10200.c: Likewise.
	* cpu-m10300.c: Likewise.
	* cpu-m32c.c: Likewise.
	* cpu-m32r.c: Likewise.
	* cpu-m68hc11.c: Likewise.
	* cpu-m68hc12.c: Likewise.
	* cpu-m68k.c: Likewise.
	* cpu-m9s12x.c: Likewise.
	* cpu-m9s12xg.c: Likewise.
	* cpu-mcore.c: Likewise.
	* cpu-mep.c: Likewise.
	* cpu-metag.c: Likewise.
	* cpu-microblaze.c: Likewise.
	* cpu-mips.c: Likewise.
	* cpu-mmix.c: Likewise.
	* cpu-moxie.c: Likewise.
	* cpu-msp430.c: Likewise.
	* cpu-mt.c: Likewise.
	* cpu-nds32.c: Likewise.
	* cpu-nfp.c: Likewise.
	* cpu-nios2.c: Likewise.
	* cpu-ns32k.c: Likewise.
	* cpu-or1k.c: Likewise.
	* cpu-pdp11.c: Likewise.
	* cpu-pj.c: Likewise.
	* cpu-plugin.c: Likewise.
	* cpu-powerpc.c: Likewise.
	* cpu-pru.c: Likewise.
	* cpu-riscv.c: Likewise.
	* cpu-rl78.c: Likewise.
	* cpu-rs6000.c: Likewise.
	* cpu-rx.c: Likewise.
	* cpu-s12z.c: Likewise.
	* cpu-s390.c: Likewise.
	* cpu-score.c: Likewise.
	* cpu-sh.c: Likewise.
	* cpu-sparc.c: Likewise.
	* cpu-spu.c: Likewise.
	* cpu-tic30.c: Likewise.
	* cpu-tic4x.c: Likewise.
	* cpu-tic54x.c: Likewise.
	* cpu-tic6x.c: Likewise.
	* cpu-tic80.c: Likewise.
	* cpu-tilegx.c: Likewise.
	* cpu-tilepro.c: Likewise.
	* cpu-v850.c: Likewise.
	* cpu-v850_rh850.c: Likewise.
	* cpu-vax.c: Likewise.
	* cpu-visium.c: Likewise.
	* cpu-wasm32.c: Likewise.
	* cpu-xc16x.c: Likewise.
	* cpu-xgate.c: Likewise.
	* cpu-xstormy16.c: Likewise.
	* cpu-xtensa.c: Likewise.
	* cpu-z80.c: Likewise.
	* cpu-z8k.c: Likewise.

gas	* testsuite/gas/arm/pr24907.s: New test.
	* testsuite/gas/arm/pr24907.d: Expected disassembly.
This commit is contained in:
Nick Clifton 2019-09-10 15:20:58 +01:00
parent efd0b3103f
commit aebcfb76fc
93 changed files with 1280 additions and 2552 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

93
bfd/ChangeLog
View File

@ -1,3 +1,96 @@
2019-09-10 Nick Clifton <nickc@redhat.com>
PR 24907
* archures.c (bfd_arch_info_type): Add max_reloc_offset_into_insn
field.
(bfd_default_arch_struct): Initialise the new field.
* bfd-in2.h: Regenerate.
* cpu-aarch64.c: Initialise the new field.
* cpu-alpha.c: Likewise.
* cpu-arc.c: Likewise.
* cpu-arm.c: Likewise.
* cpu-avr.c: Likewise.
* cpu-bfin.c: Likewise.
* cpu-bpf.c: Likewise.
* cpu-cr16.c: Likewise.
* cpu-cr16c.c: Likewise.
* cpu-cris.c: Likewise.
* cpu-crx.c: Likewise.
* cpu-csky.c: Likewise.
* cpu-d10v.c: Likewise.
* cpu-d30v.c: Likewise.
* cpu-dlx.c: Likewise.
* cpu-epiphany.c: Likewise.
* cpu-fr30.c: Likewise.
* cpu-frv.c: Likewise.
* cpu-ft32.c: Likewise.
* cpu-h8300.c: Likewise.
* cpu-hppa.c: Likewise.
* cpu-i386.c: Likewise.
* cpu-ia64.c: Likewise.
* cpu-iamcu.c: Likewise.
* cpu-ip2k.c: Likewise.
* cpu-iq2000.c: Likewise.
* cpu-k1om.c: Likewise.
* cpu-l1om.c: Likewise.
* cpu-lm32.c: Likewise.
* cpu-m10200.c: Likewise.
* cpu-m10300.c: Likewise.
* cpu-m32c.c: Likewise.
* cpu-m32r.c: Likewise.
* cpu-m68hc11.c: Likewise.
* cpu-m68hc12.c: Likewise.
* cpu-m68k.c: Likewise.
* cpu-m9s12x.c: Likewise.
* cpu-m9s12xg.c: Likewise.
* cpu-mcore.c: Likewise.
* cpu-mep.c: Likewise.
* cpu-metag.c: Likewise.
* cpu-microblaze.c: Likewise.
* cpu-mips.c: Likewise.
* cpu-mmix.c: Likewise.
* cpu-moxie.c: Likewise.
* cpu-msp430.c: Likewise.
* cpu-mt.c: Likewise.
* cpu-nds32.c: Likewise.
* cpu-nfp.c: Likewise.
* cpu-nios2.c: Likewise.
* cpu-ns32k.c: Likewise.
* cpu-or1k.c: Likewise.
* cpu-pdp11.c: Likewise.
* cpu-pj.c: Likewise.
* cpu-plugin.c: Likewise.
* cpu-powerpc.c: Likewise.
* cpu-pru.c: Likewise.
* cpu-riscv.c: Likewise.
* cpu-rl78.c: Likewise.
* cpu-rs6000.c: Likewise.
* cpu-rx.c: Likewise.
* cpu-s12z.c: Likewise.
* cpu-s390.c: Likewise.
* cpu-score.c: Likewise.
* cpu-sh.c: Likewise.
* cpu-sparc.c: Likewise.
* cpu-spu.c: Likewise.
* cpu-tic30.c: Likewise.
* cpu-tic4x.c: Likewise.
* cpu-tic54x.c: Likewise.
* cpu-tic6x.c: Likewise.
* cpu-tic80.c: Likewise.
* cpu-tilegx.c: Likewise.
* cpu-tilepro.c: Likewise.
* cpu-v850.c: Likewise.
* cpu-v850_rh850.c: Likewise.
* cpu-vax.c: Likewise.
* cpu-visium.c: Likewise.
* cpu-wasm32.c: Likewise.
* cpu-xc16x.c: Likewise.
* cpu-xgate.c: Likewise.
* cpu-xstormy16.c: Likewise.
* cpu-xtensa.c: Likewise.
* cpu-z80.c: Likewise.
* cpu-z8k.c: Likewise.
2019-09-09 Phil Blundell <pb@pbcl.net>
binutils 2.33 branch created.

15
bfd/archures.c
View File

@ -584,6 +584,16 @@ DESCRIPTION
. bfd_boolean code);
.
. const struct bfd_arch_info *next;
.
. {* On some architectures the offset for a relocation can point into
. the middle of an instruction. This field specifies the maximum
. offset such a relocation can have (in octets). This affects the
. behaviour of the disassembler, since a value greater than zero
. means that it may need to disassemble an instruction twice, once
. to get its length and then a second time to display it. If the
. value is negative then this has to be done for every single
. instruction, regardless of the offset of the reloc. *}
. signed int max_reloc_offset_into_insn;
.}
.bfd_arch_info_type;
.
@ -929,12 +939,13 @@ DESCRIPTION
.extern const bfd_arch_info_type bfd_default_arch_struct;
*/
const bfd_arch_info_type bfd_default_arch_struct = {
const bfd_arch_info_type bfd_default_arch_struct =
{
32, 32, 8, bfd_arch_unknown, 0, "unknown", "unknown", 2, TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
0, 0
};
/*

10
bfd/bfd-in2.h
View File

@ -2514,6 +2514,16 @@ typedef struct bfd_arch_info
bfd_boolean code);
const struct bfd_arch_info *next;
/* On some architectures the offset for a relocation can point into
the middle of an instruction. This field specifies the maximum
offset such a relocation can have (in octets). This affects the
behaviour of the disassembler, since a value greater than zero
means that it may need to disassemble an instruction twice, once
to get its length and then a second time to display it. If the
value is negative then this has to be done for every single
instruction, regardless of the offset of the reloc. */
signed int max_reloc_offset_into_insn;
}
bfd_arch_info_type;

2
bfd/cpu-aarch64.c
View File

@ -104,7 +104,7 @@ scan (const struct bfd_arch_info *info, const char *string)
#define N(NUMBER, PRINT, WORDSIZE, DEFAULT, NEXT) \
{ WORDSIZE, WORDSIZE, 8, bfd_arch_aarch64, NUMBER, \
"aarch64", PRINT, 4, DEFAULT, compatible, scan, \
bfd_arch_default_fill, NEXT }
bfd_arch_default_fill, NEXT, 0 }
static const bfd_arch_info_type bfd_aarch64_arch_ilp32 =
N (bfd_mach_aarch64_ilp32, "aarch64:ilp32", 32, FALSE, NULL);

9
bfd/cpu-alpha.c
View File

@ -24,19 +24,20 @@
#define N(BITS_WORD, BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT) \
{ \
BITS_WORD, /* bits in a word */ \
BITS_ADDR, /* bits in an address */ \
8, /* 8 bits in a byte */ \
BITS_WORD, /* Bits in a word. */ \
BITS_ADDR, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_alpha, \
NUMBER, \
"alpha", \
PRINT, \
3, \
3, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
#define NN(index) (&arch_info_struct[index])

11
bfd/cpu-arc.c
View File

@ -27,20 +27,21 @@ static const bfd_arch_info_type *
arc_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b);
#define ARC(mach, print_name, default_p, next) \
{ \
32, /* 32 bits in a word */ \
32, /* 32 bits in an address */ \
8, /* 8 bits in a byte */ \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_arc, \
mach, \
"arc", \
print_name, \
4, /* section alignment power */ \
4, /* Section alignment power. */ \
default_p, \
arc_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
next, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_struct[] =

2
bfd/cpu-arm.c
View File

@ -221,7 +221,7 @@ scan (const struct bfd_arch_info *info, const char *string)
#define N(number, print, default, next) \
{ 32, 32, 8, bfd_arch_arm, number, "arm", print, 4, default, compatible, \
scan, bfd_arch_default_fill, next }
scan, bfd_arch_default_fill, next, 0 }
static const bfd_arch_info_type arch_info_struct[] =
{

9
bfd/cpu-avr.c
View File

@ -82,9 +82,9 @@ compatible (const bfd_arch_info_type * a,
#define N(addr_bits, machine, print, default, next) \
{ \
8, /* 8 bits in a word. */ \
addr_bits, /* bits in an address. */ \
8, /* 8 bits in a byte. */ \
8, /* Bits in a word. */ \
addr_bits, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_avr, \
machine, /* Machine number. */ \
"avr", /* Architecture name. */ \
@ -94,7 +94,8 @@ compatible (const bfd_arch_info_type * a,
compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
next \
next, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_struct[] =

3
bfd/cpu-bfin.c
View File

@ -37,5 +37,6 @@ const bfd_arch_info_type bfd_bfin_arch =
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

5
bfd/cpu-bpf.c
View File

@ -25,7 +25,7 @@
const bfd_arch_info_type bfd_bpf_arch =
{
64, /* Bits per word */
64, /* Bits per word. */
64, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_bpf, /* Architecture. */
@ -37,5 +37,6 @@ const bfd_arch_info_type bfd_bpf_arch =
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

31
bfd/cpu-cr16.c
View File

@ -24,18 +24,19 @@
const bfd_arch_info_type bfd_cr16_arch =
{
16, /* 16 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_cr16, /* enum bfd_architecture arch. */
bfd_mach_cr16,
"cr16", /* Arch name. */
"cr16", /* Printable name. */
1, /* Unsigned int section alignment power. */
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
{
16, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_cr16, /* Architecture number. */
bfd_mach_cr16,
"cr16", /* Arch name. */
"cr16", /* Printable name. */
1, /* Section alignment power. */
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

31
bfd/cpu-cr16c.c
View File

@ -23,18 +23,19 @@
#include "libbfd.h"
const bfd_arch_info_type bfd_cr16c_arch =
{
16, /* 16 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_cr16c,
bfd_mach_cr16c,
"cr16c",
"cr16c",
1,
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
{
16, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_cr16c,
bfd_mach_cr16c,
"cr16c",
"cr16c",
1,
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

5
bfd/cpu-cris.c
View File

@ -67,7 +67,7 @@ get_compatible (const bfd_arch_info_type *a,
#define N(NUMBER, PRINT, NEXT) \
{ 32, 32, 8, bfd_arch_cris, NUMBER, "cris", PRINT, 1, FALSE, \
get_compatible, bfd_default_scan, bfd_arch_default_fill, NEXT }
get_compatible, bfd_default_scan, bfd_arch_default_fill, NEXT, 0 }
static const bfd_arch_info_type bfd_cris_arch_compat_v10_v32 =
N (bfd_mach_cris_v10_v32, "cris:common_v10_v32", NULL);
@ -97,8 +97,9 @@ const bfd_arch_info_type bfd_cris_arch =
bfd_default_scan, /* Check if a bfd_arch_info_type is a
match. */
bfd_arch_default_fill, /* Default fill. */
&bfd_cris_arch_v32 /* Pointer to next bfd_arch_info_type in
&bfd_cris_arch_v32, /* Pointer to next bfd_arch_info_type in
the same family. */
0 /* Maximum offset of a reloc from the start of an insn. */
};
/*

31
bfd/cpu-crx.c
View File

@ -24,18 +24,19 @@
const bfd_arch_info_type bfd_crx_arch =
{
16, /* 16 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_crx, /* enum bfd_architecture arch. */
bfd_mach_crx,
"crx", /* Arch name. */
"crx", /* Printable name. */
1, /* Unsigned int section alignment power. */
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
{
16, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_crx, /* Architecture number. */
bfd_mach_crx,
"crx", /* Arch name. */
"crx", /* Printable name. */
1, /* Section alignment power. */
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

31
bfd/cpu-csky.c
View File

@ -23,21 +23,22 @@
#include "bfd.h"
#include "libbfd.h"
#define N(NUMBER, PRINT, ISDEFAULT, NEXT) \
{ \
32, /* 32 bits in a word */ \
32, /* 32 bits in an address */ \
8, /* 8 bits in a byte */ \
bfd_arch_csky, /* Architecture */ \
NUMBER, /* Machine number */ \
"csky", /* Architecture name */ \
PRINT, /* Printable name */ \
3, /* Section align power */ \
ISDEFAULT, /* Is this the default architecture ? */ \
bfd_default_compatible, /* Architecture comparison function */ \
bfd_default_scan, /* String to architecture conversion */ \
bfd_arch_default_fill, \
NEXT /* Next in list */ \
#define N(NUMBER, PRINT, ISDEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_csky, /* Architecture. */ \
NUMBER, /* Machine number. */ \
"csky", /* Architecture name. */ \
PRINT, /* Printable name. */ \
3, /* Section align power. */ \
ISDEFAULT, /* Is this the default architecture ? */ \
bfd_default_compatible, /* Architecture comparison function. */ \
bfd_default_scan, /* String to architecture conversion. */ \
bfd_arch_default_fill, \
NEXT, /* Next in list. */ \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_struct[] =

66
bfd/cpu-d10v.c
View File

@ -23,53 +23,29 @@
#include "bfd.h"
#include "libbfd.h"
#define N(NUMBER, PRINT, DEFAULT, NEXT) \
{ \
16, /* Bits in a word. */ \
18, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_d10v, \
NUMBER, \
"d10v", \
PRINT, \
4, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type d10v_ts3_info =
{
16, /* 16 bits in a word. */
18, /* really 16 bits in an address, but code has 18 bit range. */
8, /* 8 bits in a byte. */
bfd_arch_d10v,
bfd_mach_d10v_ts3,
"d10v",
"d10v:ts3",
4, /* Section alignment power. */
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
N (bfd_mach_d10v_ts3, "d10v:ts3", FALSE, NULL);
static const bfd_arch_info_type d10v_ts2_info =
{
16,
18,
8,
bfd_arch_d10v,
bfd_mach_d10v_ts2,
"d10v",
"d10v:ts2",
4,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
& d10v_ts3_info,
};
N (bfd_mach_d10v_ts2, "d10v:ts2", FALSE, & d10v_ts3_info);
const bfd_arch_info_type bfd_d10v_arch =
{
16,
18,
8,
bfd_arch_d10v,
bfd_mach_d10v,
"d10v",
"d10v",
4,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
& d10v_ts2_info,
};
N (bfd_mach_d10v, "d10v", TRUE, & d10v_ts2_info);

27
bfd/cpu-d30v.c
View File

@ -25,17 +25,18 @@
const bfd_arch_info_type bfd_d30v_arch =
{
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_d30v,
0,
"d30v",
"d30v",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_d30v,
0,
"d30v",
"d30v",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

29
bfd/cpu-dlx.c
View File

@ -24,18 +24,19 @@
#include "libbfd.h"
const bfd_arch_info_type bfd_dlx_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_dlx,
0, /* Only 1 machine. */
"dlx",
"dlx",
4,
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
{
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_dlx,
0, /* Machine number. */
"dlx",
"dlx",
4,
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

51
bfd/cpu-epiphany.c
View File

@ -23,36 +23,27 @@
#include "bfd.h"
#include "libbfd.h"
#define N(NUMBER, PRINT, ALIGN, DEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_epiphany, \
NUMBER, \
"epiphany", \
PRINT, \
ALIGN, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type bfd_epiphany16_arch =
{
32, /* Bits per word */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_epiphany, /* Architecture. */
bfd_mach_epiphany16, /* Machine. */
"epiphany", /* Architecture name. */
"epiphany16", /* Machine name. */
1, /* Section align power. */
FALSE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
};
N (bfd_mach_epiphany16, "epiphany16", 1, FALSE, NULL);
const bfd_arch_info_type bfd_epiphany_arch =
{
32, /* Bits per word - not really true. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_epiphany, /* Architecture. */
bfd_mach_epiphany32, /* Machine. */
"epiphany", /* Architecture name. */
"epiphany32", /* Machine name. */
2, /* Section align power. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
& bfd_epiphany16_arch /* Next in list. */
};
N (bfd_mach_epiphany32, "epiphany32", 2, TRUE, & bfd_epiphany16_arch);

25
bfd/cpu-fr30.c
View File

@ -24,17 +24,18 @@
const bfd_arch_info_type bfd_fr30_arch =
{
32, /* bits per word */
32, /* bits per address */
8, /* bits per byte */
bfd_arch_fr30, /* architecture */
bfd_mach_fr30, /* machine */
"fr30", /* architecture name */
"fr30", /* printable name */
4, /* section align power */
TRUE, /* the default ? */
bfd_default_compatible, /* architecture comparison fn */
bfd_default_scan, /* string to architecture convert fn */
32, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_fr30, /* Architecture. */
bfd_mach_fr30, /* Machine. */
"fr30", /* Architecture name. */
"fr30", /* Printable name. */
4, /* Section align power. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* next in list */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

25
bfd/cpu-frv.c
View File

@ -24,19 +24,20 @@
#define FRV_ARCH(MACHINE, NAME, DEFAULT, NEXT) \
{ \
32, /* 32 bits in a word */ \
32, /* 32 bits in an address */ \
8, /* 8 bits in a byte */ \
bfd_arch_frv, /* architecture */ \
MACHINE, /* which machine */ \
"frv", /* architecture name */ \
NAME, /* machine name */ \
4, /* default alignment */ \
DEFAULT, /* is this the default? */ \
bfd_default_compatible, /* architecture comparison fn */ \
bfd_default_scan, /* string to architecture convert fn */ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_frv, /* Architecture number. */ \
MACHINE, /* Machine number. */ \
"frv", /* Architecture name. */ \
NAME, /* Machine name. */ \
4, /* Section alignment. */ \
DEFAULT, /* Is this the default? */ \
bfd_default_compatible, /* Architecture comparison fn. */ \
bfd_default_scan, /* String to architecture convert fn. */\
bfd_arch_default_fill, /* Default fill. */ \
NEXT /* next in list */ \
NEXT, /* Next in list. */ \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_300

71
bfd/cpu-ft32.c
View File

@ -22,54 +22,31 @@
#include "bfd.h"
#include "libbfd.h"
#define N(NUMBER, PRINT, DEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_ft32, \
NUMBER, \
"ft32", \
PRINT, \
2, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_struct[] =
{
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_ft32, /* enum bfd_architecture arch. */
bfd_mach_ft32,
"ft32", /* Arch name. */
"ft32", /* Printable name. */
2, /* Unsigned int section alignment power. */
FALSE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[1],
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_ft32, /* enum bfd_architecture arch. */
bfd_mach_ft32b,
"ft32b", /* Arch name. */
"ft32b", /* Printable name. */
2, /* Unsigned int section alignment power. */
FALSE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
},
};
{
N (bfd_mach_ft32, "ft32", FALSE, &arch_info_struct[1]),
N (bfd_mach_ft32b, "ft32b", FALSE, NULL)
};
const bfd_arch_info_type bfd_ft32_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_ft32, /* enum bfd_architecture arch. */
bfd_mach_ft32,
"ft32", /* Arch name. */
"ft32", /* Printable name. */
2, /* Unsigned int section alignment power. */
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
arch_info_struct,
};
N (bfd_mach_ft32, "ft32", TRUE, arch_info_struct);

116
bfd/cpu-h8300.c
View File

@ -113,124 +113,30 @@ compatible (const bfd_arch_info_type *in, const bfd_arch_info_type *out)
return in;
}
#define N(word, addr, number, name, print, default, next) \
{ word, addr, 8, bfd_arch_h8300, number, name, print, 1, default, \
compatible, h8300_scan, bfd_arch_default_fill, next, 0 }
static const bfd_arch_info_type h8300sxn_info_struct =
{
32, /* 32 bits in a word */
16, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_h8300,
bfd_mach_h8300sxn,
"h8300sxn", /* arch_name */
"h8300sxn", /* printable name */
1,
FALSE, /* the default machine */
compatible,
h8300_scan,
bfd_arch_default_fill,
0
};
N (32, 16, bfd_mach_h8300sxn, "h8300sxn", "h8300sxn", FALSE, NULL);
static const bfd_arch_info_type h8300sx_info_struct =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_h8300,
bfd_mach_h8300sx,
"h8300sx", /* arch_name */
"h8300sx", /* printable name */
1,
FALSE, /* the default machine */
compatible,
h8300_scan,
bfd_arch_default_fill,
&h8300sxn_info_struct
};
N (32, 32, bfd_mach_h8300sx, "h8300sx", "h8300sx", FALSE, &h8300sxn_info_struct);
static const bfd_arch_info_type h8300sn_info_struct =
{
32, /* 32 bits in a word. */
16, /* 16 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_h8300,
bfd_mach_h8300sn,
"h8300sn", /* Architecture name. */
"h8300sn", /* Printable name. */
1,
FALSE, /* The default machine. */
compatible,
h8300_scan,
bfd_arch_default_fill,
&h8300sx_info_struct
};
N (32, 16, bfd_mach_h8300sn, "h8300sn", "h8300sn", FALSE, &h8300sx_info_struct);
static const bfd_arch_info_type h8300hn_info_struct =
{
32, /* 32 bits in a word. */
16, /* 16 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_h8300,
bfd_mach_h8300hn,
"h8300hn", /* Architecture name. */
"h8300hn", /* Printable name. */
1,
FALSE, /* The default machine. */
compatible,
h8300_scan,
bfd_arch_default_fill,
&h8300sn_info_struct
};
N (32, 16, bfd_mach_h8300hn, "h8300hn", "h8300hn", FALSE, &h8300sn_info_struct);
static const bfd_arch_info_type h8300s_info_struct =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_h8300,
bfd_mach_h8300s,
"h8300s", /* Architecture name. */
"h8300s", /* Printable name. */
1,
FALSE, /* The default machine. */
compatible,
h8300_scan,
bfd_arch_default_fill,
& h8300hn_info_struct
};
N (32, 32, bfd_mach_h8300s, "h8300s", "h8300s", FALSE, & h8300hn_info_struct);
static const bfd_arch_info_type h8300h_info_struct =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_h8300,
bfd_mach_h8300h,
"h8300h", /* Architecture name. */
"h8300h", /* Printable name. */
1,
FALSE, /* The default machine. */
compatible,
h8300_scan,
bfd_arch_default_fill,
&h8300s_info_struct
};
N (32, 32, bfd_mach_h8300h, "h8300h", "h8300h", FALSE, &h8300s_info_struct);
const bfd_arch_info_type bfd_h8300_arch =
{
16, /* 16 bits in a word. */
16, /* 16 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_h8300,
bfd_mach_h8300,
"h8300", /* Architecture name. */
"h8300", /* Printable name. */
1,
TRUE, /* The default machine. */
compatible,
h8300_scan,
bfd_arch_default_fill,
&h8300h_info_struct
};
N (16, 16, bfd_mach_h8300, "h8300", "h8300", TRUE, &h8300h_info_struct);
/* Pad the given address to 32 bits, converting 16-bit and 24-bit
addresses into the values they would have had on a h8s target. */

87
bfd/cpu-hppa.c
View File

@ -22,72 +22,35 @@
#include "bfd.h"
#include "libbfd.h"
#define N(BITS, NUMBER, PRINT, DEFAULT, NEXT) \
{ \
BITS, /* Bits in a word. */ \
BITS, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_hppa, \
NUMBER, \
"hppa", \
PRINT, \
3, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type bfd_hppa10_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_hppa,
bfd_mach_hppa10, /* By convention PA1.0 = 10 */
"hppa",
"hppa1.0",
3,
TRUE, /* Unless we use 1.1 specific features */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
N (32, bfd_mach_hppa10, "hppa1.0", TRUE, NULL);
/* PA2.0 in narrow mode */
/* PA2.0 in narrow mode. */
static const bfd_arch_info_type bfd_hppa20_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_hppa,
bfd_mach_hppa20, /* By convention PA2.0 = 20 */
"hppa",
"hppa2.0",
3,
FALSE, /* Unless we use 1.1 specific features */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_hppa10_arch,
};
N (32, bfd_mach_hppa20, "hppa2.0", FALSE, &bfd_hppa10_arch);
/* PA2.0 in wide mode */
/* PA2.0 in wide mode. */
static const bfd_arch_info_type bfd_hppa20w_arch =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_hppa,
bfd_mach_hppa20w, /* ??? How best to describe wide mode here? */
"hppa",
"hppa2.0w",
3,
FALSE, /* Unless we use 1.1 specific features */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_hppa20_arch,
};
N (64, bfd_mach_hppa20w, "hppa2.0w", FALSE, &bfd_hppa20_arch);
const bfd_arch_info_type bfd_hppa_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_hppa,
bfd_mach_hppa11, /* By convention PA1.1 = 11 */
"hppa",
"hppa1.1",
3,
FALSE, /* 1.1 specific features used */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_hppa20w_arch,
};
N (32, bfd_mach_hppa11, "hppa1.1", FALSE, &bfd_hppa20w_arch);

189
bfd/cpu-i386.c
View File

@ -130,173 +130,62 @@ bfd_arch_i386_onebyte_nop_fill (bfd_size_type count,
return fill;
}
#define N(BITS, MACH, NAME, PRINT, DEF, FILL, NEXT) \
{ BITS, /* Bits in a word. */ \
BITS, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_i386, \
MACH, /* Machine number. */ \
NAME, \
PRINT, \
3, /* Section alignment power. */ \
DEF, /* Default architecture version ? */ \
bfd_i386_compatible, \
bfd_default_scan, \
FILL, \
NEXT, \
0 /* Maximum instruction length. */ \
}
static const bfd_arch_info_type bfd_x64_32_nacl_arch =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_i386,
bfd_mach_x64_32_nacl,
"i386",
"i386:x64-32:nacl",
3,
FALSE,
bfd_i386_compatible,
bfd_default_scan,
bfd_arch_i386_onebyte_nop_fill,
NULL
};
N (64, bfd_mach_x64_32_nacl, "i386", "i386:x64-32:nacl",
FALSE, bfd_arch_i386_onebyte_nop_fill, NULL);
static const bfd_arch_info_type bfd_x86_64_nacl_arch =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_i386,
bfd_mach_x86_64_nacl,
"i386",
"i386:x86-64:nacl",
3,
FALSE,
bfd_i386_compatible,
bfd_default_scan,
bfd_arch_i386_onebyte_nop_fill,
&bfd_x64_32_nacl_arch
};
N (64, bfd_mach_x86_64_nacl, "i386", "i386:x86-64:nacl",
FALSE, bfd_arch_i386_onebyte_nop_fill, &bfd_x64_32_nacl_arch);
const bfd_arch_info_type bfd_i386_nacl_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_i386,
bfd_mach_i386_i386_nacl,
"i386",
"i386:nacl",
3,
TRUE,
bfd_i386_compatible,
bfd_default_scan,
bfd_arch_i386_onebyte_nop_fill,
&bfd_x86_64_nacl_arch
};
N (32, bfd_mach_i386_i386_nacl, "i386", "i386:nacl",
TRUE, bfd_arch_i386_onebyte_nop_fill, &bfd_x86_64_nacl_arch);
static const bfd_arch_info_type bfd_x64_32_arch_intel_syntax =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_i386,
bfd_mach_x64_32_intel_syntax,
"i386:intel",
"i386:x64-32:intel",
3,
FALSE,
bfd_i386_compatible,
bfd_default_scan,
bfd_arch_i386_long_nop_fill,
&bfd_i386_nacl_arch
};
N (64, bfd_mach_x64_32_intel_syntax, "i386:intel", "i386:x64-32:intel",
FALSE, bfd_arch_i386_long_nop_fill, &bfd_i386_nacl_arch);
static const bfd_arch_info_type bfd_x86_64_arch_intel_syntax =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_i386,
bfd_mach_x86_64_intel_syntax,
"i386:intel",
"i386:x86-64:intel",
3,
FALSE,
bfd_i386_compatible,
bfd_default_scan,
bfd_arch_i386_long_nop_fill,
&bfd_x64_32_arch_intel_syntax,
};
N (64, bfd_mach_x86_64_intel_syntax, "i386:intel", "i386:x86-64:intel",
FALSE, bfd_arch_i386_long_nop_fill, &bfd_x64_32_arch_intel_syntax);
static const bfd_arch_info_type bfd_i386_arch_intel_syntax =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_i386,
bfd_mach_i386_i386_intel_syntax,
"i386:intel",
"i386:intel",
3,
TRUE,
bfd_i386_compatible,
bfd_default_scan,
bfd_arch_i386_short_nop_fill,
&bfd_x86_64_arch_intel_syntax
};
N (32, bfd_mach_i386_i386_intel_syntax, "i386:intel", "i386:intel",
TRUE, bfd_arch_i386_short_nop_fill, &bfd_x86_64_arch_intel_syntax);
static const bfd_arch_info_type i8086_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address (well, not really) */
8, /* 8 bits in a byte */
bfd_arch_i386,
bfd_mach_i386_i8086,
"i8086",
"i8086",
3,
FALSE,
bfd_i386_compatible,
bfd_default_scan,
bfd_arch_i386_short_nop_fill,
&bfd_i386_arch_intel_syntax
};
N (32, bfd_mach_i386_i8086, "i8086", "i8086",
FALSE, bfd_arch_i386_short_nop_fill, &bfd_i386_arch_intel_syntax);
static const bfd_arch_info_type bfd_x64_32_arch =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_i386,
bfd_mach_x64_32,
"i386",
"i386:x64-32",
3,
FALSE,
bfd_i386_compatible,
bfd_default_scan,
bfd_arch_i386_long_nop_fill,
&i8086_arch
};
N (64, bfd_mach_x64_32, "i386", "i386:x64-32",
FALSE, bfd_arch_i386_long_nop_fill, &i8086_arch);
static const bfd_arch_info_type bfd_x86_64_arch =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_i386,
bfd_mach_x86_64,
"i386",
"i386:x86-64",
3,
FALSE,
bfd_i386_compatible,
bfd_default_scan,
bfd_arch_i386_long_nop_fill,
&bfd_x64_32_arch
};
N (64, bfd_mach_x86_64, "i386", "i386:x86-64",
FALSE, bfd_arch_i386_long_nop_fill, &bfd_x64_32_arch);
const bfd_arch_info_type bfd_i386_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_i386,
bfd_mach_i386_i386,
"i386",
"i386",
3,
TRUE,
bfd_i386_compatible,
bfd_default_scan,
bfd_arch_i386_short_nop_fill,
&bfd_x86_64_arch
};
N (32, bfd_mach_i386_i386, "i386", "i386",
TRUE, bfd_arch_i386_short_nop_fill, &bfd_x86_64_arch);

50
bfd/cpu-ia64.c
View File

@ -23,38 +23,28 @@
#include "bfd.h"
#include "libbfd.h"
#define N(BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT) \
{ \
64, /* Bits in a word. */ \
BITS_ADDR, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_ia64, \
NUMBER, \
"ia64", \
PRINT, \
3, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type bfd_ia64_elf32_arch =
{
64, /* 64 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_ia64,
bfd_mach_ia64_elf32,
"ia64",
"ia64-elf32",
3, /* log2 of section alignment */
TRUE, /* the one and only */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
N (32, bfd_mach_ia64_elf32, "ia64-elf32", FALSE, NULL);
const bfd_arch_info_type bfd_ia64_arch =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_ia64,
bfd_mach_ia64_elf64,
"ia64",
"ia64-elf64",
3, /* log2 of section alignment */
TRUE, /* the one and only */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_ia64_elf32_arch,
};
N (64, bfd_mach_ia64_elf64, "ia64-elf64", TRUE, &bfd_ia64_elf32_arch);
#include "cpu-ia64-opc.c"

38
bfd/cpu-iamcu.c
View File

@ -25,36 +25,14 @@
extern void * bfd_arch_i386_short_nop_fill (bfd_size_type, bfd_boolean,
bfd_boolean);
#define N(number, name, print, next) \
{ 32, 32, 8, bfd_arch_iamcu, number, name, print, 3, TRUE, \
bfd_default_compatible, bfd_default_scan, \
bfd_arch_i386_short_nop_fill, next, 0 }
static const bfd_arch_info_type bfd_iamcu_arch_intel_syntax =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_iamcu,
bfd_mach_i386_iamcu_intel_syntax,
"iamcu:intel",
"iamcu:intel",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_i386_short_nop_fill,
0
};
N (bfd_mach_i386_iamcu_intel_syntax, "iamcu:intel", "iamcu:intel", NULL);
const bfd_arch_info_type bfd_iamcu_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_iamcu,
bfd_mach_i386_iamcu,
"iamcu",
"iamcu",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_i386_short_nop_fill,
&bfd_iamcu_arch_intel_syntax
};
N (bfd_mach_i386_iamcu, "iamcu", "iamcu", &bfd_iamcu_arch_intel_syntax);

51
bfd/cpu-ip2k.c
View File

@ -22,36 +22,27 @@
#include "bfd.h"
#include "libbfd.h"
#define N(NUMBER, PRINT, DEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
16, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_ip2k, \
NUMBER, \
"ip2k", \
PRINT, \
1, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type bfd_ip2k_nonext_arch =
{
32, /* Bits per word - not really true. */
16, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_ip2k, /* Architecture. */
bfd_mach_ip2022, /* Machine. */
"ip2k", /* Architecture name. */
"ip2022", /* Machine name. */
1, /* Section align power. */
FALSE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
};
N (bfd_mach_ip2022, "ip2022", FALSE, NULL);
const bfd_arch_info_type bfd_ip2k_arch =
{
32, /* Bits per word - not really true. */
16, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_ip2k, /* Architecture. */
bfd_mach_ip2022ext, /* Machine. */
"ip2k", /* Architecture name. */
"ip2022ext", /* Machine name. */
1, /* Section align power. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
& bfd_ip2k_nonext_arch /* Next in list. */
};
N (bfd_mach_ip2022ext, "ip2022ext", TRUE, & bfd_ip2k_nonext_arch);

53
bfd/cpu-iq2000.c
View File

@ -22,38 +22,27 @@
#include "bfd.h"
#include "libbfd.h"
static const bfd_arch_info_type arch_info_struct[] =
{
{
32, /* bits per word */
32, /* bits per address */
8, /* bits per byte */
bfd_arch_iq2000, /* architecture */
bfd_mach_iq10, /* machine */
"iq2000", /* architecture name */
"iq10", /* printable name */
3, /* section align power */
FALSE, /* the default ? */
bfd_default_compatible, /* architecture comparison fn */
bfd_default_scan, /* string to architecture convert fn */
bfd_arch_default_fill, /* Default fill. */
NULL /* next in list */
#define N(NUMBER, PRINT, DEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_iq2000, \
NUMBER, \
"iq2000", \
PRINT, \
3, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
};
static const bfd_arch_info_type arch_info_struct =
N (bfd_mach_iq10, "iq10", FALSE, NULL);
const bfd_arch_info_type bfd_iq2000_arch =
{
32, /* bits per word */
32, /* bits per address */
8, /* bits per byte */
bfd_arch_iq2000, /* architecture */
bfd_mach_iq2000, /* machine */
"iq2000", /* architecture name */
"iq2000", /* printable name */
3, /* section align power */
TRUE, /* the default ? */
bfd_default_compatible, /* architecture comparison fn */
bfd_default_scan, /* string to architecture convert fn */
bfd_arch_default_fill, /* Default fill. */
&arch_info_struct[0], /* next in list */
};
N (bfd_mach_iq2000, "iq2000", TRUE, &arch_info_struct);

38
bfd/cpu-k1om.c
View File

@ -25,36 +25,14 @@
extern void * bfd_arch_i386_short_nop_fill (bfd_size_type, bfd_boolean,
bfd_boolean);
#define N(number, name, print, next) \
{ 64, 64, 8, bfd_arch_k1om, number, name, print, 3, TRUE, \
bfd_default_compatible, bfd_default_scan, \
bfd_arch_i386_short_nop_fill, next, 9 }
static const bfd_arch_info_type bfd_k1om_arch_intel_syntax =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_k1om,
bfd_mach_k1om_intel_syntax,
"k1om:intel",
"k1om:intel",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_i386_short_nop_fill,
0
};
N (bfd_mach_k1om_intel_syntax, "k1om:intel", "k1om:intel", NULL);
const bfd_arch_info_type bfd_k1om_arch =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_k1om,
bfd_mach_k1om,
"k1om",
"k1om",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_i386_short_nop_fill,
&bfd_k1om_arch_intel_syntax
};
N (bfd_mach_k1om, "k1om", "k1om", &bfd_k1om_arch_intel_syntax);

37
bfd/cpu-l1om.c
View File

@ -25,36 +25,13 @@
extern void * bfd_arch_i386_short_nop_fill (bfd_size_type, bfd_boolean,
bfd_boolean);
#define N(number, name, print, next) \
{ 64, 64, 8, bfd_arch_l1om, number, name, print, 3, TRUE, \
bfd_default_compatible, bfd_default_scan, \
bfd_arch_i386_short_nop_fill, next, 0 }
static const bfd_arch_info_type bfd_l1om_arch_intel_syntax =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_l1om,
bfd_mach_l1om_intel_syntax,
"l1om:intel",
"l1om:intel",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_i386_short_nop_fill,
0
};
N (bfd_mach_l1om_intel_syntax, "l1om:intel", "l1om:intel", NULL);
const bfd_arch_info_type bfd_l1om_arch =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_l1om,
bfd_mach_l1om,
"l1om",
"l1om",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_i386_short_nop_fill,
&bfd_l1om_arch_intel_syntax
};
N (bfd_mach_l1om, "l1om", "l1om", &bfd_l1om_arch_intel_syntax);

27
bfd/cpu-lm32.c
View File

@ -25,17 +25,18 @@
const bfd_arch_info_type bfd_lm32_arch =
{
32, /* Bits in word. */
32, /* Bits in address. */
8, /* Bits in byte. */
bfd_arch_lm32, /* Enum bfd_architecture. */
bfd_mach_lm32, /* Machine number. */
"lm32", /* Architecture name. */
"lm32", /* Printable name. */
4, /* Alignment. */
TRUE, /* Is this the default machine for the target. */
bfd_default_compatible, /* Function callback to test if two files have compatible machines. */
bfd_default_scan,
bfd_arch_default_fill,
NULL /* Next. */
32, /* Bits in word. */
32, /* Bits in address. */
8, /* Bits in byte. */
bfd_arch_lm32, /* Enum bfd_architecture. */
bfd_mach_lm32, /* Machine number. */
"lm32", /* Architecture name. */
"lm32", /* Printable name. */
4, /* Alignment. */
TRUE, /* Is this the default machine for the target. */
bfd_default_compatible, /* Function callback to test if two files have compatible machines. */
bfd_default_scan,
bfd_arch_default_fill,
NULL, /* Next. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

31
bfd/cpu-m10200.c
View File

@ -23,18 +23,19 @@
#include "libbfd.h"
const bfd_arch_info_type bfd_mn10200_arch =
{
16, /* 16 bits in a word */
24, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_mn10200,
200,
"mn10200",
"mn10200",
2,
TRUE, /* the one and only */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
{
16, /* Bits in a word. */
24, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_mn10200,
200,
"mn10200",
"mn10200",
2,
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

66
bfd/cpu-m10300.c
View File

@ -22,53 +22,29 @@
#include "bfd.h"
#include "libbfd.h"
#define N(NUMBER, NAME, PRINT, DEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_mn10300, \
NUMBER, \
NAME, \
PRINT, \
2, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type bfd_am33_2_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_mn10300,
332,
"am33_2",
"am33-2",
2,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
N (bfd_mach_am33_2, "am33_2", "am33-2", FALSE, NULL);
const bfd_arch_info_type bfd_am33_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_mn10300,
330,
"am33",
"am33",
2,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_am33_2_arch,
};
N (bfd_mach_am33, "am33", "am33", FALSE, &bfd_am33_2_arch);
const bfd_arch_info_type bfd_mn10300_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_mn10300,
300,
"mn10300",
"mn10300",
2,
TRUE, /* the one and only */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_am33_arch,
};
N (bfd_mach_mn10300, "mn10300", "mn10300", TRUE, &bfd_am33_arch);

41
bfd/cpu-m32c.c
View File

@ -35,38 +35,13 @@ m32c_scan (const bfd_arch_info_type * info, const char * string)
return bfd_default_scan (info, string);
}
static const bfd_arch_info_type arch_info_struct[] =
{
{
32, /* bits per word */
32, /* bits per address */
8, /* bits per byte */
bfd_arch_m32c, /* architecture */
bfd_mach_m32c, /* machine */
"m32c", /* architecture name */
"m32c", /* printable name */
3, /* section align power */
FALSE, /* the default ? */
bfd_default_compatible, /* architecture comparison fn */
m32c_scan, /* string to architecture convert fn */
bfd_arch_default_fill, /* Default fill. */
NULL /* next in list */
},
};
#define N(number, print, align, default, next) \
{ 32, 32, 8, bfd_arch_m32c, number, "m32c", print, align, default, \
bfd_default_compatible, m32c_scan, bfd_arch_default_fill, next, 0 }
static const bfd_arch_info_type arch_info_struct =
N (bfd_mach_m32c, "m32c", 3, FALSE, NULL);
const bfd_arch_info_type bfd_m32c_arch =
{
32, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_m32c, /* Architecture. */
bfd_mach_m16c, /* Machine. */
"m32c", /* Architecture name. */
"m16c", /* Printable name. */
4, /* Section align power. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
m32c_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
&arch_info_struct[0], /* Next in list. */
};
N (bfd_mach_m16c, "m16c", 4, TRUE, &arch_info_struct);

4
bfd/cpu-m32r.c
View File

@ -23,8 +23,8 @@
#include "libbfd.h"
#define N(number, print, default, next) \
{ 32, 32, 8, bfd_arch_m32r, number, "m32r", print, 4, default, \
bfd_default_compatible, bfd_default_scan, bfd_arch_default_fill, next }
{ 32, 32, 8, bfd_arch_m32r, number, "m32r", print, 4, default, \
bfd_default_compatible, bfd_default_scan, bfd_arch_default_fill, next, 0 }
#define M32R2_NEXT & arch_info_struct [1]
#define NEXT & arch_info_struct [0]

27
bfd/cpu-m68hc11.c
View File

@ -24,17 +24,18 @@
const bfd_arch_info_type bfd_m68hc11_arch =
{
16, /* 16 bits in a word */
16, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_m68hc11,
0,
"m68hc11",
"m68hc11",
4, /* section alignment power */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
16, /* Bits in a word. */
16, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_m68hc11,
0,
"m68hc11",
"m68hc11",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

51
bfd/cpu-m68hc12.c
View File

@ -22,36 +22,27 @@
#include "bfd.h"
#include "libbfd.h"
#define N(NUMBER, PRINT, DEFAULT, NEXT) \
{ \
16, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_m68hc12, \
NUMBER, \
"m68hc12", \
PRINT, \
4, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type bfd_m68hc12s_arch =
{
16, /* 16 bits in a word */
32, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_m68hc12,
bfd_mach_m6812s,
"m68hc12:HCS12",
"m68hc12",
4, /* section alignment power */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
N (bfd_mach_m6812s, "m68hc12:HCS12", FALSE, NULL);
const bfd_arch_info_type bfd_m68hc12_arch =
{
16, /* 16 bits in a word */
32, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_m68hc12,
0,
"m68hc12",
"m68hc12",
4, /* section alignment power */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_m68hc12s_arch,
};
N (bfd_mach_m6812_default, "m68hc12", TRUE, &bfd_m68hc12s_arch);

2
bfd/cpu-m68k.c
View File

@ -30,7 +30,7 @@ bfd_m68k_compatible (const bfd_arch_info_type *a,
#define N(name, print,d,next) \
{ 32, 32, 8, bfd_arch_m68k, name, "m68k",print,2,d,bfd_m68k_compatible, \
bfd_default_scan, bfd_arch_default_fill, next, }
bfd_default_scan, bfd_arch_default_fill, next, 0 }
static const bfd_arch_info_type arch_info_struct[] =
{

27
bfd/cpu-m9s12x.c
View File

@ -24,18 +24,19 @@
const bfd_arch_info_type bfd_m9s12x_arch =
{
16, /* 16 bits in a word. */
32, /* 16 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_m9s12x,
0,
"m9s12x",
"m9s12x",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
16, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_m9s12x,
0,
"m9s12x",
"m9s12x",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

27
bfd/cpu-m9s12xg.c
View File

@ -24,18 +24,19 @@
const bfd_arch_info_type bfd_m9s12xg_arch =
{
16, /* 16 bits in a word. */
32, /* 16 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_m9s12xg,
0,
"m9s12xg",
"m9s12xg",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
16, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_m9s12xg,
0,
"m9s12xg",
"m9s12xg",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

25
bfd/cpu-mcore.c
View File

@ -24,17 +24,18 @@
const bfd_arch_info_type bfd_mcore_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_mcore, /* Architecture */
0, /* Machine number - 0 for now */
"MCore", /* Architecture name */
"MCore", /* Printable name */
3, /* Section align power */
TRUE, /* Is this the default architecture ? */
bfd_default_compatible, /* Architecture comparison function */
bfd_default_scan, /* String to architecture conversion */
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_mcore, /* Architecture number. */
0, /* Machine number - 0 for now. */
"MCore", /* Architecture name. */
"MCore", /* Machine name. */
3, /* Section align power. */
TRUE, /* Is this the default architecture ? */
bfd_default_compatible, /* Architecture comparison function. */
bfd_default_scan, /* String to architecture conversion. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list */
NULL, /* Next in list */
0 /* Maximum offset of a reloc from the start of an insn. */
};

4
bfd/cpu-mep.c
View File

@ -22,8 +22,8 @@
#include "libbfd.h"
#define MA(x, n, def, y) { 32, 32, 8, bfd_arch_mep, x, "mep", n, \
2, def, bfd_default_compatible, bfd_default_scan, \
bfd_arch_default_fill, y }
2, def, bfd_default_compatible, bfd_default_scan, \
bfd_arch_default_fill, y, 0 }
static const bfd_arch_info_type bfd_c5_arch = MA (bfd_mach_mep_c5, "c5", FALSE, NULL);
static const bfd_arch_info_type bfd_h1_arch = MA (bfd_mach_mep_h1, "h1", FALSE, & bfd_c5_arch);

3
bfd/cpu-metag.c
View File

@ -37,5 +37,6 @@ const bfd_arch_info_type bfd_metag_arch =
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

11
bfd/cpu-microblaze.c
View File

@ -25,10 +25,10 @@
const bfd_arch_info_type bfd_microblaze_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_microblaze, /* Architecture. */
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_microblaze, /* Architecture number. */
0, /* Machine number - 0 for now. */
"microblaze", /* Architecture name. */
"MicroBlaze", /* Printable name. */
@ -37,5 +37,6 @@ const bfd_arch_info_type bfd_microblaze_arch =
bfd_default_compatible, /* Architecture comparison function. */
bfd_default_scan, /* String to architecture conversion. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

25
bfd/cpu-mips.c
View File

@ -43,9 +43,9 @@ mips_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
#define N(BITS_WORD, BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT) \
{ \
BITS_WORD, /* bits in a word */ \
BITS_ADDR, /* bits in an address */ \
8, /* 8 bits in a byte */ \
BITS_WORD, /* Bits in a word. */ \
BITS_ADDR, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_mips, \
NUMBER, \
"mips", \
@ -56,6 +56,7 @@ mips_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
enum
@ -150,19 +151,19 @@ static const bfd_arch_info_type arch_info_struct[] =
N (64, 64, bfd_mach_mipsisa64r5,"mips:isa64r5", FALSE, NN(I_mipsisa64r5)),
N (64, 64, bfd_mach_mipsisa64r6,"mips:isa64r6", FALSE, NN(I_mipsisa64r6)),
N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, NN(I_sb1)),
N (64, 64, bfd_mach_mips_loongson_2e, "mips:loongson_2e", FALSE, NN(I_loongson_2e)),
N (64, 64, bfd_mach_mips_loongson_2f, "mips:loongson_2f", FALSE, NN(I_loongson_2f)),
N (64, 64, bfd_mach_mips_loongson_2e, "mips:loongson_2e", FALSE, NN(I_loongson_2e)),
N (64, 64, bfd_mach_mips_loongson_2f, "mips:loongson_2f", FALSE, NN(I_loongson_2f)),
N (64, 64, bfd_mach_mips_gs464, "mips:gs464", FALSE, NN(I_gs464)),
N (64, 64, bfd_mach_mips_gs464e, "mips:gs464e", FALSE, NN(I_gs464e)),
N (64, 64, bfd_mach_mips_gs264e, "mips:gs264e", FALSE, NN(I_gs264e)),
N (64, 64, bfd_mach_mips_gs464e, "mips:gs464e", FALSE, NN(I_gs464e)),
N (64, 64, bfd_mach_mips_gs264e, "mips:gs264e", FALSE, NN(I_gs264e)),
N (64, 64, bfd_mach_mips_octeon,"mips:octeon", FALSE, NN(I_mipsocteon)),
N (64, 64, bfd_mach_mips_octeonp,"mips:octeon+", FALSE, NN(I_mipsocteonp)),
N (64, 64, bfd_mach_mips_octeon2,"mips:octeon2", FALSE, NN(I_mipsocteon2)),
N (64, 64, bfd_mach_mips_octeon3, "mips:octeon3", FALSE, NN(I_mipsocteon3)),
N (64, 64, bfd_mach_mips_xlr, "mips:xlr", FALSE, NN(I_xlr)),
N (64, 64, bfd_mach_mips_octeonp,"mips:octeon+", FALSE, NN(I_mipsocteonp)),
N (64, 64, bfd_mach_mips_octeon2,"mips:octeon2", FALSE, NN(I_mipsocteon2)),
N (64, 64, bfd_mach_mips_octeon3, "mips:octeon3", FALSE, NN(I_mipsocteon3)),
N (64, 64, bfd_mach_mips_xlr, "mips:xlr", FALSE, NN(I_xlr)),
N (32, 32, bfd_mach_mips_interaptiv_mr2, "mips:interaptiv-mr2", FALSE,
NN(I_interaptiv_mr2)),
N (64, 64, bfd_mach_mips_micromips,"mips:micromips",FALSE,0)
N (64, 64, bfd_mach_mips_micromips, "mips:micromips", FALSE, NULL)
};
/* The default architecture is mips:3000, but with a machine number of

31
bfd/cpu-mmix.c
View File

@ -25,19 +25,20 @@
const bfd_arch_info_type
bfd_mmix_arch =
{
64, /* 64 bits in a word. */
64, /* 64 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_mmix, /* Architecture. */
0, /* Machine number - 0 for now. */
/* Sorry, these are by custom and creeping assumption lower-case. */
"mmix", /* Architecture name. */
"mmix", /* Printable name. */
3, /* Section align power. */
TRUE, /* This is the default architecture. */
bfd_default_compatible, /* Architecture comparison function. */
bfd_default_scan, /* String to architecture conversion. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
{
64, /* Bits in a word. */
64, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_mmix, /* Architecture number. */
0, /* Machine number - 0 for now. */
/* Sorry, these are by custom and creeping assumption lower-case. */
"mmix", /* Architecture name. */
"mmix", /* Printable name. */
3, /* Section align power. */
TRUE, /* This is the default architecture. */
bfd_default_compatible, /* Architecture comparison function. */
bfd_default_scan, /* String to architecture conversion. */
bfd_arch_default_fill, /* Default fill. */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

31
bfd/cpu-moxie.c
View File

@ -24,18 +24,19 @@
const bfd_arch_info_type bfd_moxie_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_moxie, /* enum bfd_architecture arch. */
bfd_mach_moxie,
"moxie", /* Arch name. */
"moxie", /* Printable name. */
2, /* Unsigned int section alignment power. */
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
{
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_moxie, /* Architecture Number. */
bfd_mach_moxie, /* Machine number. */
"moxie", /* Arch name. */
"moxie", /* Printable name. */
2, /* Section alignment power. */
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

7
bfd/cpu-msp430.c
View File

@ -43,9 +43,9 @@ compatible (const bfd_arch_info_type * a,
#define N(addr_bits, machine, print, default, next) \
{ \
16, /* 16 bits in a word. */ \
16, /* Bits in a word. */ \
addr_bits, /* Bits in an address. */ \
8, /* 8 bits in a byte. */ \
8, /* Bits in a byte. */ \
bfd_arch_msp430, \
machine, /* Machine number. */ \
"msp430", /* Architecture name. */ \
@ -55,7 +55,8 @@ compatible (const bfd_arch_info_type * a,
compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
next \
next, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_struct[] =

69
bfd/cpu-mt.c
View File

@ -22,54 +22,31 @@
#include "bfd.h"
#include "libbfd.h"
const bfd_arch_info_type arch_info_struct[] =
#define N(NUMBER, PRINT, DEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_mt, \
NUMBER, \
"mt", \
PRINT, \
1, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type arch_info_struct[2] =
{
{
32, /* Bits per word - not really true. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_mt, /* Architecture. */
bfd_mach_mrisc2, /* Machine. */
"mt", /* Architecture name. */
"ms1-003", /* Printable name. */
1, /* Section align power. */
FALSE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
&arch_info_struct[1] /* Next in list. */
},
{
32, /* Bits per word - not really true. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_mt, /* Architecture. */
bfd_mach_ms2, /* Machine. */
"mt", /* Architecture name. */
"ms2", /* Printable name. */
1, /* Section align power. */
FALSE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
},
N (bfd_mach_mrisc2, "ms1-003", FALSE, arch_info_struct + 1),
N (bfd_mach_ms2, "ms2", FALSE, NULL)
};
const bfd_arch_info_type bfd_mt_arch =
{
32, /* Bits per word - not really true. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_mt, /* Architecture. */
bfd_mach_ms1, /* Machine. */
"mt", /* Architecture name. */
"ms1", /* Printable name. */
1, /* Section align power. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
&arch_info_struct[0] /* Next in list. */
};
N (bfd_mach_ms1, "ms1", TRUE, arch_info_struct);

2
bfd/cpu-nds32.c
View File

@ -26,7 +26,7 @@
#define N(number, print, default, next) \
{32, 32, 8, bfd_arch_nds32, number, "nds32", print, 4, default, \
bfd_default_compatible, bfd_default_scan, bfd_arch_default_fill, next }
bfd_default_compatible, bfd_default_scan, bfd_arch_default_fill, next, 0 }
#define NEXT &arch_info_struct[0]
#define NDS32V2_NEXT &arch_info_struct[1]

11
bfd/cpu-nfp.c
View File

@ -50,13 +50,12 @@ bfd_nfp_compatible (const bfd_arch_info_type * a,
bfd_nfp_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
next \
next, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_struct[] =
{
N (bfd_mach_nfp3200, "NFP-32xx", FALSE, NULL)
};
static const bfd_arch_info_type arch_info_struct =
N (bfd_mach_nfp3200, "NFP-32xx", FALSE, NULL);
const bfd_arch_info_type bfd_nfp_arch =
N (bfd_mach_nfp6000, "NFP-6xxx", TRUE, &arch_info_struct[0]);
N (bfd_mach_nfp6000, "NFP-6xxx", TRUE, &arch_info_struct);

19
bfd/cpu-nios2.c
View File

@ -44,11 +44,11 @@ nios2_compatible (const bfd_arch_info_type *a,
return a;
}
#define N(BITS_WORD, BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT) \
#define N(NUMBER, PRINT, DEFAULT, NEXT) \
{ \
BITS_WORD, /* bits in a word */ \
BITS_ADDR, /* bits in an address */ \
8, /* 8 bits in a byte */ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_nios2, \
NUMBER, \
"nios2", \
@ -58,17 +58,18 @@ nios2_compatible (const bfd_arch_info_type *a,
nios2_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
#define NIOS2R1_NEXT &arch_info_struct[0]
#define NIOS2R2_NEXT &arch_info_struct[1]
static const bfd_arch_info_type arch_info_struct[] =
static const bfd_arch_info_type arch_info_struct[2] =
{
N (32, 32, bfd_mach_nios2r1, "nios2:r1", FALSE, NIOS2R2_NEXT),
N (32, 32, bfd_mach_nios2r2, "nios2:r2", FALSE, NULL),
N (bfd_mach_nios2r1, "nios2:r1", FALSE, NIOS2R2_NEXT),
N (bfd_mach_nios2r2, "nios2:r2", FALSE, NULL),
};
const bfd_arch_info_type bfd_nios2_arch =
N (32, 32, 0, "nios2", TRUE, NIOS2R1_NEXT);
N (bfd_mach_nios2, "nios2", TRUE, NIOS2R1_NEXT);

8
bfd/cpu-ns32k.c
View File

@ -26,16 +26,16 @@
#include "ns32k.h"
#define N(machine, printable, d, next) \
{ 32, 32, 8, bfd_arch_ns32k, machine, "ns32k",printable,3,d, \
bfd_default_compatible,bfd_default_scan,bfd_arch_default_fill,next, }
{ 32, 32, 8, bfd_arch_ns32k, machine, "ns32k",printable,3,d, \
bfd_default_compatible,bfd_default_scan,bfd_arch_default_fill,next, 0 }
static const bfd_arch_info_type arch_info_struct[] =
{
N(32532,"ns32k:32532",TRUE, 0), /* The word ns32k will match this too. */
N (32532, "ns32k:32532", TRUE, 0), /* The word ns32k will match this too. */
};
const bfd_arch_info_type bfd_ns32k_arch =
N(32032,"ns32k:32032",FALSE, &arch_info_struct[0]);
N (32032, "ns32k:32032", FALSE, &arch_info_struct[0]);
bfd_vma
_bfd_ns32k_get_displacement (bfd_byte *buffer, int size)

54
bfd/cpu-or1k.c
View File

@ -21,39 +21,27 @@
#include "bfd.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_or1k_arch;
const bfd_arch_info_type bfd_or1knd_arch;
#define N(NUMBER, PRINT, DEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_or1k, \
NUMBER, \
PRINT, \
PRINT, \
4, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type bfd_or1k_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_or1k,
bfd_mach_or1k,
"or1k",
"or1k",
4,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_or1knd_arch,
};
const bfd_arch_info_type bfd_or1knd_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_or1k,
bfd_mach_or1knd,
"or1knd",
"or1knd",
4,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
};
N (bfd_mach_or1knd, "or1knd", FALSE, NULL);
const bfd_arch_info_type bfd_or1k_arch =
N (bfd_mach_or1k, "or1k", TRUE, &bfd_or1knd_arch);

31
bfd/cpu-pdp11.c
View File

@ -23,19 +23,20 @@
#include "libbfd.h"
const bfd_arch_info_type bfd_pdp11_arch =
{
16, /* 16 bits in a word */
16, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_pdp11,
0, /* only 1 machine */
"pdp11",
"pdp11",
1, /* alignment = 16 bit */
TRUE, /* the one and only */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
{
16, /* Bits in a word. */
16, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_pdp11,
0, /* Only 1 machine. */
"pdp11",
"pdp11",
1, /* Alignment = 16 bit. */
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

15
bfd/cpu-pj.c
View File

@ -25,17 +25,18 @@
const bfd_arch_info_type bfd_pj_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_pj,
0,
"pj", /* arch_name */
"pj", /* printable name */
"pj", /* Arch_name. */
"pj", /* Printable name. */
1,
TRUE, /* the default machine */
TRUE, /* The default machine. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

9
bfd/cpu-plugin.c
View File

@ -24,9 +24,9 @@
const bfd_arch_info_type bfd_plugin_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_plugin,
0, /* Only 1 machine. */
"plugin",
@ -36,5 +36,6 @@ const bfd_arch_info_type bfd_plugin_arch =
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

401
bfd/cpu-powerpc.c
View File

@ -48,375 +48,74 @@ powerpc_compatible (const bfd_arch_info_type *a,
/*NOTREACHED*/
}
#define N(BITS, NUMBER, PRINT, DEFAULT, NEXT) \
{ \
BITS, /* Bits in a word. */ \
BITS, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_powerpc, \
NUMBER, \
"powerpc", \
PRINT, \
3, /* Section alignment power. */ \
DEFAULT, \
powerpc_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type bfd_powerpc_archs[] =
{
#if BFD_DEFAULT_TARGET_SIZE == 64
/* Default arch must come first. */
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc64,
"powerpc",
"powerpc:common64",
3,
TRUE, /* default for 64 bit target */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[1]
},
/* Default for 64 bit target. */
N (64, bfd_mach_ppc64, "powerpc:common64", TRUE, bfd_powerpc_archs + 1),
/* elf32-ppc:ppc_elf_object_p relies on the default 32 bit arch
being immediately after the 64 bit default. */
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc, /* for the POWER/PowerPC common architecture */
"powerpc",
"powerpc:common",
3,
FALSE,
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[2],
},
N (32, bfd_mach_ppc, "powerpc:common", FALSE, bfd_powerpc_archs + 2),
#else
/* Default arch must come first. */
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc, /* for the POWER/PowerPC common architecture */
"powerpc",
"powerpc:common",
3,
TRUE, /* default for 32 bit target */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[1],
},
N (32, bfd_mach_ppc, "powerpc:common", TRUE, bfd_powerpc_archs + 1),
/* elf64-ppc:ppc64_elf_object_p relies on the default 64 bit arch
being immediately after the 32 bit default. */
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc64,
"powerpc",
"powerpc:common64",
3,
FALSE,
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[2]
},
N (64, bfd_mach_ppc64, "powerpc:common64", FALSE, bfd_powerpc_archs + 2),
#endif
N (32, bfd_mach_ppc_603, "powerpc:603", FALSE, bfd_powerpc_archs + 3),
N (32, bfd_mach_ppc_ec603e, "powerpc:EC603e", FALSE, bfd_powerpc_archs + 4),
N (32, bfd_mach_ppc_604, "powerpc:604", FALSE, bfd_powerpc_archs + 5),
N (32, bfd_mach_ppc_403, "powerpc:403", FALSE, bfd_powerpc_archs + 6),
N (32, bfd_mach_ppc_601, "powerpc:601", FALSE, bfd_powerpc_archs + 7),
N (64, bfd_mach_ppc_620, "powerpc:620", FALSE, bfd_powerpc_archs + 8),
N (64, bfd_mach_ppc_630, "powerpc:630", FALSE, bfd_powerpc_archs + 9),
N (64, bfd_mach_ppc_a35, "powerpc:a35", FALSE, bfd_powerpc_archs + 10),
N (64, bfd_mach_ppc_rs64ii, "powerpc:rs64ii", FALSE, bfd_powerpc_archs + 11),
N (64, bfd_mach_ppc_rs64iii, "powerpc:rs64iii", FALSE, bfd_powerpc_archs + 12),
N (32, bfd_mach_ppc_7400, "powerpc:7400", FALSE, bfd_powerpc_archs + 13),
N (32, bfd_mach_ppc_e500, "powerpc:e500", FALSE, bfd_powerpc_archs + 14),
N (32, bfd_mach_ppc_e500mc, "powerpc:e500mc", FALSE, bfd_powerpc_archs + 15),
N (64, bfd_mach_ppc_e500mc64, "powerpc:e500mc64",FALSE, bfd_powerpc_archs + 16),
N (32, bfd_mach_ppc_860, "powerpc:MPC8XX", FALSE, bfd_powerpc_archs + 17),
N (32, bfd_mach_ppc_750, "powerpc:750", FALSE, bfd_powerpc_archs + 18),
N (32, bfd_mach_ppc_titan, "powerpc:titan", FALSE, bfd_powerpc_archs + 19),
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_603,
"powerpc",
"powerpc:603",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[3]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_ec603e,
"powerpc",
"powerpc:EC603e",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[4]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_604,
"powerpc",
"powerpc:604",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[5]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_403,
"powerpc",
"powerpc:403",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[6]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_601,
"powerpc",
"powerpc:601",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[7]
},
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_620,
"powerpc",
"powerpc:620",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[8]
},
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_630,
"powerpc",
"powerpc:630",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[9]
},
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_a35,
"powerpc",
"powerpc:a35",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[10]
},
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_rs64ii,
"powerpc",
"powerpc:rs64ii",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[11]
},
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_rs64iii,
"powerpc",
"powerpc:rs64iii",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[12]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_7400,
"powerpc",
"powerpc:7400",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[13]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_e500,
"powerpc",
"powerpc:e500",
3,
FALSE,
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[14]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_e500mc,
"powerpc",
"powerpc:e500mc",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[15]
},
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_e500mc64,
"powerpc",
"powerpc:e500mc64",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[16]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_860,
"powerpc",
"powerpc:MPC8XX",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[17]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_750,
"powerpc",
"powerpc:750",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[18]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_titan,
"powerpc",
"powerpc:titan",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[19]
},
{
16, /* 16 or 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
16, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_powerpc,
bfd_mach_ppc_vle,
"powerpc",
"powerpc:vle",
3,
FALSE, /* not the default */
FALSE, /* Not the default. */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[20]
bfd_powerpc_archs + 20,
0 /* Maximum offset of a reloc from the start of an insn. */
},
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_e5500,
"powerpc",
"powerpc:e5500",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_powerpc_archs[21]
},
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_powerpc,
bfd_mach_ppc_e6500,
"powerpc",
"powerpc:e6500",
3,
FALSE, /* not the default */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0
}
N (64, bfd_mach_ppc_e5500, "powerpc:e5500", FALSE, bfd_powerpc_archs + 21),
N (64, bfd_mach_ppc_e6500, "powerpc:e6500", FALSE, NULL)
};

3
bfd/cpu-pru.c
View File

@ -37,7 +37,8 @@
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type bfd_pru_arch = N (32, 32, 0, "pru", TRUE, NULL);

15
bfd/cpu-riscv.c
View File

@ -39,11 +39,11 @@ riscv_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
return a;
}
#define N(BITS_WORD, BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT) \
#define N(BITS, NUMBER, PRINT, DEFAULT, NEXT) \
{ \
BITS_WORD, /* bits in a word */ \
BITS_ADDR, /* bits in an address */ \
8, /* 8 bits in a byte */ \
BITS, /* Bits in a word. */ \
BITS, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_riscv, \
NUMBER, \
"riscv", \
@ -54,6 +54,7 @@ riscv_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */\
}
/* This enum must be kept in the same order as arch_info_struct. */
@ -69,11 +70,11 @@ enum
and each entry except the last should end with NN (my enum value). */
static const bfd_arch_info_type arch_info_struct[] =
{
N (64, 64, bfd_mach_riscv64, "riscv:rv64", FALSE, NN (I_riscv64)),
N (32, 32, bfd_mach_riscv32, "riscv:rv32", FALSE, 0)
N (64, bfd_mach_riscv64, "riscv:rv64", FALSE, NN (I_riscv64)),
N (32, bfd_mach_riscv32, "riscv:rv32", FALSE, NULL)
};
/* The default architecture is riscv:rv64. */
const bfd_arch_info_type bfd_riscv_arch =
N (64, 64, 0, "riscv", TRUE, &arch_info_struct[0]);
N (64, 0, "riscv", TRUE, &arch_info_struct[0]);

3
bfd/cpu-rl78.c
View File

@ -36,5 +36,6 @@ const bfd_arch_info_type bfd_rl78_arch =
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

84
bfd/cpu-rs6000.c
View File

@ -46,68 +46,30 @@ rs6000_compatible (const bfd_arch_info_type *a,
/*NOTREACHED*/
}
static const bfd_arch_info_type arch_info_struct[] =
{
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_rs6000,
bfd_mach_rs6k_rs1,
"rs6000",
"rs6000:rs1",
3,
FALSE, /* not the default */
rs6000_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[1]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_rs6000,
bfd_mach_rs6k_rsc,
"rs6000",
"rs6000:rsc",
3,
FALSE, /* not the default */
rs6000_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[2]
},
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_rs6000,
bfd_mach_rs6k_rs2,
"rs6000",
"rs6000:rs2",
3,
FALSE, /* not the default */
rs6000_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0
#define N(NUMBER, PRINT, DEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_rs6000, \
NUMBER, \
"rs6000", \
PRINT, \
3, /* Section alignment power. */ \
DEFAULT, \
rs6000_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_struct[3] =
{
N (bfd_mach_rs6k_rs1, "rs6000:rs1", FALSE, arch_info_struct + 1),
N (bfd_mach_rs6k_rsc, "rs6000:rsc", FALSE, arch_info_struct + 2),
N (bfd_mach_rs6k_rs2, "rs6000:rs2", FALSE, NULL)
};
const bfd_arch_info_type bfd_rs6000_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_rs6000,
bfd_mach_rs6k, /* POWER common architecture */
"rs6000",
"rs6000:6000",
3,
TRUE, /* the default */
rs6000_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[0]
};
N (bfd_mach_rs6k, "rs6000:6000", TRUE, arch_info_struct + 0);

72
bfd/cpu-rx.c
View File

@ -22,68 +22,18 @@
#include "bfd.h"
#include "libbfd.h"
static const bfd_arch_info_type arch_info_struct[] =
#define N(mach, name, align, def, next) \
{ 32, 32, 8, bfd_arch_rx, mach, "rx", name, align, def, \
bfd_default_compatible, bfd_default_scan, \
bfd_arch_default_fill, next, 0 }
static const bfd_arch_info_type arch_info_struct[3] =
{
{
32, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_rx, /* Architecture. */
bfd_mach_rx, /* Machine. */
"rx", /* Architecture name. */
"rx", /* Printable name. */
3, /* Section align power. */
FALSE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
&arch_info_struct[1] /* Next in list. */
},
{
32, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_rx, /* Architecture. */
bfd_mach_rx_v2, /* Machine. */
"rx:v2", /* Architecture name. */
"rx:v2", /* Printable name. */
3, /* Section align power. */
FALSE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
&arch_info_struct[2] /* Next in list. */
},
{
32, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_rx, /* Architecture. */
bfd_mach_rx_v3, /* Machine. */
"rx:v3", /* Architecture name. */
"rx:v3", /* Printable name. */
3, /* Section align power. */
FALSE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
},
N (bfd_mach_rx, "rx", 3, FALSE, arch_info_struct + 1),
N (bfd_mach_rx_v2, "rx:v2", 3, FALSE, arch_info_struct + 2),
N (bfd_mach_rx_v3, "rx:v3", 3, FALSE, NULL)
};
const bfd_arch_info_type bfd_rx_arch =
{
32, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_rx, /* Architecture. */
bfd_mach_rx, /* Machine. */
"rx", /* Architecture name. */
"rx", /* Printable name. */
4, /* Section align power. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
& arch_info_struct[0], /* Next in list. */
};
N (bfd_mach_rx, "rx", 4, TRUE, arch_info_struct + 0);

27
bfd/cpu-s12z.c
View File

@ -24,18 +24,19 @@
const bfd_arch_info_type bfd_s12z_arch =
{
16, /* 16 bits in a word. */
24, /* 24 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_s12z,
0,
"s12z",
"s12z",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
16, /* Bits in a word. */
24, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_s12z,
0,
"s12z",
"s12z",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

11
bfd/cpu-s390.c
View File

@ -25,19 +25,20 @@
#define N(bits, number, print, is_default, next) \
{ \
bits, /* bits in a word */ \
bits, /* bits in an address */ \
8, /* bits in a byte */ \
bits, /* Bits in a word. */ \
bits, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_s390, \
number, \
"s390", \
print, \
3, /* section alignment power */ \
3, /* Section alignment power */ \
is_default, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
next \
next, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
#if BFD_DEFAULT_TARGET_SIZE == 64

13
bfd/cpu-score.c
View File

@ -43,11 +43,11 @@ compatible (const bfd_arch_info_type * a, const bfd_arch_info_type * b)
return a;
}
#define N(addr_bits, machine, print, default, next) \
#define N(machine, print, default, next) \
{ \
32, /* 16 bits in a word. */ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* 8 bits in a byte. */ \
8, /* Bits in a byte. */ \
bfd_arch_score, \
machine, /* Machine number. */ \
"score", /* Architecture name. */ \
@ -57,13 +57,14 @@ compatible (const bfd_arch_info_type * a, const bfd_arch_info_type * b)
compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
next \
next, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_struct[] =
{
N (16, bfd_mach_score3, "score3", FALSE, NULL),
N (bfd_mach_score3, "score3", FALSE, NULL),
};
const bfd_arch_info_type bfd_score_arch =
N (16, bfd_mach_score7, "score7", TRUE, & arch_info_struct[0]);
N (bfd_mach_score7, "score7", TRUE, & arch_info_struct[0]);

359
bfd/cpu-sh.c
View File

@ -24,333 +24,50 @@
#include "libbfd.h"
#include "../opcodes/sh-opc.h"
#define SH_NEXT arch_info_struct + 0
#define SH2_NEXT arch_info_struct + 1
#define SH2E_NEXT arch_info_struct + 2
#define SH_DSP_NEXT arch_info_struct + 3
#define SH3_NEXT arch_info_struct + 4
#define SH3_NOMMU_NEXT arch_info_struct + 5
#define SH3_DSP_NEXT arch_info_struct + 6
#define SH3E_NEXT arch_info_struct + 7
#define SH4_NEXT arch_info_struct + 8
#define SH4A_NEXT arch_info_struct + 9
#define SH4AL_DSP_NEXT arch_info_struct + 10
#define SH4_NOFPU_NEXT arch_info_struct + 11
#define SH4_NOMMU_NOFPU_NEXT arch_info_struct + 12
#define SH4A_NOFPU_NEXT arch_info_struct + 13
#define SH2A_NEXT arch_info_struct + 14
#define SH2A_NOFPU_NEXT arch_info_struct + 15
#define SH2A_NOFPU_OR_SH4_NOMMU_NOFPU_NEXT arch_info_struct + 16
#define SH2A_NOFPU_OR_SH3_NOMMU_NEXT arch_info_struct + 17
#define SH2A_OR_SH4_NEXT arch_info_struct + 18
#define SH2A_OR_SH3E_NEXT NULL
#define N(NUMBER, PRINT, DEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_sh, \
NUMBER, \
"sh", \
PRINT, \
1, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_struct[] =
{
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh2,
"sh", /* Architecture name. */
"sh2", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH2_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh2e,
"sh", /* Architecture name. */
"sh2e", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH2E_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh_dsp,
"sh", /* Architecture name. */
"sh-dsp", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH_DSP_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh3,
"sh", /* Architecture name. */
"sh3", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH3_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh3_nommu,
"sh", /* Architecture name. */
"sh3-nommu", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH3_NOMMU_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh3_dsp,
"sh", /* Architecture name. */
"sh3-dsp", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH3_DSP_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh3e,
"sh", /* Architecture name. */
"sh3e", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH3E_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh4,
"sh", /* Architecture name. */
"sh4", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH4_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh4a,
"sh", /* Architecture name. */
"sh4a", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH4A_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh4al_dsp,
"sh", /* Architecture name. */
"sh4al-dsp", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH4AL_DSP_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh4_nofpu,
"sh", /* Architecture name. */
"sh4-nofpu", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH4_NOFPU_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh4_nommu_nofpu,
"sh", /* Architecture name. */
"sh4-nommu-nofpu", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH4_NOMMU_NOFPU_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh4a_nofpu,
"sh", /* Architecture name. */
"sh4a-nofpu", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH4A_NOFPU_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh2a,
"sh", /* Architecture name. */
"sh2a", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH2A_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh2a_nofpu,
"sh", /* Architecture name. */
"sh2a-nofpu", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH2A_NOFPU_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu,
"sh", /* Architecture name. */
"sh2a-nofpu-or-sh4-nommu-nofpu", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH2A_NOFPU_OR_SH4_NOMMU_NOFPU_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh2a_nofpu_or_sh3_nommu,
"sh", /* Architecture name. . */
"sh2a-nofpu-or-sh3-nommu", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH2A_NOFPU_OR_SH3_NOMMU_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh2a_or_sh4,
"sh", /* Architecture name. */
"sh2a-or-sh4", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH2A_OR_SH4_NEXT
},
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh2a_or_sh3e,
"sh", /* Architecture name. */
"sh2a-or-sh3e", /* Machine name. */
1,
FALSE, /* Not the default. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH2A_OR_SH3E_NEXT
},
N (bfd_mach_sh2, "sh2", FALSE, arch_info_struct + 1),
N (bfd_mach_sh2e, "sh2e", FALSE, arch_info_struct + 2),
N (bfd_mach_sh_dsp, "sh-dsp", FALSE, arch_info_struct + 3),
N (bfd_mach_sh3, "sh3", FALSE, arch_info_struct + 4),
N (bfd_mach_sh3_nommu, "sh3-nommu", FALSE, arch_info_struct + 5),
N (bfd_mach_sh3_dsp, "sh3-dsp", FALSE, arch_info_struct + 6),
N (bfd_mach_sh3e, "sh3e", FALSE, arch_info_struct + 7),
N (bfd_mach_sh4, "sh4", FALSE, arch_info_struct + 8),
N (bfd_mach_sh4a, "sh4a", FALSE, arch_info_struct + 9),
N (bfd_mach_sh4al_dsp, "sh4al-dsp", FALSE, arch_info_struct + 10),
N (bfd_mach_sh4_nofpu, "sh4-nofpu", FALSE, arch_info_struct + 11),
N (bfd_mach_sh4_nommu_nofpu, "sh4-nommu-nofpu", FALSE, arch_info_struct + 12),
N (bfd_mach_sh4a_nofpu, "sh4a-nofpu", FALSE, arch_info_struct + 13),
N (bfd_mach_sh2a, "sh2a", FALSE, arch_info_struct + 14),
N (bfd_mach_sh2a_nofpu, "sh2a-nofpu", FALSE, arch_info_struct + 15),
N (bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, "sh2a-nofpu-or-sh4-nommu-nofpu", FALSE, arch_info_struct + 16),
N (bfd_mach_sh2a_nofpu_or_sh3_nommu, "sh2a-nofpu-or-sh3-nommu", FALSE, arch_info_struct + 17),
N (bfd_mach_sh2a_or_sh4, "sh2a-or-sh4", FALSE, arch_info_struct + 18),
N (bfd_mach_sh2a_or_sh3e, "sh2a-or-sh3e", FALSE, NULL)
};
const bfd_arch_info_type bfd_sh_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_sh,
bfd_mach_sh,
"sh", /* Architecture name. */
"sh", /* Machine name. */
1,
TRUE, /* The default machine. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
SH_NEXT
};
N (bfd_mach_sh, "sh", TRUE, arch_info_struct + 0);
/* This table defines the mappings from the BFD internal numbering
system to the opcodes internal flags system.

370
bfd/cpu-sparc.c
View File

@ -22,338 +22,48 @@
#include "bfd.h"
#include "libbfd.h"
#define N(BITS, NUMBER, PRINT, DEFAULT, NEXT) \
{ \
BITS, /* Bits in a word. */ \
BITS, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_sparc, \
NUMBER, \
"sparc", \
PRINT, \
3, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
static const bfd_arch_info_type arch_info_struct[] =
{
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_sparclet,
"sparc",
"sparc:sparclet",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[1],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_sparclite,
"sparc",
"sparc:sparclite",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[2],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v8plus,
"sparc",
"sparc:v8plus",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[3],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v8plusa,
"sparc",
"sparc:v8plusa",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[4],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_sparclite_le,
"sparc",
"sparc:sparclite_le",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[5],
},
{
64, /* bits in a word */
64, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v9,
"sparc",
"sparc:v9",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[6],
},
{
64, /* bits in a word */
64, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v9a,
"sparc",
"sparc:v9a",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[7],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v8plusb,
"sparc",
"sparc:v8plusb",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[8],
},
{
64, /* bits in a word */
64, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v9b,
"sparc",
"sparc:v9b",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[9],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v8plusc,
"sparc",
"sparc:v8plusc",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[10],
},
{
64, /* bits in a word */
64, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v9c,
"sparc",
"sparc:v9c",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[11],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v8plusd,
"sparc",
"sparc:v8plusd",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[12],
},
{
64, /* bits in a word */
64, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v9d,
"sparc",
"sparc:v9d",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[13],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v8pluse,
"sparc",
"sparc:v8pluse",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[14],
},
{
64, /* bits in a word */
64, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v9e,
"sparc",
"sparc:v9e",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[15],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v8plusv,
"sparc",
"sparc:v8plusv",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[16],
},
{
64, /* bits in a word */
64, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v9v,
"sparc",
"sparc:v9v",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[17],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v8plusm,
"sparc",
"sparc:v8plusm",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[18],
},
{
64, /* bits in a word */
64, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v9m,
"sparc",
"sparc:v9m",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[19],
},
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v8plusm8,
"sparc",
"sparc:v8plusm8",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[20],
},
{
64, /* bits in a word */
64, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc_v9m8,
"sparc",
"sparc:v9m8",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
}
N (32, bfd_mach_sparc_sparclet, "sparc:sparclet", FALSE, arch_info_struct + 1),
N (32, bfd_mach_sparc_sparclite, "sparc:sparclite", FALSE, arch_info_struct + 2),
N (32, bfd_mach_sparc_v8plus, "sparc:v8plus", FALSE, arch_info_struct + 3),
N (32, bfd_mach_sparc_v8plusa, "sparc:v8plusa", FALSE, arch_info_struct + 4),
N (32, bfd_mach_sparc_sparclite_le, "sparc:sparclite_le", FALSE, arch_info_struct + 5),
N (64, bfd_mach_sparc_v9, "sparc:v9", FALSE, arch_info_struct + 6),
N (64, bfd_mach_sparc_v9a, "sparc:v9a", FALSE, arch_info_struct + 7),
N (32, bfd_mach_sparc_v8plusb, "sparc:v8plusb", FALSE, arch_info_struct + 8),
N (64, bfd_mach_sparc_v9b, "sparc:v9b", FALSE, arch_info_struct + 9),
N (32, bfd_mach_sparc_v8plusc, "sparc:v8plusc", FALSE, arch_info_struct + 10),
N (64, bfd_mach_sparc_v9c, "sparc:v9c", FALSE, arch_info_struct + 11),
N (32, bfd_mach_sparc_v8plusd, "sparc:v8plusd", FALSE, arch_info_struct + 12),
N (64, bfd_mach_sparc_v9d, "sparc:v9d", FALSE, arch_info_struct + 13),
N (32, bfd_mach_sparc_v8pluse, "sparc:v8pluse", FALSE, arch_info_struct + 14),
N (64, bfd_mach_sparc_v9e, "sparc:v9e", FALSE, arch_info_struct + 15),
N (32, bfd_mach_sparc_v8plusv, "sparc:v8plusv", FALSE, arch_info_struct + 16),
N (64, bfd_mach_sparc_v9v, "sparc:v9v", FALSE, arch_info_struct + 17),
N (32, bfd_mach_sparc_v8plusm, "sparc:v8plusm", FALSE, arch_info_struct + 18),
N (64, bfd_mach_sparc_v9m, "sparc:v9m", FALSE, arch_info_struct + 19),
N (32, bfd_mach_sparc_v8plusm8, "sparc:v8plusm8", FALSE, arch_info_struct + 20),
N (64, bfd_mach_sparc_v9m8, "sparc:v9m8", FALSE, NULL)
};
const bfd_arch_info_type bfd_sparc_arch =
{
32, /* bits in a word */
32, /* bits in an address */
8, /* bits in a byte */
bfd_arch_sparc,
bfd_mach_sparc,
"sparc",
"sparc",
3,
TRUE, /* the default */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&arch_info_struct[0],
};
N (32, bfd_mach_sparc, "sparc", TRUE, arch_info_struct);

32
bfd/cpu-spu.c
View File

@ -20,7 +20,6 @@
#include "bfd.h"
#include "libbfd.h"
static const bfd_arch_info_type *
spu_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
{
@ -35,21 +34,20 @@ spu_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
/*NOTREACHED*/
}
const bfd_arch_info_type bfd_spu_arch[] =
const bfd_arch_info_type bfd_spu_arch =
{
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_spu, /* architecture */
bfd_mach_spu, /* machine */
"spu", /* architecture name */
"spu:256K", /* printable name */
3, /* aligned power */
TRUE, /* the default machine for the architecture */
spu_compatible, /* the spu is only compatible with itself, see above */
bfd_default_scan,
bfd_arch_default_fill,
0, /* next -- there are none! */
}
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_spu, /* Architecture number. */
bfd_mach_spu, /* Machine number. */
"spu", /* Architecture name. */
"spu:256K", /* Printable name. */
3, /* Section alignment power. */
TRUE, /* Default machine. */
spu_compatible, /* The spu is only compatible with itself, see above. */
bfd_default_scan,
bfd_arch_default_fill,
NULL, /* Next -- there are none! */
0 /* Maximum offset of a reloc from the start of an insn. */
};

13
bfd/cpu-tic30.c
View File

@ -24,17 +24,18 @@
const bfd_arch_info_type bfd_tic30_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_tic30,
0, /* only 1 machine */
0, /* Only 1 machine. */
"tic30",
"tms320c30",
2,
TRUE, /* the one and only */
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

51
bfd/cpu-tic4x.c
View File

@ -45,39 +45,26 @@ tic4x_scan (const struct bfd_arch_info *info,
return FALSE;
}
#define N(NUMBER, NAME, PRINT, DEFAULT, NEXT) \
{ \
32, /* Bits in a word. */ \
32, /* Bits in an address. */ \
32, /* Bits in a byte. */ \
bfd_arch_tic4x, \
NUMBER, \
NAME, \
PRINT, \
0, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
tic4x_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type bfd_tic3x_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
32, /* 32 bits in a byte. */
bfd_arch_tic4x,
bfd_mach_tic3x, /* Machine number. */
"tic3x", /* Architecture name. */
"tms320c3x", /* Printable name. */
0, /* Alignment power. */
FALSE, /* Not the default architecture. */
bfd_default_compatible,
tic4x_scan,
bfd_arch_default_fill,
0
};
N (bfd_mach_tic3x, "tic3x", "tms320c3x", FALSE, NULL);
const bfd_arch_info_type bfd_tic4x_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
32, /* 32 bits in a byte. */
bfd_arch_tic4x,
bfd_mach_tic4x, /* Machine number. */
"tic4x", /* Architecture name. */
"tms320c4x", /* Printable name. */
0, /* Alignment power. */
TRUE, /* The default architecture. */
bfd_default_compatible,
tic4x_scan,
bfd_arch_default_fill,
&bfd_tic3x_arch,
};
N (bfd_mach_tic4x, "tic4x", "tms320c4x", TRUE, &bfd_tic3x_arch);

13
bfd/cpu-tic54x.c
View File

@ -24,17 +24,18 @@
const bfd_arch_info_type bfd_tic54x_arch =
{
16, /* 16 bits in a word */
16, /* 16 bits in an address (except '548) */
16, /* 16 bits in a byte */
16, /* Bits in a word. */
16, /* Bits in an address (except '548). */
16, /* Bits in a byte. */
bfd_arch_tic54x,
0, /* only 1 machine */
0, /* Only 1 machine. */
"tic54x",
"tms320c54x",
1,
TRUE, /* the one and only */
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

31
bfd/cpu-tic6x.c
View File

@ -23,18 +23,19 @@
#include "libbfd.h"
const bfd_arch_info_type bfd_tic6x_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_tic6x, /* Architecture. */
0, /* No BFD machine numbers needed. */
"tic6x", /* Architecture name. */
"tic6x", /* Printable name. */
2, /* Section alignment power. */
TRUE, /* Default machine for this architecture. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
{
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_tic6x, /* Architecture. */
0, /* No BFD machine numbers needed. */
"tic6x", /* Architecture name. */
"tic6x", /* Printable name. */
2, /* Section alignment power. */
TRUE, /* Default machine for this architecture. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

31
bfd/cpu-tic80.c
View File

@ -24,18 +24,19 @@
#include "libbfd.h"
const bfd_arch_info_type bfd_tic80_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_tic80, /* bfd_architecture enum */
0, /* only 1 machine */
"tic80", /* architecture name */
"tic80", /* printable name */
2, /* section alignment power */
TRUE, /* default machine for architecture */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL, /* Pointer to next in chain */
};
{
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_tic80, /* Architecture number. */
0, /* Only 1 machine. */
"tic80", /* Architecture name. */
"tic80", /* Printable name. */
2, /* Section alignment power. */
TRUE, /* Default machine. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL, /* Pointer to next in chain. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

51
bfd/cpu-tilegx.c
View File

@ -22,36 +22,27 @@
#include "bfd.h"
#include "libbfd.h"
#define N(BITS, NUMBER, PRINT, DEFAULT, NEXT) \
{ \
BITS, /* Bits in a word. */ \
BITS, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_tilegx, \
NUMBER, \
"tilegx", \
PRINT, \
3, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type bfd_tilegx32_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_tilegx,
bfd_mach_tilegx32,
"tilegx32",
"tilegx32",
3,
FALSE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
N (32, bfd_mach_tilegx32, "tilegx32", FALSE, NULL);
const bfd_arch_info_type bfd_tilegx_arch =
{
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_tilegx,
bfd_mach_tilegx,
"tilegx",
"tilegx",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
&bfd_tilegx32_arch,
};
N (64, bfd_mach_tilegx, "tilegx", TRUE, &bfd_tilegx32_arch);

31
bfd/cpu-tilepro.c
View File

@ -23,18 +23,19 @@
#include "libbfd.h"
const bfd_arch_info_type bfd_tilepro_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_tilepro,
bfd_mach_tilepro,
"tilepro",
"tilepro",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
{
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_tilepro,
bfd_mach_tilepro,
"tilepro",
"tilepro",
3,
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

25
bfd/cpu-v850.c
View File

@ -24,23 +24,18 @@
#include "safe-ctype.h"
#define N(number, print, default, next) \
{ 32, 32, 8, bfd_arch_v850, number, "v850", print ":old-gcc-abi", 2, default, \
bfd_default_compatible, bfd_default_scan, bfd_arch_default_fill, next }
{ 32, 32, 8, bfd_arch_v850, number, "v850", print ":old-gcc-abi", 2, default, \
bfd_default_compatible, bfd_default_scan, bfd_arch_default_fill, next, 0 }
#define NEXT NULL
static const bfd_arch_info_type arch_info_struct[] =
static const bfd_arch_info_type arch_info_struct[6] =
{
N (bfd_mach_v850e3v5, "v850e3v5", FALSE, & arch_info_struct[1]),
N (bfd_mach_v850e3v5, "v850e2v4", FALSE, & arch_info_struct[2]),
N (bfd_mach_v850e2v3, "v850e2v3", FALSE, & arch_info_struct[3]),
N (bfd_mach_v850e2, "v850e2", FALSE, & arch_info_struct[4]),
N (bfd_mach_v850e1, "v850e1", FALSE, & arch_info_struct[5]),
N (bfd_mach_v850e, "v850e", FALSE, NULL)
N (bfd_mach_v850e3v5, "v850e3v5", FALSE, arch_info_struct + 1),
N (bfd_mach_v850e3v5, "v850e2v4", FALSE, arch_info_struct + 2),
N (bfd_mach_v850e2v3, "v850e2v3", FALSE, arch_info_struct + 3),
N (bfd_mach_v850e2, "v850e2", FALSE, arch_info_struct + 4),
N (bfd_mach_v850e1, "v850e1", FALSE, arch_info_struct + 5),
N (bfd_mach_v850e, "v850e", FALSE, NULL)
};
#undef NEXT
#define NEXT & arch_info_struct[0]
const bfd_arch_info_type bfd_v850_arch =
N (bfd_mach_v850, "v850", TRUE, NEXT);
N (bfd_mach_v850, "v850", TRUE, arch_info_struct + 0);

4
bfd/cpu-v850_rh850.c
View File

@ -24,8 +24,8 @@
#include "safe-ctype.h"
#define R(number, print, default, next) \
{ 32, 32, 8, bfd_arch_v850_rh850, number, "v850", print, 2, default, \
bfd_default_compatible, bfd_default_scan, bfd_arch_default_fill, next }
{ 32, 32, 8, bfd_arch_v850_rh850, number, "v850", print, 2, default, \
bfd_default_compatible, bfd_default_scan, bfd_arch_default_fill, next, 0 }
static const bfd_arch_info_type arch_info_struct[] =
{

31
bfd/cpu-vax.c
View File

@ -24,18 +24,19 @@
#include "libbfd.h"
const bfd_arch_info_type bfd_vax_arch =
{
32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_vax,
0, /* only 1 machine */
"vax",
"vax",
3,
TRUE, /* the one and only */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
};
{
32, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_vax,
0, /* Only 1 machine. */
"vax",
"vax",
3,
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

27
bfd/cpu-visium.c
View File

@ -25,17 +25,18 @@
const bfd_arch_info_type bfd_visium_arch =
{
32, /* bits per word */
32, /* bits per address */
8, /* bits per byte */
bfd_arch_visium, /* architecture */
bfd_mach_visium, /* machine */
"visium", /* architecture name */
"visium", /* printable name */
2, /* section align power */
TRUE, /* the default ? */
bfd_default_compatible, /* architecture comparison fn */
bfd_default_scan, /* string to architecture convert fn */
bfd_arch_default_fill, /* default fill */
NULL /* next in list */
32, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_visium, /* Architecture number. */
bfd_mach_visium, /* Machine number. */
"visium", /* Architecture name. */
"visium", /* Machine name. */
2, /* Section align power. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

4
bfd/cpu-wasm32.c
View File

@ -24,8 +24,8 @@
#include "libiberty.h"
#define N(number, print, default, next) \
{ 32, 32, 8, bfd_arch_wasm32, number, "wasm32", "wasm32", 4, default, bfd_default_compatible, \
bfd_default_scan, bfd_arch_default_fill, next }
{ 32, 32, 8, bfd_arch_wasm32, number, "wasm32", "wasm32", 4, default, bfd_default_compatible, \
bfd_default_scan, bfd_arch_default_fill, next, 0 }
static const bfd_arch_info_type arch_info_struct[] =
{

67
bfd/cpu-xc16x.c
View File

@ -24,53 +24,30 @@
#include "bfd.h"
#include "libbfd.h"
#define N(BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT) \
{ \
16, /* Bits in a word. */ \
BITS_ADDR, /* Bits in an address. */ \
8, /* Bits in a byte. */ \
bfd_arch_xc16x, \
NUMBER, \
"xc16x", \
PRINT, \
1, /* Section alignment power. */ \
DEFAULT, \
bfd_default_compatible, \
bfd_default_scan, \
bfd_arch_default_fill, \
NEXT, \
0 /* Maximum offset of a reloc from the start of an insn. */ \
}
const bfd_arch_info_type xc16xs_info_struct =
{
16, /* Bits per word. */
16, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_xc16x, /* Architecture. */
bfd_mach_xc16xs, /* Machine. */
"xc16x", /* Architecture name. */
"xc16xs", /* Printable name. */
1, /* Section alignment - 16 bit. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
};
N (16, bfd_mach_xc16xs, "xc16xs", FALSE, NULL);
const bfd_arch_info_type xc16xl_info_struct =
{
16, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_xc16x, /* Architecture. */
bfd_mach_xc16xl, /* Machine. */
"xc16x", /* Architecture name. */
"xc16xl", /* Printable name. */
1, /* Section alignment - 16 bit. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
& xc16xs_info_struct /* Next in list. */
};
N (32, bfd_mach_xc16xl, "xc16xl", FALSE, & xc16xs_info_struct);
const bfd_arch_info_type bfd_xc16x_arch =
{
16, /* Bits per word. */
16, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_xc16x, /* Architecture. */
bfd_mach_xc16x, /* Machine. */
"xc16x", /* Architecture name. */
"xc16x", /* Printable name. */
1, /* Section alignment - 16 bit. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
& xc16xl_info_struct /* Next in list. */
};
N (16, bfd_mach_xc16x, "xc16x", TRUE, & xc16xl_info_struct);

27
bfd/cpu-xgate.c
View File

@ -24,17 +24,18 @@
const bfd_arch_info_type bfd_xgate_arch =
{
16, /* 16 bits in a word. */
32, /* 32 bits used as 16 bit address and PPAGE value. */
8, /* 8 bits in a byte. */
bfd_arch_xgate,
bfd_mach_xgate,
"xgate",
"xgate",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
0,
16, /* Bits in a word. */
32, /* Bits used as 16 bit address and PPAGE value. */
8, /* Bits in a byte. */
bfd_arch_xgate,
bfd_mach_xgate,
"xgate",
"xgate",
4, /* Section alignment power. */
TRUE,
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

25
bfd/cpu-xstormy16.c
View File

@ -24,17 +24,18 @@
const bfd_arch_info_type bfd_xstormy16_arch =
{
16, /* bits per word */
32, /* bits per address */
8, /* bits per byte */
bfd_arch_xstormy16, /* architecture */
bfd_mach_xstormy16, /* machine */
"xstormy16", /* architecture name */
"xstormy16", /* printable name */
2, /* section align power */
TRUE, /* the default ? */
bfd_default_compatible, /* architecture comparison fn */
bfd_default_scan, /* string to architecture convert fn */
16, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_xstormy16, /* Architecture. */
bfd_mach_xstormy16, /* Machine. */
"xstormy16", /* Architecture name. */
"xstormy16", /* Printable name. */
2, /* Section align power. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* next in list */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

3
bfd/cpu-xtensa.c
View File

@ -36,5 +36,6 @@ const bfd_arch_info_type bfd_xtensa_arch =
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
bfd_arch_default_fill, /* Default fill. */
NULL /* Next in list. */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
};

4
bfd/cpu-z80.c
View File

@ -41,8 +41,8 @@ compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
}
#define N(name,print,default,next) \
{ 16, 16, 8, bfd_arch_z80, name, "z80", print, 0, default, \
compatible, bfd_default_scan, bfd_arch_default_fill, next }
{ 16, 16, 8, bfd_arch_z80, name, "z80", print, 0, default, \
compatible, bfd_default_scan, bfd_arch_default_fill, next, 0 }
#define M(n) &arch_info_struct[n]

4
bfd/cpu-z8k.c
View File

@ -37,12 +37,12 @@ compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
static const bfd_arch_info_type arch_info_struct[] =
{
{ 32, 16, 8, bfd_arch_z8k, bfd_mach_z8002, "z8k", "z8002", 1, FALSE,
compatible, bfd_default_scan, bfd_arch_default_fill, 0 }
compatible, bfd_default_scan, bfd_arch_default_fill, NULL, 0 }
};
const bfd_arch_info_type bfd_z8k_arch =
{
32, 32, 8, bfd_arch_z8k, bfd_mach_z8001, "z8k", "z8001", 1, TRUE,
compatible, bfd_default_scan, bfd_arch_default_fill,
&arch_info_struct[0]
&arch_info_struct[0], 0
};

10
binutils/ChangeLog
View File

@ -1,3 +1,13 @@
2019-09-10 Nick Clifton <nickc@redhat.com>
PR 24907
* objdump.c (null_print): New function.
(disassemble_bytes): Delete previous_octets local and replace with
a test of the max_reloc_offset_into_insn field of the
bfd_arch_info structure. If a reloc is a potential match for the
next insn, then perform a dummy disassembly in order to calculate
its real length.
2019-09-09 Phil Blundell <pb@pbcl.net>
binutils 2.33 branch created.

50
binutils/objdump.c
View File

@ -1836,6 +1836,12 @@ objdump_sprintf (SFILE *f, const char *format, ...)
#define DEFAULT_SKIP_ZEROES_AT_END 3
static int
null_print (const void * stream ATTRIBUTE_UNUSED, const char * format ATTRIBUTE_UNUSED, ...)
{
return 1;
}
/* Disassemble some data in memory between given values. */
static void
@ -1903,10 +1909,7 @@ disassemble_bytes (struct disassemble_info * inf,
{
bfd_vma z;
bfd_boolean need_nl = FALSE;
int previous_octets;
/* Remember the length of the previous instruction. */
previous_octets = octets;
octets = 0;
/* Make sure we don't use relocs from previous instructions. */
@ -1990,26 +1993,43 @@ disassemble_bytes (struct disassemble_info * inf,
&& *relppp < relppend)
{
bfd_signed_vma distance_to_rel;
int insn_size = 0;
distance_to_rel = (**relppp)->address
- (rel_offset + addr_offset);
if (distance_to_rel > 0
&& aux->abfd->arch_info->max_reloc_offset_into_insn <= distance_to_rel)
{
/* This reloc *might* apply to the current insn,
starting somewhere inside it. Discover the length
of the current insn so that the check below will
work. */
if (insn_width)
insn_size = insn_width;
else
{
/* We find the length by calling the dissassembler
function with a dummy print handler. This should
work unless the disassembler is not expecting to
be called multiple times for the same address.
This does mean disassembling the instruction
twice, but we only do this when there is a high
probability that there is a reloc that will
affect the instruction. */
inf->fprintf_func = (fprintf_ftype) null_print;
insn_size = disassemble_fn (section->vma
+ addr_offset, inf);
inf->fprintf_func = (fprintf_ftype) objdump_sprintf;
}
}
/* Check to see if the current reloc is associated with
the instruction that we are about to disassemble. */
if (distance_to_rel == 0
/* FIXME: This is wrong. We are trying to catch
relocs that are addressed part way through the
current instruction, as might happen with a packed
VLIW instruction. Unfortunately we do not know the
length of the current instruction since we have not
disassembled it yet. Instead we take a guess based
upon the length of the previous instruction. The
proper solution is to have a new target-specific
disassembler function which just returns the length
of an instruction at a given address without trying
to display its disassembly. */
|| (distance_to_rel > 0
&& distance_to_rel < (bfd_signed_vma) (previous_octets/ opb)))
&& distance_to_rel < (bfd_signed_vma) (insn_size / opb)))
{
inf->flags |= INSN_HAS_RELOC;
aux->reloc = **relppp;

6
gas/ChangeLog
View File

@ -1,3 +1,9 @@
2019-09-10 Nick Clifton <nickc@redhat.com>
PR 24907
* testsuite/gas/arm/pr24907.s: New test.
* testsuite/gas/arm/pr24907.d: Expected disassembly.
2019-09-09 Phil Blundell <pb@pbcl.net>
binutils 2.33 branch created.

19
gas/testsuite/gas/arm/pr24907.d Normal file
View File

@ -0,0 +1,19 @@
# name: Disassembling variable width insns with relocs (PR 24907)
# as:
# objdump: -d
# This test is only valid on ELF based ports.
#notarget: *-*-pe *-*-wince *-*-vxworks
.*: +file format .*arm.*
Disassembly of section \.text:
0+000 <foo>:
0: 46c0 nop ; .*
2: f7ff fffe bl 0 <log_func>
6: e002 b\.n e <func\+0x2>
8: f7ff fffe bl c <func>
0+000c <func>:
c: 46c0 nop ; .*
e: 46c0 nop ; .*

16
gas/testsuite/gas/arm/pr24907.s Normal file
View File

@ -0,0 +1,16 @@
.syntax unified
.text
.thumb
.global foo
foo:
nop
bl log_func
b.n .L1
bl func
.global func
func:
nop
.L1:
nop