fix broken sanitization
This commit is contained in:
Ken Raeburn
parent
5cdcdb070c
commit
aeeb756dee
231
sim/mips/vr.igen
231
sim/mips/vr.igen
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@ -13,36 +13,79 @@
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:function:::unsigned64:MulAcc:
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:function:::unsigned64:MulAcc:
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*vr4100:
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// start-sanitize-vr4320
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*vr4320:
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// end-sanitize-vr4320
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// start-sanitize-cygnus
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*vr5400:
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// end-sanitize-cygnus
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{
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{
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unsigned64 result = U8_4 (HI, LO);
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unsigned64 result = U8_4 (HI, LO);
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return result;
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return result;
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}
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}
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:function:::void:SET_MulAcc:unsigned64 value
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:function:::void:SET_MulAcc:unsigned64 value
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*vr4100:
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// start-sanitize-vr4320
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*vr4320:
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// end-sanitize-vr4320
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// start-sanitize-cygnus
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*vr5400:
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// end-sanitize-cygnus
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{
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{
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/* 64 bit specific */
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*AL4_8 (&HI) = VH4_8 (value);
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*AL4_8 (&HI) = VH4_8 (value);
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*AL4_8 (&LO) = VL4_8 (value);
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*AL4_8 (&LO) = VL4_8 (value);
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}
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}
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:function:::signed64:SignedMultiply:signed32 l, signed32 r
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:function:::signed64:SignedMultiply:signed32 l, signed32 r
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*vr4100:
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// start-sanitize-vr4320
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*vr4320:
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// end-sanitize-vr4320
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// start-sanitize-cygnus
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*vr5400:
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// end-sanitize-cygnus
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{
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{
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signed64 result = (signed64) l * (signed64) r;
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signed64 result = (signed64) l * (signed64) r;
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return result;
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return result;
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}
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}
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:function:::unsigned64:UnsignedMultiply:unsigned32 l, unsigned32 r
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:function:::unsigned64:UnsignedMultiply:unsigned32 l, unsigned32 r
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*vr4100:
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// start-sanitize-vr4320
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*vr4320:
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// end-sanitize-vr4320
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// start-sanitize-cygnus
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*vr5400:
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// end-sanitize-cygnus
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{
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{
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unsigned64 result = (unsigned64) l * (unsigned64) r;
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unsigned64 result = (unsigned64) l * (unsigned64) r;
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return result;
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return result;
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}
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}
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:function:::unsigned64:Low32Bits:unsigned64 value
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:function:::unsigned64:Low32Bits:unsigned64 value
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*vr4100:
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// start-sanitize-vr4320
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*vr4320:
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// end-sanitize-vr4320
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// start-sanitize-cygnus
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*vr5400:
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// end-sanitize-cygnus
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{
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{
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unsigned64 result = (signed64) (signed32) VL4_8 (value);
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unsigned64 result = (signed64) (signed32) VL4_8 (value);
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return result;
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return result;
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}
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}
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:function:::unsigned64:High32Bits:unsigned64 value
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:function:::unsigned64:High32Bits:unsigned64 value
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*vr4100:
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// start-sanitize-vr4320
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*vr4320:
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// end-sanitize-vr4320
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// start-sanitize-cygnus
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*vr5400:
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// end-sanitize-cygnus
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{
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{
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unsigned64 result = (signed64) (signed32) VH4_8 (value);
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unsigned64 result = (signed64) (signed32) VH4_8 (value);
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return result;
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return result;
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@ -138,9 +181,9 @@
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// start-sanitize-vr4320
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// start-sanitize-vr4320
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*vr4320:
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*vr4320:
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// end-sanitize-vr4320
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// end-sanitize-vr4320
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vrXXXX
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// start-sanitize-vrXXXX
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{
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{
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SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
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@ -157,9 +200,9 @@
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// start-sanitize-vr4320
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// start-sanitize-vr4320
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*vr4320:
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*vr4320:
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// end-sanitize-vr4320
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// end-sanitize-vr4320
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vrXXXX
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// start-sanitize-vrXXXX
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{
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{
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SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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@ -176,9 +219,9 @@
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// start-sanitize-vr4320
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// start-sanitize-vr4320
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*vr4320:
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*vr4320:
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// end-sanitize-vr4320
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// end-sanitize-vr4320
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vrXXXX
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// start-sanitize-vrXXXX
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{
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{
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SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
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@ -195,9 +238,9 @@
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// start-sanitize-vr4320
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// start-sanitize-vr4320
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*vr4320:
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*vr4320:
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// end-sanitize-vr4320
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// end-sanitize-vr4320
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vrXXXX
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// start-sanitize-vrXXXX
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{
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{
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SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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@ -206,63 +249,63 @@
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// end-sanitize-vrXXXX
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// end-sanitize-vrXXXX
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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// Multiply, Negate and Move LO.
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// Multiply, Negate and Move LO.
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000000,5.RS,5.RT,5.RD,00011,011000::::MULS
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000000,5.RS,5.RT,5.RD,00011,011000::::MULS
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"muls r<RD>, r<RS>, r<RT>"
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"muls r<RD>, r<RS>, r<RT>"
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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{
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{
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SET_MulAcc (SD_, 0 - SignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, 0 - SignedMultiply (SD_, GPR[RS], GPR[RT]));
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GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
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GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
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}
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}
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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// Unsigned Multiply, Negate and Move LO.
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// Unsigned Multiply, Negate and Move LO.
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000000,5.RS,5.RT,5.RD,00011,011001::::MULSU
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000000,5.RS,5.RT,5.RD,00011,011001::::MULSU
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"mulsu r<RD>, r<RS>, r<RT>"
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"mulsu r<RD>, r<RS>, r<RT>"
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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{
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{
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SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
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GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
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}
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}
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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// Multiply, Negate and Move HI.
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// Multiply, Negate and Move HI.
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000000,5.RS,5.RT,5.RD,01011,011000::::MULSHI
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000000,5.RS,5.RT,5.RD,01011,011000::::MULSHI
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"mulshi r<RD>, r<RS>, r<RT>"
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"mulshi r<RD>, r<RS>, r<RT>"
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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{
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{
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SET_MulAcc (SD_, 0 - SignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, 0 - SignedMultiply (SD_, GPR[RS], GPR[RT]));
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GPR[RD] = High32Bits (SD_, MulAcc (SD_));
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GPR[RD] = High32Bits (SD_, MulAcc (SD_));
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}
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}
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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// Unsigned Multiply, Negate and Move HI.
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// Unsigned Multiply, Negate and Move HI.
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000000,5.RS,5.RT,5.RD,01011,011001::::MULSHIU
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000000,5.RS,5.RT,5.RD,01011,011001::::MULSHIU
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"mulshiu r<RD>, r<RS>, r<RT>"
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"mulshiu r<RD>, r<RS>, r<RT>"
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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{
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{
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SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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GPR[RD] = High32Bits (SD_, MulAcc (SD_));
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GPR[RD] = High32Bits (SD_, MulAcc (SD_));
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@ -272,16 +315,16 @@
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// Multiply, Accumulate and Move LO.
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// Multiply, Accumulate and Move LO.
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000000,5.RS,5.RT,5.RD,00010,101000::::MACC
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000000,5.RS,5.RT,5.RD,00010,101000::::MACC
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"macc r<RD>, r<RS>, r<RT>"
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"macc r<RD>, r<RS>, r<RT>"
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// start-sanitize-vr4320
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// start-sanitize-vr4320
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*vr4320:
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*vr4320:
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// end-sanitize-vr4320
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// end-sanitize-vr4320
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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{
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{
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SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
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GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
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GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
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@ -296,9 +339,9 @@
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// start-sanitize-vr4320
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// start-sanitize-vr4320
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*vr4320:
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*vr4320:
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// end-sanitize-vr4320
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// end-sanitize-vr4320
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vrXXXX
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// start-sanitize-vrXXXX
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{
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{
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SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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@ -315,9 +358,9 @@
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// start-sanitize-vr4320
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// start-sanitize-vr4320
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*vr4320:
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*vr4320:
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// end-sanitize-vr4320
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// end-sanitize-vr4320
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vrXXXX
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// start-sanitize-vrXXXX
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{
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{
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SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
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@ -334,9 +377,9 @@
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// start-sanitize-vr4320
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// start-sanitize-vr4320
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*vr4320:
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*vr4320:
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||||||
// end-sanitize-vr4320
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// end-sanitize-vr4320
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vrXXXX
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// start-sanitize-vrXXXX
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{
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{
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SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
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@ -347,146 +390,146 @@
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// end-sanitize-vrXXXX
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// end-sanitize-vrXXXX
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||||||
// start-sanitize-vr5400
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// start-sanitize-cygnus
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// Multiply, Negate, Accumulate and Move LO.
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// Multiply, Negate, Accumulate and Move LO.
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000000,5.RS,5.RT,5.RD,00111,011000::::MSAC
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000000,5.RS,5.RT,5.RD,00111,011000::::MSAC
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"msac r<RD>, r<RS>, r<RT>"
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"msac r<RD>, r<RS>, r<RT>"
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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{
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{
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SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
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SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
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GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
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GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
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}
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}
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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// Unsigned Multiply, Negate, Accumulate and Move LO.
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// Unsigned Multiply, Negate, Accumulate and Move LO.
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000000,5.RS,5.RT,5.RD,00111,011001::::MSACU
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000000,5.RS,5.RT,5.RD,00111,011001::::MSACU
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"msacu r<RD>, r<RS>, r<RT>"
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"msacu r<RD>, r<RS>, r<RT>"
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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||||||
// start-sanitize-vr5400
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// start-sanitize-cygnus
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*vr5400:
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*vr5400:
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// end-sanitize-vr5400
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// end-sanitize-cygnus
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// start-sanitize-vr5400
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// start-sanitize-cygnus
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{
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{
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SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
|
SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
|
||||||
GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
|
GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
// Multiply, Negate, Accumulate and Move HI.
|
// Multiply, Negate, Accumulate and Move HI.
|
||||||
000000,5.RS,5.RT,5.RD,01111,011000::::MSACHI
|
000000,5.RS,5.RT,5.RD,01111,011000::::MSACHI
|
||||||
"msachi r<RD>, r<RS>, r<RT>"
|
"msachi r<RD>, r<RS>, r<RT>"
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
*vr5400:
|
*vr5400:
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
{
|
{
|
||||||
SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
|
SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
|
||||||
GPR[RD] = High32Bits (SD_, MulAcc (SD_));
|
GPR[RD] = High32Bits (SD_, MulAcc (SD_));
|
||||||
}
|
}
|
||||||
|
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
// Unsigned Multiply, Negate, Accumulate and Move HI.
|
// Unsigned Multiply, Negate, Accumulate and Move HI.
|
||||||
000000,5.RS,5.RT,5.RD,01111,011001::::MSACHIU
|
000000,5.RS,5.RT,5.RD,01111,011001::::MSACHIU
|
||||||
"msachiu r<RD>, r<RS>, r<RT>"
|
"msachiu r<RD>, r<RS>, r<RT>"
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
*vr5400:
|
*vr5400:
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
{
|
{
|
||||||
SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
|
SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
|
||||||
GPR[RD] = High32Bits (SD_, MulAcc (SD_));
|
GPR[RD] = High32Bits (SD_, MulAcc (SD_));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
// Rotate Right.
|
// Rotate Right.
|
||||||
000000,00001,5.RT,5.RD,5.SHIFT,000010::::ROR
|
000000,00001,5.RT,5.RD,5.SHIFT,000010::::ROR
|
||||||
"ror r<RD>, r<RT>, <SHIFT>"
|
"ror r<RD>, r<RT>, <SHIFT>"
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
*vr5400:
|
*vr5400:
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
{
|
{
|
||||||
int s = SHIFT;
|
int s = SHIFT;
|
||||||
GPR[RD] = ROTR32 (GPR[RT], s);
|
GPR[RD] = ROTR32 (GPR[RT], s);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
// Rotate Right Variable.
|
// Rotate Right Variable.
|
||||||
000000,5.RS,5.RT,5.RD,00001,000110::::RORV
|
000000,5.RS,5.RT,5.RD,00001,000110::::RORV
|
||||||
"rorv r<RD>, r<RT>, <RS>"
|
"rorv r<RD>, r<RT>, <RS>"
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
*vr5400:
|
*vr5400:
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
{
|
{
|
||||||
int s = MASKED (GPR[RS], 4, 0);
|
int s = MASKED (GPR[RS], 4, 0);
|
||||||
GPR[RD] = ROTR32 (GPR[RT], s);
|
GPR[RD] = ROTR32 (GPR[RT], s);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
// Double Rotate Right.
|
// Double Rotate Right.
|
||||||
000000,00001,5.RT,5.RD,5.SHIFT,111010::::DROR
|
000000,00001,5.RT,5.RD,5.SHIFT,111010::::DROR
|
||||||
"dror r<RD>, r<RT>, <SHIFT>"
|
"dror r<RD>, r<RT>, <SHIFT>"
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
*vr5400:
|
*vr5400:
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
{
|
{
|
||||||
int s = SHIFT;
|
int s = SHIFT;
|
||||||
GPR[RD] = ROTR64 (GPR[RT], s);
|
GPR[RD] = ROTR64 (GPR[RT], s);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
// Double Rotate Right Plus 32.
|
// Double Rotate Right Plus 32.
|
||||||
000000,00001,5.RT,5.RD,5.SHIFT,111110::::DROR32
|
000000,00001,5.RT,5.RD,5.SHIFT,111110::::DROR32
|
||||||
"dror32 r<RD>, r<RT>, <SHIFT>"
|
"dror32 r<RD>, r<RT>, <SHIFT>"
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
*vr5400:
|
*vr5400:
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
{
|
{
|
||||||
int s = SHIFT + 32;
|
int s = SHIFT + 32;
|
||||||
GPR[RD] = ROTR64 (GPR[RT], s);
|
GPR[RD] = ROTR64 (GPR[RT], s);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
// Double Rotate Right Variable.
|
// Double Rotate Right Variable.
|
||||||
000000,5.RS,5.RT,5.RD,00001,010110::::DRORV
|
000000,5.RS,5.RT,5.RD,00001,010110::::DRORV
|
||||||
"drorv r<RD>, r<RT>, <RS>"
|
"drorv r<RD>, r<RT>, <RS>"
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
*vr5400:
|
*vr5400:
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
// start-sanitize-vr5400
|
// start-sanitize-cygnus
|
||||||
{
|
{
|
||||||
int s = MASKED (GPR[RS], 5, 0);
|
int s = MASKED (GPR[RS], 5, 0);
|
||||||
GPR[RD] = ROTR64 (GPR[RT], s);
|
GPR[RD] = ROTR64 (GPR[RT], s);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// end-sanitize-vr5400
|
// end-sanitize-cygnus
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue