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* ld-powerpc/tlsexe32.d: Update for changed symbols from objdump. 

* ld-powerpc/tlsso32.d: Likewise.
This commit is contained in:
Alan Modra 2003-11-19 03:46:08 +00:00
parent 5a46fe39b3
commit af04c4eaf2
3 changed files with 14 additions and 9 deletions
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9
ld/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2003-11-19 Alan Modra <amodra@bigpond.net.au>
* ld-powerpc/tlsexe32.d: Update for changed symbols from objdump.
* ld-powerpc/tlsso32.d: Likewise.
2003-10-27 Stephane Carrez <stcarrez@nerim.fr>
* ld-undefined/undefined.exp: Mark as xfail for m6811 and m6812
@ -71,7 +76,7 @@
* ld-sh/sh64/endian.sld: Likewise.
* ld-sh/sh64/gotplt.d: Likewise.
* ld-sh/sh64/init-cmpct.d: Likewise.
* ld-sh/sh64/init-media.d: Likewise.
* ld-sh/sh64/init-media.d: Likewise.
* ld-sh/sh64/init.s: Align functions.
* ld-sh/sh64/init64.d: Update.
* ld-sh/sh64/mix1-noexp.sd: Likewise.
@ -217,7 +222,7 @@
* ld-alpha/tlsbinr.sd: Likewise.
* ld-alpha/tlspic.dd: Likewise.
* ld-alpha/tlspic.rd: Likewise.
* ld-alpha/tlspic.sd: Likewise.
* ld-alpha/tlspic.sd: Likewise.
2003-07-26 Alan Modra <amodra@bigpond.net.au>

2
ld/testsuite/ld-powerpc/tlsexe32.d
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@ -12,7 +12,7 @@ Disassembly of section \.text:
180028c: 80 7f 00 0c lwz r3,12\(r31\)
1800290: 7c 63 12 14 add r3,r3,r2
1800294: 38 7f 00 10 addi r3,r31,16
1800298: 48 01 01 85 bl 181041c <__bss_start\+0x48>
1800298: 48 01 01 85 bl 181041c .*
180029c: 3c 62 00 00 addis r3,r2,0
18002a0: 38 63 90 1c addi r3,r3,-28644
18002a4: 3c 62 00 00 addis r3,r2,0

12
ld/testsuite/ld-powerpc/tlsso32.d
View File

@ -10,13 +10,13 @@ Disassembly of section \.text:
0+538 <_start>:
538: 38 7f 00 1c addi r3,r31,28
53c: 48 00 00 01 bl 53c <_start\+0x4>
53c: 48 00 00 01 bl 53c .*
540: 38 7f 00 0c addi r3,r31,12
544: 48 00 00 01 bl 544 <_start\+0xc>
544: 48 00 00 01 bl 544 .*
548: 38 7f 00 24 addi r3,r31,36
54c: 48 01 01 95 bl 106e0 <__bss_start\+0x48>
54c: 48 01 01 95 bl 106e0 .*
550: 38 7f 00 0c addi r3,r31,12
554: 48 01 01 8d bl 106e0 <__bss_start\+0x48>
554: 48 01 01 8d bl 106e0 .*
558: 39 23 80 20 addi r9,r3,-32736
55c: 3d 23 00 00 addis r9,r3,0
560: 81 49 80 24 lwz r10,-32732\(r9\)
@ -26,9 +26,9 @@ Disassembly of section \.text:
570: 3d 22 00 00 addis r9,r2,0
574: 99 49 00 00 stb r10,0\(r9\)
578: 38 7e 00 14 addi r3,r30,20
57c: 48 00 00 01 bl 57c <_start\+0x44>
57c: 48 00 00 01 bl 57c .*
580: 38 7e 00 0c addi r3,r30,12
584: 48 00 00 01 bl 584 <_start\+0x4c>
584: 48 00 00 01 bl 584 .*
588: 91 43 80 04 stw r10,-32764\(r3\)
58c: 3d 23 00 00 addis r9,r3,0
590: 91 49 80 08 stw r10,-32760\(r9\)