* s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME to

S390_OPCODE_ZARCH.
	(print_insn_s390): Use new modes field of s390_opcodes.
	* s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove.
	(s390_opcode_mode_val, s390_opcode_cpu_val): New enums.
	(struct op_struct): Remove archbits. Add mode_bits and min_cpu.
	(insertOpcode): Replace archbits by min_cpu and mode_bits.
	(dumpTable): Write mode_bits and min_cpu instead of archbits.
	(main): Adapt to new format in s390-opcode.txt.
	* s390-opc.c (s390_opformats): Replace archbits by min_cpu and
	mode_bits.
	* s390-opc.txt: Replace archbits by min_cpu and mode_bits.
This commit is contained in:
Martin Schwidefsky 2003-03-21 13:28:09 +00:00
parent 1bd490c46b
commit af169f2333
5 changed files with 717 additions and 666 deletions

View File

@ -1,3 +1,18 @@
2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME to
S390_OPCODE_ZARCH.
(print_insn_s390): Use new modes field of s390_opcodes.
* s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove.
(s390_opcode_mode_val, s390_opcode_cpu_val): New enums.
(struct op_struct): Remove archbits. Add mode_bits and min_cpu.
(insertOpcode): Replace archbits by min_cpu and mode_bits.
(dumpTable): Write mode_bits and min_cpu instead of archbits.
(main): Adapt to new format in s390-opcode.txt.
* s390-opc.c (s390_opformats): Replace archbits by min_cpu and
mode_bits.
* s390-opc.txt: Replace archbits by min_cpu and mode_bits.
2003-03-17 Nick Clifton <nickc@redhat.com>
* ppc-opc.c: Fix formatting. Update copyright date.

View File

@ -57,7 +57,7 @@ init_disasm (info)
current_arch_mask = 1 << S390_OPCODE_ESA;
break;
case bfd_mach_s390_64:
current_arch_mask = 1 << S390_OPCODE_ESAME;
current_arch_mask = 1 << S390_OPCODE_ZARCH;
break;
default:
abort ();
@ -161,7 +161,7 @@ print_insn_s390 (memaddr, info)
const unsigned char *opindex;
/* Check architecture. */
if (!(opcode->architecture & current_arch_mask))
if (!(opcode->modes & current_arch_mask))
continue;
/* Check signature of the opcode. */
if ((buffer[1] & opcode->mask[1]) != opcode->opcode[1]

View File

@ -23,21 +23,28 @@
#include <stdlib.h>
#include <string.h>
/* ARCHBITS_ESA and ARCH_ESAME correspond to the bit numbers defined
by s390_opcode_arch_val in include/opcode/s390.h:
ARCHBITS_ESAONLY = (1<<S390_OPCODE_ESA)
ARCHBITS_ESA = (1<<S390_OPCODE_ESA) + (1<<S390_OPCODE_ESAME)
ARCHBITS_ESA = (1<<S390_OPCODE_ESAME). */
#define ARCHBITS_ESAONLY 1
#define ARCHBITS_ESA 3
#define ARCHBITS_ESAME 2
/* Taken from opcodes/s390.h */
enum s390_opcode_mode_val
{
S390_OPCODE_ESA = 0,
S390_OPCODE_ZARCH
};
enum s390_opcode_cpu_val
{
S390_OPCODE_G5 = 0,
S390_OPCODE_G6,
S390_OPCODE_Z900
};
struct op_struct
{
char opcode[16];
char mnemonic[16];
char format[16];
int archbits;
int mode_bits;
int min_cpu;
unsigned long long sort_value;
int no_nibbles;
};
@ -57,7 +64,8 @@ createTable (void)
/* `insertOpcode': insert an op_struct into sorted opcode array. */
static void
insertOpcode (char *opcode, char *mnemonic, char *format, int archbits)
insertOpcode (char *opcode, char *mnemonic, char *format,
int min_cpu, int mode_bits)
{
char *str;
unsigned long long sort_value;
@ -87,6 +95,7 @@ insertOpcode (char *opcode, char *mnemonic, char *format, int archbits)
str ++;
}
sort_value <<= 4*(16 - ix);
sort_value += (min_cpu << 8) + mode_bits;
no_nibbles = ix;
for (ix = 0; ix < no_ops; ix++)
if (sort_value > op_array[ix].sort_value)
@ -98,7 +107,8 @@ insertOpcode (char *opcode, char *mnemonic, char *format, int archbits)
strcpy(op_array[ix].format, format);
op_array[ix].sort_value = sort_value;
op_array[ix].no_nibbles = no_nibbles;
op_array[ix].archbits = archbits;
op_array[ix].min_cpu = min_cpu;
op_array[ix].mode_bits = mode_bits;
no_ops++;
}
@ -136,7 +146,8 @@ dumpTable (void)
op_array[ix].no_nibbles*4, op_array[ix].opcode);
printf ("MASK_%s, INSTR_%s, ",
op_array[ix].format, op_array[ix].format);
printf ("%i}", op_array[ix].archbits);
printf ("%i, ", op_array[ix].mode_bits);
printf ("%i}", op_array[ix].min_cpu);
if (ix < no_ops-1)
printf (",\n");
else
@ -162,24 +173,50 @@ main (void)
char mnemonic[16];
char format[16];
char description[64];
char archtag[16];
int archbits;
char cpu_string[16];
char modes_string[16];
int min_cpu;
int mode_bits;
char *str;
if (currentLine[0] == '#')
continue;
memset (opcode, 0, 8);
if (sscanf (currentLine, "%15s %15s %15s \"%[^\"]\" %15s",
opcode, mnemonic, format, description, archtag) == 5)
if (sscanf (currentLine, "%15s %15s %15s \"%[^\"]\" %15s %15s",
opcode, mnemonic, format, description,
cpu_string, modes_string) == 6)
{
if (strcmp (archtag, "esaonly") == 0)
archbits = ARCHBITS_ESAONLY;
else if (strcmp (archtag, "esa") == 0)
archbits = ARCHBITS_ESA;
else if (strcmp (archtag, "esame") == 0)
archbits = ARCHBITS_ESAME;
else
archbits = 0;
insertOpcode (opcode, mnemonic, format, archbits);
if (strcmp (cpu_string, "g5") == 0)
min_cpu = S390_OPCODE_G5;
else if (strcmp (cpu_string, "g6") == 0)
min_cpu = S390_OPCODE_G6;
else if (strcmp (cpu_string, "z900") == 0)
min_cpu = S390_OPCODE_Z900;
else {
fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string);
exit (1);
}
str = modes_string;
mode_bits = 0;
do {
if (strncmp (str, "esa", 3) == 0
&& (str[3] == 0 || str[3] == ',')) {
mode_bits |= 1 << S390_OPCODE_ESA;
str += 3;
} else if (strncmp (str, "zarch", 5) == 0
&& (str[5] == 0 || str[5] == ',')) {
mode_bits |= 1 << S390_OPCODE_ZARCH;
str += 5;
} else {
fprintf (stderr, "Couldn't parse modes string %s\n",
modes_string);
exit (1);
}
if (*str == ',')
str++;
} while (*str != 0);
insertOpcode (opcode, mnemonic, format, min_cpu, mode_bits);
}
else
fprintf (stderr, "Couldn't scan line %s\n", currentLine);

View File

@ -293,23 +293,23 @@ const struct s390_operand s390_operands[] =
const struct s390_opcode s390_opformats[] =
{
{ "e", OP8(0x00LL), MASK_E, INSTR_E, 3 },
{ "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3 },
{ "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3 },
{ "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3 },
{ "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3 },
{ "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3 },
{ "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3 },
{ "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3 },
{ "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3 },
{ "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3 },
{ "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3 },
{ "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3 },
{ "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR,3 },
{ "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3 },
{ "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3 },
{ "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD,3 },
{ "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3 },
{ "e", OP8(0x00LL), MASK_E, INSTR_E, 3, 0 },
{ "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3, 0 },
{ "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3, 0 },
{ "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 0 },
{ "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3, 0 },
{ "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0 },
{ "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3, 0 },
{ "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0 },
{ "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 0 },
{ "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0 },
{ "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0 },
{ "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 0 },
{ "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR,3, 0 },
{ "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3, 0 },
{ "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3, 0 },
{ "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD,3, 0 },
{ "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0 },
};
const int s390_num_opformats =

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